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Fix DFG removing forceable signals (#4942)

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DFG could remove forceable signals by replacing them with their
in-design driver. This is a bit of a pain to prevent, and ideally the
forcing transform should happen before DFG, but implementing it there is
a pain due to having to rewrite ports based on direction.  This is an
attempted fix in DFG. More cases might remain.
This commit is contained in:
Geza Lore
2024-03-03 16:22:41 +00:00
committed by GitHub
parent 0fbd4313b2
commit 745605efe3
7 changed files with 137 additions and 61 deletions
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src/V3DfgAstToDfg.cpp
+8 -5
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@@ -439,11 +439,14 @@ class AstToDfgVisitor final : public VNVisitor {
if (nodep->isSc()) return;
// No need to (and in fact cannot) handle variables with unsupported dtypes
if (!DfgVertex::isSupportedDType(nodep->dtypep())) return;
// Mark ports as having external references
if (nodep->isIO()) getNet(nodep)->setHasExtRefs();
// Mark variables that are the target of a hierarchical reference
// (these flags were set up in DataflowPrepVisitor)
if (nodep->user2()) getNet(nodep)->setHasExtRefs();
// Mark variables with external references
if (nodep->isIO() // Ports
|| nodep->user2() // Target of a hierarchical reference
|| nodep->isForceable() // Forceable
) {
getNet(nodep)->setHasExtRefs();
}
}
void visit(AstAssignW* nodep) override {