Fix emitv
Signed-off-by: Bartłomiej Chmiel <bchmiel@antmicro.com>
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@ -366,9 +366,6 @@ module Vt_debug_emitv_t;
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property p1;
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@( clk) sum[0]
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endproperty
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property p2;
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@(posedge clk) disable iff (cyc == 'sh1) ##1 sum[0]
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endproperty
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assert property (@( clk) (! ##1 in)
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) begin
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end
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@ -277,9 +277,6 @@ module t (/*AUTOARG*/
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property p1;
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@(clk) sum[0]
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endproperty
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property p2;
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@(posedge clk) disable iff (cyc == 1) ##1 sum[0]
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endproperty
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assert property (@(clk) not ##1 in);
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