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Fix string ?: conditional type resolution, bug1345.

This commit is contained in:
Wilson Snyder 2018-09-12 19:20:15 -04:00
parent 75794e2eaa
commit 3a6edae59d
3 changed files with 34 additions and 1 deletions
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2
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@ -35,6 +35,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
**** Fix number parsing with newline after radix, bug1340. [George Cuan] **** Fix number parsing with newline after radix, bug1340. [George Cuan]
**** Fix string ?: conditional type resolution, bug1345. [Iztok Jeras]
* Verilator 3.926 2018-08-22 * Verilator 3.926 2018-08-22

2
src/V3Width.cpp
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@ -358,6 +358,8 @@ private:
// the expression includes the size of the output too. // the expression includes the size of the output too.
if (nodep->expr1p()->isDouble() || nodep->expr2p()->isDouble()) { if (nodep->expr1p()->isDouble() || nodep->expr2p()->isDouble()) {
nodep->dtypeSetDouble(); nodep->dtypeSetDouble();
} else if (nodep->expr1p()->isString() || nodep->expr2p()->isString()) {
nodep->dtypeSetString();
} else { } else {
int width = std::max(nodep->expr1p()->width(), nodep->expr2p()->width()); int width = std::max(nodep->expr1p()->width(), nodep->expr2p()->width());
int mwidth = std::max(nodep->expr1p()->widthMin(), nodep->expr2p()->widthMin()); int mwidth = std::max(nodep->expr1p()->widthMin(), nodep->expr2p()->widthMin());

31
test_regress/t/t_trace_string.v
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@ -3,7 +3,12 @@
// This file ONLY is placed into the Public Domain, for any use, // This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2018 by Wilson Snyder. // without warranty, 2018 by Wilson Snyder.
module t (/*AUTOARG*/); module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
localparam string SVEC [0:7] = '{"zero", "one", "two", "three", "four", "five", "six", "seven"}; localparam string SVEC [0:7] = '{"zero", "one", "two", "three", "four", "five", "six", "seven"};
@ -13,4 +18,28 @@ module t (/*AUTOARG*/);
$finish; $finish;
end end
localparam string REGX [0:31] = '{"zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", "s0/fp", "s1", "a0", "a1", "a2", "a3", "a4", "a5",
"a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6"};
function string regx (logic [5-1:0] r, bit abi=1'b0);
regx = abi ? REGX[r] : $sformatf("x%0d", r);
endfunction: regx
function string dis32 (logic [32-1:0] op);
casez (op)
32'b0000_0000_0000_0000_0000_0000_0001_0011: dis32 = $sformatf("nop");
32'b0000_0000_0000_0000_0100_0000_0011_0011: dis32 = $sformatf("-");
32'b????_????_????_????_?000_????_?110_0111: dis32 = $sformatf("jalr %s, 0x%03x (%s)",
regx(op[5-1:0]), op[16-1:0], regx(op[5-1:0]));
default: dis32 = "illegal";
endcase
endfunction: dis32
always @(posedge clk) begin
for (int unsigned i=0; i<32; i++)
$display("REGX: %s", regx(i[4:0]));
$display("OP: %s", dis32(32'h00000000));
$finish();
end
endmodule endmodule