Example test

This commit is contained in:
Wilson Snyder 2013-04-28 18:58:04 -04:00
parent f0a8824efc
commit 316eb24bbb
2 changed files with 56 additions and 0 deletions

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#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
compile (
);
execute (
check_finished=>1,
);
ok(1);
1;

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// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2012 by Wilson Snyder.
//bug505
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
a #(1) a1 ();
b #(2) b2 ();
initial begin
$write("*-* All Finished *-*\n");
$finish;
end
endmodule
module a;
parameter ONE /*verilator public*/ = 22;
initial if (ONE != 1) $stop;
`ifdef VERILATOR
initial if ($c32("ONE") != 1) $stop;
`endif
endmodule
module b #(
parameter TWO /*verilator public*/ = 22
);
initial if (TWO != 2) $stop;
`ifdef VERILATOR
initial if ($c32("TWO") != 2) $stop;
`endif
endmodule