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Fix unstable --vltmt test 

Signed-off-by: Artur Bieniek <abieniek@antmicro.com>
This commit is contained in:
Artur Bieniek 2026-06-18 14:30:52 +02:00
parent 5712f9b614
commit 2f01775ba9
2 changed files with 2 additions and 3 deletions
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3
test_regress/t/t_assert_iff_clk.py
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@ -9,8 +9,7 @@
import vltest_bootstrap import vltest_bootstrap
# Issue #7781 unstable with --vltmt test.scenarios('simulator')
test.scenarios('simulator_st')
test.compile(timing_loop=True, verilator_flags2=['--assert', '--timing']) test.compile(timing_loop=True, verilator_flags2=['--assert', '--timing'])

2
test_regress/t/t_assert_iff_clk.v
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@ -32,7 +32,7 @@ module t (
assert property (@(posedge clk) disable iff (cyc < 5) 1 ##1 0) assert property (@(posedge clk) disable iff (cyc < 5) 1 ##1 0)
else post_temporal_fail++; else post_temporal_fail++;
always @(posedge clk) begin always @(negedge clk) begin
cyc <= cyc + 1; cyc <= cyc + 1;
rst <= cyc < 4; rst <= cyc < 4;
x <= cyc < 4; x <= cyc < 4;