luke
/
verilator
mirror of https://github.com/verilator/verilator.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Fix tracing of packed arrays without --trace-structs, bug742.

This commit is contained in:
Wilson Snyder 2014-04-15 20:20:45 -04:00
parent 6b2ee0fcf3
commit 2e10555f03
8 changed files with 430 additions and 378 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Changes
View File

@ -23,6 +23,8 @@ indicates the contributor was also the author of the fix; Thanks!
**** Fix tracing of package variables and real arrays. **** Fix tracing of package variables and real arrays.
**** Fix tracing of packed arrays without --trace-structs, bug742. [Jie Xu]
**** Fix missing coverage line on else-if, bug727. [Sharad Bagri] **** Fix missing coverage line on else-if, bug727. [Sharad Bagri]
**** Fix modport function import not-found error. **** Fix modport function import not-found error.

2
src/V3Ast.h
View File

@ -615,7 +615,9 @@ struct VNumRange {
int hiMaxSelect() const { return (lo()<0 ? hi()-lo() : hi()); } // Maximum value a [] select may index int hiMaxSelect() const { return (lo()<0 ? hi()-lo() : hi()); } // Maximum value a [] select may index
bool representableByWidth() const // Could be represented by just width=1, or [width-1:0] bool representableByWidth() const // Could be represented by just width=1, or [width-1:0]
{ return (!m_ranged || (m_lo==0 && m_hi>=1 && !m_littleEndian)); } { return (!m_ranged || (m_lo==0 && m_hi>=1 && !m_littleEndian)); }
void dump(ostream& str) const { if (ranged()) str<<"["<<left()<<":"<<right()<<"]"; else str<<"[norg]"; }
}; };
inline ostream& operator<<(ostream& os, VNumRange rhs) { rhs.dump(os); return os; }
//###################################################################### //######################################################################

6
src/V3AstNodes.cpp
View File

@ -835,11 +835,11 @@ void AstNodeDType::dumpSmall(ostream& str) {
void AstNodeArrayDType::dumpSmall(ostream& str) { void AstNodeArrayDType::dumpSmall(ostream& str) {
this->AstNodeDType::dumpSmall(str); this->AstNodeDType::dumpSmall(str);
if (castPackArrayDType()) str<<"p"; else str<<"u"; if (castPackArrayDType()) str<<"p"; else str<<"u";
str<<"["<<declRange().left()<<":"<<declRange().right()<<"]"; str<<" "<<declRange();
} }
void AstNodeArrayDType::dump(ostream& str) { void AstNodeArrayDType::dump(ostream& str) {
this->AstNodeDType::dump(str); this->AstNodeDType::dump(str);
str<<" ["<<declRange().left()<<":"<<declRange().right()<<"]"; str<<" "<<declRange();
} }
void AstNodeModule::dump(ostream& str) { void AstNodeModule::dump(ostream& str) {
this->AstNode::dump(str); this->AstNode::dump(str);
@ -855,7 +855,7 @@ void AstPackageImport::dump(ostream& str) {
void AstSel::dump(ostream& str) { void AstSel::dump(ostream& str) {
this->AstNode::dump(str); this->AstNode::dump(str);
if (declRange().ranged()) { if (declRange().ranged()) {
str<<" decl["<<declRange().left()<<":"<<declRange().right()<<"]"; str<<" decl"<<declRange()<<"]";
if (declElWidth()!=1) str<<"/"<<declElWidth(); if (declElWidth()!=1) str<<"/"<<declElWidth();
} }
} }

15
src/V3TraceDecl.cpp
View File

@ -108,12 +108,15 @@ private:
void addCFuncStmt(AstCFunc* basep, AstNode* nodep, VNumRange arrayRange) { void addCFuncStmt(AstCFunc* basep, AstNode* nodep, VNumRange arrayRange) {
basep->addStmtsp(nodep); basep->addStmtsp(nodep);
} }
void addTraceDecl(const VNumRange& arrayRange) { void addTraceDecl(const VNumRange& arrayRange,
int widthOverride) { // If !=0, is packed struct/array where basicp size misreflects one element
VNumRange bitRange; VNumRange bitRange;
AstBasicDType* bdtypep = m_traValuep->dtypep()->basicp(); AstBasicDType* bdtypep = m_traValuep->dtypep()->basicp();
if (bdtypep) bitRange = bdtypep->nrange(); if (widthOverride) bitRange = VNumRange(widthOverride-1,0,false);
else if (bdtypep) bitRange = bdtypep->nrange();
AstTraceDecl* declp = new AstTraceDecl(m_traVscp->fileline(), m_traShowname, m_traValuep, AstTraceDecl* declp = new AstTraceDecl(m_traVscp->fileline(), m_traShowname, m_traValuep,
bitRange, arrayRange); bitRange, arrayRange);
UINFO(9,"Decl "<<declp<<endl);
if (m_initSubStmts && v3Global.opt.outputSplitCTrace() if (m_initSubStmts && v3Global.opt.outputSplitCTrace()
&& m_initSubStmts > v3Global.opt.outputSplitCTrace()) { && m_initSubStmts > v3Global.opt.outputSplitCTrace()) {
@ -199,7 +202,7 @@ private:
&& m_traVscp->dtypep()->skipRefp() == nodep) { // Nothing above this array && m_traVscp->dtypep()->skipRefp() == nodep) { // Nothing above this array
// Simple 1-D array, use exising V3EmitC runtime loop rather than unrolling // Simple 1-D array, use exising V3EmitC runtime loop rather than unrolling
// This will put "(index)" at end of signal name for us // This will put "(index)" at end of signal name for us
addTraceDecl(nodep->declRange()); addTraceDecl(nodep->declRange(), 0);
} else { } else {
// Unroll now, as have no other method to get right signal names // Unroll now, as have no other method to get right signal names
AstNodeDType* subtypep = nodep->subDTypep()->skipRefp(); AstNodeDType* subtypep = nodep->subDTypep()->skipRefp();
@ -225,7 +228,7 @@ private:
if (!v3Global.opt.traceStructs()) { if (!v3Global.opt.traceStructs()) {
// Everything downstream is packed, so deal with as one trace unit // Everything downstream is packed, so deal with as one trace unit
// This may not be the nicest for user presentation, but is a much faster way to trace // This may not be the nicest for user presentation, but is a much faster way to trace
addTraceDecl(VNumRange()); addTraceDecl(VNumRange(), nodep->width());
} else { } else {
AstNodeDType* subtypep = nodep->subDTypep()->skipRefp(); AstNodeDType* subtypep = nodep->subDTypep()->skipRefp();
for (int i=nodep->lsb(); i<=nodep->msb(); ++i) { for (int i=nodep->lsb(); i<=nodep->msb(); ++i) {
@ -250,7 +253,7 @@ private:
if (nodep->packed() && !v3Global.opt.traceStructs()) { if (nodep->packed() && !v3Global.opt.traceStructs()) {
// Everything downstream is packed, so deal with as one trace unit // Everything downstream is packed, so deal with as one trace unit
// This may not be the nicest for user presentation, but is a much faster way to trace // This may not be the nicest for user presentation, but is a much faster way to trace
addTraceDecl(VNumRange()); addTraceDecl(VNumRange(), nodep->width());
} else { } else {
if (!nodep->packed()) { if (!nodep->packed()) {
addIgnore("Unsupported: Unpacked struct/union"); addIgnore("Unsupported: Unpacked struct/union");
@ -282,7 +285,7 @@ private:
if (nodep->keyword()==AstBasicDTypeKwd::STRING) { if (nodep->keyword()==AstBasicDTypeKwd::STRING) {
addIgnore("Unsupported: strings"); addIgnore("Unsupported: strings");
} else { } else {
addTraceDecl(VNumRange()); addTraceDecl(VNumRange(), 0);
} }
} }
} }

234
test_regress/t/t_trace_complex.out
View File

@ -1,45 +1,46 @@
$version Generated by VerilatedVcd $end $version Generated by VerilatedVcd $end
$date Fri Mar 14 20:31:17 2014 $date Tue Apr 15 19:42:28 2014
$end $end
$timescale 1ns $end $timescale 1ns $end
$scope module top $end $scope module top $end
$var wire 1 7 clk $end $var wire 1 9 clk $end
$scope module $unit $end $scope module $unit $end
$var wire 1 # global_bit $end $var wire 1 # global_bit $end
$upscope $end $upscope $end
$scope module v $end $scope module v $end
$var wire 1 7 clk $end $var wire 1 9 clk $end
$var wire 32 $ cyc [31:0] $end $var wire 32 $ cyc [31:0] $end
$var real 64 1 v_arr_real(0) $end $var real 64 3 v_arr_real(0) $end
$var real 64 3 v_arr_real(1) $end $var real 64 5 v_arr_real(1) $end
$var wire 2 ( v_arrp [2:1] $end $var wire 2 * v_arrp [2:1] $end
$var wire 2 ) v_arrp_arrp [2:1] $end $var wire 4 + v_arrp_arrp [3:0] $end
$var wire 2 * v_arrp_strp [1:0] $end $var wire 4 , v_arrp_strp [3:0] $end
$var wire 1 8 v_arru(1) $end $var wire 1 : v_arru(1) $end
$var wire 1 9 v_arru(2) $end $var wire 1 ; v_arru(2) $end
$var wire 2 + v_arru_arrp(3) [2:1] $end $var wire 2 - v_arru_arrp(3) [2:1] $end
$var wire 2 , v_arru_arrp(4) [2:1] $end $var wire 2 . v_arru_arrp(4) [2:1] $end
$var wire 1 : v_arru_arru(3)(1) $end $var wire 1 < v_arru_arru(3)(1) $end
$var wire 1 ; v_arru_arru(3)(2) $end $var wire 1 = v_arru_arru(3)(2) $end
$var wire 1 < v_arru_arru(4)(1) $end $var wire 1 > v_arru_arru(4)(1) $end
$var wire 1 = v_arru_arru(4)(2) $end $var wire 1 ? v_arru_arru(4)(2) $end
$var wire 2 - v_arru_strp(3) [1:0] $end $var wire 2 / v_arru_strp(3) [1:0] $end
$var wire 2 . v_arru_strp(4) [1:0] $end $var wire 2 0 v_arru_strp(4) [1:0] $end
$var real 64 / v_real $end $var real 64 1 v_real $end
$var wire 2 % v_strp [1:0] $end $var wire 64 % v_str32x2 [63:0] $end
$var wire 4 & v_strp_strp [3:0] $end $var wire 2 ' v_strp [1:0] $end
$var wire 2 ' v_unip_strp [1:0] $end $var wire 4 ( v_strp_strp [3:0] $end
$var wire 2 ) v_unip_strp [1:0] $end
$scope module p2 $end $scope module p2 $end
$var wire 32 > PARAM [31:0] $end $var wire 32 @ PARAM [31:0] $end
$upscope $end $upscope $end
$scope module p3 $end $scope module p3 $end
$var wire 32 ? PARAM [31:0] $end $var wire 32 A PARAM [31:0] $end
$upscope $end $upscope $end
$scope module unnamedblk1 $end $scope module unnamedblk1 $end
$var wire 32 5 b [31:0] $end $var wire 32 7 b [31:0] $end
$scope module unnamedblk2 $end $scope module unnamedblk2 $end
$var wire 32 6 a [31:0] $end $var wire 32 8 a [31:0] $end
$upscope $end $upscope $end
$upscope $end $upscope $end
$upscope $end $upscope $end
@ -50,135 +51,142 @@ $enddefinitions $end
#0 #0
1# 1#
b00000000000000000000000000000000 $ b00000000000000000000000000000000 $
b00 % b0000000000000000000000000000000000000000000000000000000011111111 %
b0000 &
b00 ' b00 '
b00 ( b0000 (
b0000 ) b00 )
b0000 * b00 *
b00 + b0000 +
b00 , b0000 ,
b00 - b00 -
b00 . b00 .
r0 / b00 /
b00 0
r0 1 r0 1
r0 3 r0 3
b00000000000000000000000000000000 5 r0 5
b00000000000000000000000000000000 6 b00000000000000000000000000000000 7
07 b00000000000000000000000000000000 8
08
09 09
0: 0:
0; 0;
0< 0<
0= 0=
b00000000000000000000000000000010 > 0>
b00000000000000000000000000000011 ? 0?
b00000000000000000000000000000010 @
b00000000000000000000000000000011 A
#10 #10
b00000000000000000000000000000001 $ b00000000000000000000000000000001 $
b11 % b0000000000000000000000000000000100000000000000000000000011111110 %
b1111 &
b11 ' b11 '
b11 ( b1111 (
b1111 ) b11 )
b1111 * b11 *
b11 + b1111 +
b11 , b1111 ,
b11 - b11 -
b11 . b11 .
r0.1 / b11 /
r0.2 1 b11 0
r0.3 3 r0.1 1
b00000000000000000000000000000101 5 r0.2 3
b00000000000000000000000000000101 6 r0.3 5
17 b00000000000000000000000000000101 7
b00000000000000000000000000000101 8
19
#15 #15
07 09
#20 #20
b00000000000000000000000000000010 $ b00000000000000000000000000000010 $
b00 % b0000000000000000000000000000001000000000000000000000000011111101 %
b0000 &
b00 ' b00 '
b00 ( b0000 (
b0000 ) b00 )
b0000 * b00 *
b00 + b0000 +
b00 , b0000 ,
b00 - b00 -
b00 . b00 .
r0.2 / b00 /
r0.4 1 b00 0
r0.6 3 r0.2 1
17 r0.4 3
r0.6 5
19
#25 #25
07 09
#30 #30
b00000000000000000000000000000011 $ b00000000000000000000000000000011 $
b11 % b0000000000000000000000000000001100000000000000000000000011111100 %
b1111 &
b11 ' b11 '
b11 ( b1111 (
b1111 ) b11 )
b1111 * b11 *
b11 + b1111 +
b11 , b1111 ,
b11 - b11 -
b11 . b11 .
r0.3 / b11 /
r0.6000000000000001 1 b11 0
r0.8999999999999999 3 r0.3 1
17 r0.6000000000000001 3
r0.8999999999999999 5
19
#35 #35
07 09
#40 #40
b00000000000000000000000000000100 $ b00000000000000000000000000000100 $
b00 % b0000000000000000000000000000010000000000000000000000000011111011 %
b0000 &
b00 ' b00 '
b00 ( b0000 (
b0000 ) b00 )
b0000 * b00 *
b00 + b0000 +
b00 , b0000 ,
b00 - b00 -
b00 . b00 .
r0.4 / b00 /
r0.8 1 b00 0
r1.2 3 r0.4 1
17 r0.8 3
r1.2 5
19
#45 #45
07 09
#50 #50
b00000000000000000000000000000101 $ b00000000000000000000000000000101 $
b11 % b0000000000000000000000000000010100000000000000000000000011111010 %
b1111 &
b11 ' b11 '
b11 ( b1111 (
b1111 ) b11 )
b1111 * b11 *
b11 + b1111 +
b11 , b1111 ,
b11 - b11 -
b11 . b11 .
r0.5 / b11 /
r1 1 b11 0
r1.5 3 r0.5 1
17 r1 3
r1.5 5
19
#55 #55
07 09
#60 #60
b00000000000000000000000000000110 $ b00000000000000000000000000000110 $
b00 % b0000000000000000000000000000011000000000000000000000000011111001 %
b0000 &
b00 ' b00 '
b00 ( b0000 (
b0000 ) b00 )
b0000 * b00 *
b00 + b0000 +
b00 , b0000 ,
b00 - b00 -
b00 . b00 .
r0.6 / b00 /
r1.2 1 b00 0
r1.8 3 r0.6 1
17 r1.2 3
r1.8 5
19

9
test_regress/t/t_trace_complex.v
View File

@ -49,6 +49,13 @@ module t (clk);
real v_arr_real [2]; real v_arr_real [2];
string v_string; string v_string;
typedef struct packed {
logic [31:0] data;
} str32_t;
str32_t [1:0] v_str32x2; // If no --trace-struct, this packed array is traced as 63:0
initial v_str32x2[0] = 32'hff;
initial v_str32x2[1] = 0;
p #(.PARAM(2)) p2 (); p #(.PARAM(2)) p2 ();
p #(.PARAM(3)) p3 (); p #(.PARAM(3)) p3 ();
@ -72,6 +79,8 @@ module t (clk);
v_arru_arru[a][b] = ~v_arru_arru[a][b]; v_arru_arru[a][b] = ~v_arru_arru[a][b];
end end
end end
v_str32x2[0] <= v_str32x2[0] - 1;
v_str32x2[1] <= v_str32x2[1] + 1;
if (cyc == 5) begin if (cyc == 5) begin
$write("*-* All Finished *-*\n"); $write("*-* All Finished *-*\n");
$finish; $finish;

234
test_regress/t/t_trace_complex_params.out
View File

@ -1,45 +1,46 @@
$version Generated by VerilatedVcd $end $version Generated by VerilatedVcd $end
$date Fri Mar 14 20:32:05 2014 $date Tue Apr 15 19:42:37 2014
$end $end
$timescale 1ns $end $timescale 1ns $end
$scope module top $end $scope module top $end
$var wire 1 7 clk $end $var wire 1 9 clk $end
$scope module $unit $end $scope module $unit $end
$var wire 1 # global_bit $end $var wire 1 # global_bit $end
$upscope $end $upscope $end
$scope module v $end $scope module v $end
$var wire 1 7 clk $end $var wire 1 9 clk $end
$var wire 32 $ cyc [31:0] $end $var wire 32 $ cyc [31:0] $end
$var real 64 1 v_arr_real(0) $end $var real 64 3 v_arr_real(0) $end
$var real 64 3 v_arr_real(1) $end $var real 64 5 v_arr_real(1) $end
$var wire 2 ( v_arrp [2:1] $end $var wire 2 * v_arrp [2:1] $end
$var wire 2 ) v_arrp_arrp [2:1] $end $var wire 4 + v_arrp_arrp [3:0] $end
$var wire 2 * v_arrp_strp [1:0] $end $var wire 4 , v_arrp_strp [3:0] $end
$var wire 1 8 v_arru(1) $end $var wire 1 : v_arru(1) $end
$var wire 1 9 v_arru(2) $end $var wire 1 ; v_arru(2) $end
$var wire 2 + v_arru_arrp(3) [2:1] $end $var wire 2 - v_arru_arrp(3) [2:1] $end
$var wire 2 , v_arru_arrp(4) [2:1] $end $var wire 2 . v_arru_arrp(4) [2:1] $end
$var wire 1 : v_arru_arru(3)(1) $end $var wire 1 < v_arru_arru(3)(1) $end
$var wire 1 ; v_arru_arru(3)(2) $end $var wire 1 = v_arru_arru(3)(2) $end
$var wire 1 < v_arru_arru(4)(1) $end $var wire 1 > v_arru_arru(4)(1) $end
$var wire 1 = v_arru_arru(4)(2) $end $var wire 1 ? v_arru_arru(4)(2) $end
$var wire 2 - v_arru_strp(3) [1:0] $end $var wire 2 / v_arru_strp(3) [1:0] $end
$var wire 2 . v_arru_strp(4) [1:0] $end $var wire 2 0 v_arru_strp(4) [1:0] $end
$var real 64 / v_real $end $var real 64 1 v_real $end
$var wire 2 % v_strp [1:0] $end $var wire 64 % v_str32x2 [63:0] $end
$var wire 4 & v_strp_strp [3:0] $end $var wire 2 ' v_strp [1:0] $end
$var wire 2 ' v_unip_strp [1:0] $end $var wire 4 ( v_strp_strp [3:0] $end
$var wire 2 ) v_unip_strp [1:0] $end
$scope module p2 $end $scope module p2 $end
$var wire 32 > PARAM [31:0] $end $var wire 32 @ PARAM [31:0] $end
$upscope $end $upscope $end
$scope module p3 $end $scope module p3 $end
$var wire 32 ? PARAM [31:0] $end $var wire 32 A PARAM [31:0] $end
$upscope $end $upscope $end
$scope module unnamedblk1 $end $scope module unnamedblk1 $end
$var wire 32 5 b [31:0] $end $var wire 32 7 b [31:0] $end
$scope module unnamedblk2 $end $scope module unnamedblk2 $end
$var wire 32 6 a [31:0] $end $var wire 32 8 a [31:0] $end
$upscope $end $upscope $end
$upscope $end $upscope $end
$upscope $end $upscope $end
@ -50,135 +51,142 @@ $enddefinitions $end
#0 #0
1# 1#
b00000000000000000000000000000000 $ b00000000000000000000000000000000 $
b00 % b0000000000000000000000000000000000000000000000000000000011111111 %
b0000 &
b00 ' b00 '
b00 ( b0000 (
b0000 ) b00 )
b0000 * b00 *
b00 + b0000 +
b00 , b0000 ,
b00 - b00 -
b00 . b00 .
r0 / b00 /
b00 0
r0 1 r0 1
r0 3 r0 3
b00000000000000000000000000000000 5 r0 5
b00000000000000000000000000000000 6 b00000000000000000000000000000000 7
07 b00000000000000000000000000000000 8
08
09 09
0: 0:
0; 0;
0< 0<
0= 0=
b00000000000000000000000000000010 > 0>
b00000000000000000000000000000011 ? 0?
b00000000000000000000000000000010 @
b00000000000000000000000000000011 A
#10 #10
b00000000000000000000000000000001 $ b00000000000000000000000000000001 $
b11 % b0000000000000000000000000000000100000000000000000000000011111110 %
b1111 &
b11 ' b11 '
b11 ( b1111 (
b1111 ) b11 )
b1111 * b11 *
b11 + b1111 +
b11 , b1111 ,
b11 - b11 -
b11 . b11 .
r0.1 / b11 /
r0.2 1 b11 0
r0.3 3 r0.1 1
b00000000000000000000000000000101 5 r0.2 3
b00000000000000000000000000000101 6 r0.3 5
17 b00000000000000000000000000000101 7
b00000000000000000000000000000101 8
19
#15 #15
07 09
#20 #20
b00000000000000000000000000000010 $ b00000000000000000000000000000010 $
b00 % b0000000000000000000000000000001000000000000000000000000011111101 %
b0000 &
b00 ' b00 '
b00 ( b0000 (
b0000 ) b00 )
b0000 * b00 *
b00 + b0000 +
b00 , b0000 ,
b00 - b00 -
b00 . b00 .
r0.2 / b00 /
r0.4 1 b00 0
r0.6 3 r0.2 1
17 r0.4 3
r0.6 5
19
#25 #25
07 09
#30 #30
b00000000000000000000000000000011 $ b00000000000000000000000000000011 $
b11 % b0000000000000000000000000000001100000000000000000000000011111100 %
b1111 &
b11 ' b11 '
b11 ( b1111 (
b1111 ) b11 )
b1111 * b11 *
b11 + b1111 +
b11 , b1111 ,
b11 - b11 -
b11 . b11 .
r0.3 / b11 /
r0.6000000000000001 1 b11 0
r0.8999999999999999 3 r0.3 1
17 r0.6000000000000001 3
r0.8999999999999999 5
19
#35 #35
07 09
#40 #40
b00000000000000000000000000000100 $ b00000000000000000000000000000100 $
b00 % b0000000000000000000000000000010000000000000000000000000011111011 %
b0000 &
b00 ' b00 '
b00 ( b0000 (
b0000 ) b00 )
b0000 * b00 *
b00 + b0000 +
b00 , b0000 ,
b00 - b00 -
b00 . b00 .
r0.4 / b00 /
r0.8 1 b00 0
r1.2 3 r0.4 1
17 r0.8 3
r1.2 5
19
#45 #45
07 09
#50 #50
b00000000000000000000000000000101 $ b00000000000000000000000000000101 $
b11 % b0000000000000000000000000000010100000000000000000000000011111010 %
b1111 &
b11 ' b11 '
b11 ( b1111 (
b1111 ) b11 )
b1111 * b11 *
b11 + b1111 +
b11 , b1111 ,
b11 - b11 -
b11 . b11 .
r0.5 / b11 /
r1 1 b11 0
r1.5 3 r0.5 1
17 r1 3
r1.5 5
19
#55 #55
07 09
#60 #60
b00000000000000000000000000000110 $ b00000000000000000000000000000110 $
b00 % b0000000000000000000000000000011000000000000000000000000011111001 %
b0000 &
b00 ' b00 '
b00 ( b0000 (
b0000 ) b00 )
b0000 * b00 *
b00 + b0000 +
b00 , b0000 ,
b00 - b00 -
b00 . b00 .
r0.6 / b00 /
r1.2 1 b00 0
r1.8 3 r0.6 1
17 r1.2 3
r1.8 5
19

306
test_regress/t/t_trace_complex_structs.out
View File

@ -1,74 +1,80 @@
$version Generated by VerilatedVcd $end $version Generated by VerilatedVcd $end
$date Fri Mar 14 20:32:11 2014 $date Tue Apr 15 12:58:17 2014
$end $end
$timescale 1ns $end $timescale 1ns $end
$scope module top $end $scope module top $end
$var wire 1 B clk $end $var wire 1 D clk $end
$scope module $unit $end $scope module $unit $end
$var wire 1 # global_bit $end $var wire 1 # global_bit $end
$upscope $end $upscope $end
$scope module v $end $scope module v $end
$var wire 1 B clk $end $var wire 1 D clk $end
$var wire 32 $ cyc [31:0] $end $var wire 32 $ cyc [31:0] $end
$var real 64 < v_arr_real(0) $end $var real 64 > v_arr_real(0) $end
$var real 64 > v_arr_real(1) $end $var real 64 @ v_arr_real(1) $end
$var wire 2 - v_arrp [2:1] $end $var wire 2 / v_arrp [2:1] $end
$var wire 2 . v_arrp_arrp(3) [1:0] $end $var wire 2 0 v_arrp_arrp(3) [1:0] $end
$var wire 2 / v_arrp_arrp(4) [1:0] $end $var wire 2 1 v_arrp_arrp(4) [1:0] $end
$var wire 1 C v_arru(1) $end $var wire 1 E v_arru(1) $end
$var wire 1 D v_arru(2) $end $var wire 1 F v_arru(2) $end
$var wire 2 4 v_arru_arrp(3) [2:1] $end $var wire 2 6 v_arru_arrp(3) [2:1] $end
$var wire 2 5 v_arru_arrp(4) [2:1] $end $var wire 2 7 v_arru_arrp(4) [2:1] $end
$var wire 1 E v_arru_arru(3)(1) $end $var wire 1 G v_arru_arru(3)(1) $end
$var wire 1 F v_arru_arru(3)(2) $end $var wire 1 H v_arru_arru(3)(2) $end
$var wire 1 G v_arru_arru(4)(1) $end $var wire 1 I v_arru_arru(4)(1) $end
$var wire 1 H v_arru_arru(4)(2) $end $var wire 1 J v_arru_arru(4)(2) $end
$var real 64 : v_real $end $var real 64 < v_real $end
$scope module unnamedblk1 $end $scope module unnamedblk1 $end
$var wire 32 @ b [31:0] $end $var wire 32 B b [31:0] $end
$scope module unnamedblk2 $end $scope module unnamedblk2 $end
$var wire 32 A a [31:0] $end $var wire 32 C a [31:0] $end
$upscope $end $upscope $end
$upscope $end $upscope $end
$scope module v_arrp_strp(3) $end $scope module v_arrp_strp(3) $end
$var wire 1 1 b0 $end
$var wire 1 0 b1 $end
$upscope $end
$scope module v_arrp_strp(4) $end
$var wire 1 3 b0 $end $var wire 1 3 b0 $end
$var wire 1 2 b1 $end $var wire 1 2 b1 $end
$upscope $end $upscope $end
$scope module v_arru_strp(3) $end $scope module v_arrp_strp(4) $end
$var wire 1 7 b0 $end $var wire 1 5 b0 $end
$var wire 1 6 b1 $end $var wire 1 4 b1 $end
$upscope $end $upscope $end
$scope module v_arru_strp(4) $end $scope module v_arru_strp(3) $end
$var wire 1 9 b0 $end $var wire 1 9 b0 $end
$var wire 1 8 b1 $end $var wire 1 8 b1 $end
$upscope $end $upscope $end
$scope module v_arru_strp(4) $end
$var wire 1 ; b0 $end
$var wire 1 : b1 $end
$upscope $end
$scope module v_str32x2(0) $end
$var wire 32 % data [31:0] $end
$upscope $end
$scope module v_str32x2(1) $end
$var wire 32 & data [31:0] $end
$upscope $end
$scope module v_strp $end $scope module v_strp $end
$var wire 1 & b0 $end $var wire 1 ( b0 $end
$var wire 1 % b1 $end $var wire 1 ' b1 $end
$upscope $end $upscope $end
$scope module v_strp_strp $end $scope module v_strp_strp $end
$scope module x0 $end $scope module x0 $end
$var wire 1 * b0 $end $var wire 1 , b0 $end
$var wire 1 ) b1 $end $var wire 1 + b1 $end
$upscope $end $upscope $end
$scope module x1 $end $scope module x1 $end
$var wire 1 ( b0 $end $var wire 1 * b0 $end
$var wire 1 ' b1 $end $var wire 1 ) b1 $end
$upscope $end $upscope $end
$upscope $end $upscope $end
$scope module v_unip_strp $end $scope module v_unip_strp $end
$scope module x0 $end $scope module x0 $end
$var wire 1 , b0 $end $var wire 1 . b0 $end
$var wire 1 + b1 $end $var wire 1 - b1 $end
$upscope $end $upscope $end
$scope module x1 $end $scope module x1 $end
$var wire 1 , b0 $end $var wire 1 . b0 $end
$var wire 1 + b1 $end $var wire 1 - b1 $end
$upscope $end $upscope $end
$upscope $end $upscope $end
$upscope $end $upscope $end
@ -79,210 +85,224 @@ $enddefinitions $end
#0 #0
1# 1#
b00000000000000000000000000000000 $ b00000000000000000000000000000000 $
0% b00000000000000000000000011111111 %
0& b00000000000000000000000000000000 &
0' 0'
0( 0(
0) 0)
0* 0*
0+ 0+
0, 0,
b00 - 0-
b00 . 0.
b00 / b00 /
00 b00 0
01 b00 1
02 02
03 03
b00 4 04
b00 5 05
06 b00 6
07 b00 7
08 08
09 09
r0 : 0:
0;
r0 < r0 <
r0 > r0 >
b00000000000000000000000000000000 @ r0 @
b00000000000000000000000000000000 A b00000000000000000000000000000000 B
0B b00000000000000000000000000000000 C
0C
0D 0D
0E 0E
0F 0F
0G 0G
0H 0H
0I
0J
#10 #10
b00000000000000000000000000000001 $ b00000000000000000000000000000001 $
1% b00000000000000000000000011111110 %
1& b00000000000000000000000000000001 &
1' 1'
1( 1(
1) 1)
1* 1*
1+ 1+
1, 1,
b11 - 1-
b11 . 1.
b11 / b11 /
10 b11 0
11 b11 1
12 12
13 13
b11 4 14
b11 5 15
16 b11 6
17 b11 7
18 18
19 19
r0.1 : 1:
r0.2 < 1;
r0.3 > r0.1 <
b00000000000000000000000000000101 @ r0.2 >
b00000000000000000000000000000101 A r0.3 @
1B b00000000000000000000000000000101 B
b00000000000000000000000000000101 C
1D
#15 #15
0B 0D
#20 #20
b00000000000000000000000000000010 $ b00000000000000000000000000000010 $
0% b00000000000000000000000011111101 %
0& b00000000000000000000000000000010 &
0' 0'
0( 0(
0) 0)
0* 0*
0+ 0+
0, 0,
b00 - 0-
b00 . 0.
b00 / b00 /
00 b00 0
01 b00 1
02 02
03 03
b00 4 04
b00 5 05
06 b00 6
07 b00 7
08 08
09 09
r0.2 : 0:
r0.4 < 0;
r0.6 > r0.2 <
1B r0.4 >
r0.6 @
1D
#25 #25
0B 0D
#30 #30
b00000000000000000000000000000011 $ b00000000000000000000000000000011 $
1% b00000000000000000000000011111100 %
1& b00000000000000000000000000000011 &
1' 1'
1( 1(
1) 1)
1* 1*
1+ 1+
1, 1,
b11 - 1-
b11 . 1.
b11 / b11 /
10 b11 0
11 b11 1
12 12
13 13
b11 4 14
b11 5 15
16 b11 6
17 b11 7
18 18
19 19
r0.3 : 1:
r0.6000000000000001 < 1;
r0.8999999999999999 > r0.3 <
1B r0.6000000000000001 >
r0.8999999999999999 @
1D
#35 #35
0B 0D
#40 #40
b00000000000000000000000000000100 $ b00000000000000000000000000000100 $
0% b00000000000000000000000011111011 %
0& b00000000000000000000000000000100 &
0' 0'
0( 0(
0) 0)
0* 0*
0+ 0+
0, 0,
b00 - 0-
b00 . 0.
b00 / b00 /
00 b00 0
01 b00 1
02 02
03 03
b00 4 04
b00 5 05
06 b00 6
07 b00 7
08 08
09 09
r0.4 : 0:
r0.8 < 0;
r1.2 > r0.4 <
1B r0.8 >
r1.2 @
1D
#45 #45
0B 0D
#50 #50
b00000000000000000000000000000101 $ b00000000000000000000000000000101 $
1% b00000000000000000000000011111010 %
1& b00000000000000000000000000000101 &
1' 1'
1( 1(
1) 1)
1* 1*
1+ 1+
1, 1,
b11 - 1-
b11 . 1.
b11 / b11 /
10 b11 0
11 b11 1
12 12
13 13
b11 4 14
b11 5 15
16 b11 6
17 b11 7
18 18
19 19
r0.5 : 1:
r1 < 1;
r1.5 > r0.5 <
1B r1 >
r1.5 @
1D
#55 #55
0B 0D
#60 #60
b00000000000000000000000000000110 $ b00000000000000000000000000000110 $
0% b00000000000000000000000011111001 %
0& b00000000000000000000000000000110 &
0' 0'
0( 0(
0) 0)
0* 0*
0+ 0+
0, 0,
b00 - 0-
b00 . 0.
b00 / b00 /
00 b00 0
01 b00 1
02 02
03 03
b00 4 04
b00 5 05
06 b00 6
07 b00 7
08 08
09 09
r0.6 : 0:
r1.2 < 0;
r1.8 > r0.6 <
1B r1.2 >
r1.8 @
1D