Update WIDTH warning message formats to match future commit.
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2accba2e71
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@ -1019,7 +1019,8 @@ public:
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static string encodeNumber(vlsint64_t numin); // Encode number into internal C representation
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static string vcdName(const string& namein); // Name for printing out to vcd files
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string prettyName() const { return prettyName(name()); }
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string prettyTypeName() const; // "VARREF name" for error messages
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string prettyTypeName() const; // "VARREF" for error messages
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virtual string prettyOperatorName() const { return "operator "+prettyTypeName(); }
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FileLine* fileline() const { return m_fileline; }
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void fileline(FileLine* fl) { m_fileline=fl; }
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bool width1() const;
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@ -1003,6 +1003,8 @@ public:
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void trace(bool flag) { m_trace=flag; }
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// METHODS
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virtual void name(const string& name) { m_name = name; }
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virtual string directionName() const { return (isInout() ? "inout" : isInput() ? "input"
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: isOutput() ? "output" : varType().ascii()); }
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bool isInput() const { return m_input; }
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bool isOutput() const { return m_output; }
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bool isInOnly() const { return m_input && !m_output; }
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@ -1294,6 +1296,9 @@ public:
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virtual const char* broken() const { BROKEN_RTN(m_modVarp && !m_modVarp->brokeExists()); return NULL; }
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virtual string name() const { return m_name; } // * = Pin name, ""=go by number
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virtual void name(const string& name) { m_name = name; }
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virtual string prettyOperatorName() const { return modVarp()
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? (modVarp()->directionName()+" port connection '"+modVarp()->prettyName()+"'")
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: "port connection"; }
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bool dotStar() const { return name() == ".*"; } // Special fake name for .* connections until linked
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int pinNum() const { return m_pinNum; }
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void exprp(AstNode* nodep) { addOp1p(nodep); }
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@ -2236,6 +2241,7 @@ struct AstFClose : public AstNodeStmt {
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};
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struct AstFOpen : public AstNodeStmt {
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// Although a system function in IEEE, here a statement which sets the file pointer (MCD)
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AstFOpen(FileLine* fileline, AstNode* filep, AstNode* filenamep, AstNode* modep)
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: AstNodeStmt (fileline) {
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setOp1p(filep);
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@ -272,12 +272,18 @@ template< class T> std::string cvtToStr (const T& t) {
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inline uint32_t cvtToHash(const void* vp) {
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// We can shove a 64 bit pointer into a 32 bit bucket
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// On 32 bit systems, lower is always 0, but who cares?
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// On 32-bit systems, lower is always 0, but who cares?
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union { const void* up; struct {uint32_t upper; uint32_t lower;} l;} u;
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u.l.upper=0; u.l.lower=0; u.up=vp;
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return u.l.upper^u.l.lower;
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}
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inline string ucfirst(const string& text) {
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string out = text;
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out[0] = toupper(out[0]);
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return out;
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}
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//######################################################################
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class FileLine;
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@ -196,11 +196,6 @@ public:
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else if (nodep->castIface()) return "interface";
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else return nodep->prettyTypeName();
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}
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static string ucfirst(const string& text) {
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string out = text;
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out[0] = toupper(out[0]);
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return out;
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}
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VSymEnt* rootEntp() const { return m_syms.rootp(); }
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VSymEnt* dunitEntp() const { return m_dunitEntp; }
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@ -1467,9 +1462,9 @@ private:
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nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
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return;
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}
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nodep->v3error(LinkDotState::ucfirst(whatp)<<" not found: "<<nodep->prettyName());
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nodep->v3error(ucfirst(whatp)<<" not found: "<<nodep->prettyName());
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} else if (!refp->isIO() && !refp->isParam() && !refp->isIfaceRef()) {
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nodep->v3error(LinkDotState::ucfirst(whatp)<<" is not an in/out/inout/param/interface: "<<nodep->prettyName());
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nodep->v3error(ucfirst(whatp)<<" is not an in/out/inout/param/interface: "<<nodep->prettyName());
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} else {
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nodep->modVarp(refp);
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if (refp->user5p() && refp->user5p()->castNode()!=nodep) {
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@ -75,7 +75,7 @@ public:
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private:
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// METHODS
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inline bool bitNumOk(int bit) const { return bit>=0 && (bit*FLAGS_PER_BIT < (int)m_flags.size()); }
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inline bool bitNumOk(int bit) const { return (bit*FLAGS_PER_BIT < (int)m_flags.size()); }
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inline bool usedFlag(int bit) const { return m_usedWhole || m_flags[bit*FLAGS_PER_BIT + FLAG_USED]; }
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inline bool drivenFlag(int bit) const { return m_drivenWhole || m_flags[bit*FLAGS_PER_BIT + FLAG_DRIVEN]; }
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enum BitNamesWhich { BN_UNUSED, BN_UNDRIVEN, BN_BOTH };
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@ -1765,7 +1765,7 @@ private:
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} else {
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// Must be a error according to spec
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// (Because we need to know if to connect to one or all instants)
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nodep->v3error("Port connection "<<nodep->prettyName()<<" as part of a module instance array "
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nodep->v3error(ucfirst(nodep->prettyOperatorName())<<" as part of a module instance array"
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<<" requires "<<pinwidth<<" or "<<pinwidth*numInsts
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<<" bits, but connection's "<<nodep->exprp()->prettyTypeName()
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<<" generates "<<expwidth<<" bits.");
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@ -1774,8 +1774,8 @@ private:
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} else {
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if (nodep->modVarp()->isTristate()) {
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if (pinwidth != expwidth) {
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nodep->v3error("Unsupported: Port connection "<<nodep->prettyName()<<" to inout signal "
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<<" requires "<<pinwidth
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nodep->v3error("Unsupported: "<<ucfirst(nodep->prettyOperatorName())
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<<" to inout signal requires "<<pinwidth
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<<" bits, but connection's "<<nodep->exprp()->prettyTypeName()
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<<" generates "<<expwidth<<" bits.");
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// otherwise would need some mess to force both sides to proper size
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@ -1785,7 +1785,7 @@ private:
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bool hiArray = nodep->exprp()->dtypep()->skipRefp()->castUnpackArrayDType();
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bool loArray = nodep->modVarp()->dtypep()->skipRefp()->castUnpackArrayDType();
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if (loArray != hiArray) {
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nodep->v3error("Illegal port connection '"<<nodep->prettyName()<<"',"
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nodep->v3error("Illegal "<<nodep->prettyOperatorName()<<","
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<<" mismatch between port which is"<<(hiArray?"":" not")<<" an array,"
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<<" and expression which is"<<(loArray?"":" not")<<" an array.");
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UINFO(1," Related lo: "<<nodep->exprp()->dtypep()->skipRefp()<<endl);
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@ -2500,7 +2500,7 @@ private:
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if (bad && !ignoreWarn) {
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if (debug()>4) nodep->backp()->dumpTree(cout," back: ");
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nodep->v3warn(WIDTH,"Operator "<<nodep->prettyTypeName()
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nodep->v3warn(WIDTH,ucfirst(nodep->prettyOperatorName())
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<<" expects "<<expWidth
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<<(expWidth!=expWidthMin?" or "+cvtToStr(expWidthMin):"")
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<<" bits on the "<<side<<", but "<<side<<"'s "
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@ -2531,7 +2531,7 @@ private:
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if (bad) {
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if (!ignoreWarn) {
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if (debug()>4) nodep->backp()->dumpTree(cout," back: ");
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nodep->v3warn(WIDTH,"Logical Operator "<<nodep->prettyTypeName()
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nodep->v3warn(WIDTH,"Logical "<<nodep->prettyOperatorName()
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<<" expects 1 bit on the "<<side<<", but "<<side<<"'s "
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<<underp->prettyTypeName()<<" generates "<<underp->width()
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<<(underp->width()!=underp->widthMin()
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@ -2548,10 +2548,9 @@ private:
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bool bad = widthBad(underp,expWidth,expWidth);
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if (bad && fixAutoExtend(underp/*ref*/,expWidth)) bad=false; // Changes underp
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if (bad) {
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nodep->v3warn(WIDTH,(inputPin?"Input":"Output")
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<<" port connection "<<nodep->prettyName()
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nodep->v3warn(WIDTH,ucfirst(nodep->prettyOperatorName())
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<<" expects "<<expWidth
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<<" bits but connection's "
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<<" bits on the pin connection, but pin connection's "
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<<underp->prettyTypeName()<<" generates "<<underp->width()
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<<(underp->width()!=underp->widthMin()
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?" or "+cvtToStr(underp->widthMin()):"")
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@ -19,7 +19,7 @@ if (!-r "$root/.git") {
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my $files = `cd $root && git ls-files --exclude-standard`;
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print "ST $files\n" if $Debug;
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$files =~ s/\s+/ /g;
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my $cmd = "cd $root && fgrep -n FIXME $files | sort | grep -v t_dist_fixme";
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my $cmd = "cd $root && fgrep -n FIX"."ME $files | sort | grep -v t_dist_fixme";
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my $grep = `$cmd`;
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print "$grep\n";
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if ($grep ne "") {
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@ -27,7 +27,7 @@ if (!-r "$root/.git") {
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foreach my $line (split /\n/, $grep) {
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$names{$1} = 1 if $line =~ /^([^:]+)/;
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}
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$Self->error("Files with FIXMEs: ",join(' ',sort keys %names));
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$Self->error("Files with FIX"."MEs: ",join(' ',sort keys %names));
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}
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}
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@ -11,7 +11,7 @@ compile (
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v_flags2 => ["--lint-only"],
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fails=>1,
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expect=>
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q{%Error: t/t_inst_array_bad.v:\d+: Port connection __pinNumber2 as part of a module instance array requires 1 or 8 bits, but connection's VARREF 'onebitbad' generates 9 bits.
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q{%Error: t/t_inst_array_bad.v:\d+: Input port connection 'onebit' as part of a module instance array requires 1 or 8 bits, but connection's VARREF 'onebitbad' generates 9 bits.
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%Error: Exiting due to.*},
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);
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@ -11,8 +11,8 @@ compile (
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verilator_flags2 => ["--lint-only"],
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fails=>1,
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expect=>
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'%Error: t/t_inst_misarray_bad.v:\d+: Illegal port connection \'foo\', mismatch between port which is not an array, and expression which is an array.
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%Error: Exiting due to.*',
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q{%Error: t/t_inst_misarray_bad.v:\d+: Illegal input port connection 'foo', mismatch between port which is not an array, and expression which is an array.
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%Error: Exiting due to.*},
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);
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@ -16,11 +16,11 @@ compile (
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verilator_make_gcc=>0,
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fails=>$Self->{v3},
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expect=>
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q{%Warning-WIDTH: t/t_inst_overwide.v:\d+: Output port connection outy_w92 expects 92 bits but connection's VARREF 'outc_w30' generates 30 bits.
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q{%Warning-WIDTH: t/t_inst_overwide.v:\d+: Output port connection 'outy_w92' expects 92 bits on the pin connection, but pin connection's VARREF 'outc_w30' generates 30 bits.
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%Warning-WIDTH: Use .* to disable this message.
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%Warning-WIDTH: t/t_inst_overwide.v:\d+: Output port connection outz_w22 expects 22 bits but connection's VARREF 'outd_w73' generates 73 bits.
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%Warning-WIDTH: t/t_inst_overwide.v:\d+: Input port connection inw_w31 expects 31 bits but connection's VARREF 'ina_w1' generates 1 bits.
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%Warning-WIDTH: t/t_inst_overwide.v:\d+: Input port connection inx_w11 expects 11 bits but connection's VARREF 'inb_w61' generates 61 bits.
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%Warning-WIDTH: t/t_inst_overwide.v:\d+: Output port connection 'outz_w22' expects 22 bits on the pin connection, but pin connection's VARREF 'outd_w73' generates 73 bits.
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%Warning-WIDTH: t/t_inst_overwide.v:\d+: Input port connection 'inw_w31' expects 31 bits on the pin connection, but pin connection's VARREF 'ina_w1' generates 1 bits.
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%Warning-WIDTH: t/t_inst_overwide.v:\d+: Input port connection 'inx_w11' expects 11 bits on the pin connection, but pin connection's VARREF 'inb_w61' generates 61 bits.
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%Error: Exiting due to.*},
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);
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@ -3,14 +3,12 @@
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2004 by Wilson Snyder.
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`ifdef VERILATOR
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`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0)
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`else
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`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); end while(0)
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`endif
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`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); fail=1; end while(0)
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module t (/*AUTOARG*/);
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bit fail;
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// IEEE says for ** the size is L(i). Thus Icarus Verilog is wrong in sizing some of the below.
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initial begin
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@ -77,7 +75,8 @@ module t (/*AUTOARG*/);
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`checkh(( 8'sh3 ** -8'sh3), 8'h0 ); // 0 // NCVERILOG bug
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$write("*-* All Finished *-*\n");
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if (fail) $stop;
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else $write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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@ -7,7 +7,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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!$Self->{vcs} or $Self->unsupported("VCS does ** wrong");
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#!$Self->{vcs} or $Self->unsupported("VCS does ** wrong, fixed in 2014");
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compile (
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);
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@ -35,6 +35,8 @@ module t (/*AUTOARG*/);
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reg signed [32:0] bug349_s;
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reg signed [32:0] bug349_u;
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wire signed [1:0] sb11 = 2'sb11;
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wire [3:0] subout_u;
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sub sub (.a(2'sb11), .z(subout_u));
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initial `checkh(subout_u, 4'b1111);
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@ -82,6 +84,11 @@ module t (/*AUTOARG*/);
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default: $stop;
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endcase
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case (sb11)
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4'b1111: ;
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default: $stop;
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endcase
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$write("*-* All Finished *-*\n");
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$finish;
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end
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