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@@ -183,6 +183,7 @@ Keith Colbert
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Kevin Kiningham
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Kevin Nygaard
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Kornel Uriasz
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Kristof Marien
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Kritik Bhimani
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Krzysztof Bieganski
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Krzysztof Boronski
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@@ -961,6 +961,12 @@ class ParamProcessor final {
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} else {
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newModp = srcModp->cloneTree(false);
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}
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// AstPin normally retains links to external module formals across cloning. For a cloned
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// interface, relink pins whose formals were cloned with the interface while clonep() is
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// still valid, so nested parameterized classes use the cloned interface parameters.
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if (AstIface* const newIfacep = VN_CAST(newModp, Iface)) {
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newIfacep->foreach([](AstPin* pinp) { pinp->cloneRelinkGen(); });
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}
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// Mark the source module as a parameterized template now that a specialized
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// clone exists. This suppresses width/type errors on the unresolved template
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+18
@@ -0,0 +1,18 @@
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of either the GNU Lesser General Public License Version 3
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# or the Perl Artistic License Version 2.0.
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# SPDX-FileCopyrightText: 2026 Wilson Snyder
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('vlt_all')
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test.compile()
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test.execute()
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test.passes()
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@@ -0,0 +1,24 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2026 by Verilator Authors.
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// SPDX-FileCopyrightText: 2026 Wilson Snyder
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// SPDX-License-Identifier: CC0-1.0
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// A parameterized class nested in a specialized parameterized interface must
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// produce distinct, well-formed class-package names during C++ emission.
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interface intf #(int P = 1);
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class Cls #(int Q);
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endclass
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Cls #(P) obj;
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endinterface
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module t;
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intf #(2) intf_i();
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initial begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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