luke/verilator
1
0
Fork 0
mirror of https://github.com/verilator/verilator.git synced 2026-10-06 01:54:01 +02:00
Code Issues Packages Projects Releases Wiki Activity

Fix missing implicit net for bufif/notif/nmos/pmos data input (#8353) (#8354)

Browse Source
This commit is contained in:
Mike Murunov
2026-09-14 17:31:51 -04:00
committed by GitHub
parent c65f312d6e
commit 270c528afd
3 changed files with 10 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
docs/CONTRIBUTORS
+1
View File
@@ -229,6 +229,7 @@ Michael Rogenmoser
Michal Czyz
Michaël Lefebvre
Miguel Perez Andrade
Mike Murunov
Mike Popoloski
Miodrag Milanović
Mladen Slijepcevic
src/V3LinkDot.cpp
+2 -1
View File
@@ -2464,8 +2464,9 @@ class LinkDotParamVisitor final : public VNVisitor {
if (AstNode* const refp = nodep->op2p()) pinImplicitExprRecurse(refp);
if (AstNode* const refp = nodep->op3p()) pinImplicitExprRecurse(refp);
if (AstNode* const refp = nodep->op4p()) pinImplicitExprRecurse(refp);
if (AstNode* const refp = nodep->nextp()) pinImplicitExprRecurse(refp);
}
// Continue along a list (e.g. the terminals under AstImplicit), also after a reference
if (AstNode* const refp = nodep->nextp()) pinImplicitExprRecurse(refp);
}
// VISITORS
test_regress/t/t_gate_implicit.v
+7
View File
@@ -78,6 +78,13 @@ module Test (
RWL1,
RWL2_n
);
// Data inputs used only by the gate, with an identifier as the enable (#8353)
bufif0 I4 (n4_out, n4_in, RWL1);
bufif1 I5 (n5_out, n5_in, RWL1);
notif0 I6 (n6_out, n6_in, RWL1);
notif1 I7 (n7_out, n7_in, RWL1);
nmos I8 (n8_out, n8_in, RWL1);
pmos I9 (n9_out, n9_in, RWL1);
// verilator lint_on IMPLICIT
endmodule