Commentary: Changes update
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@ -13,9 +13,9 @@ Verilator 5.043 devel
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**Other:**
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* Add `--unroll-limit` option (#6654) (#6668). [Geza Lore]
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* Add `-fno-inline-funcs-eager` option to disable excessive inlining (#6682). [Geza Lore]
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* Add `-param`/`-port` options to `public_flat*` control directives (#6685). [Geza Lore]
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* Add `--unroll-limit` option (#6654) (#6668). [Geza Lore, Fractile Ltd.]
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* Add `-fno-inline-funcs-eager` option to disable excessive inlining (#6682). [Geza Lore, Fractile Ltd.]
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* Add `-param`/`-port` options to `public_flat*` control directives (#6685). [Geza Lore, Fractile Ltd.]
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* Add `--top` specifying `config` name (#6710). [Dan Ruelas-Petrisko]
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* Add `sc_biguint` pragma (#6712). [Jakub Wasilewski, Antmicro Ltd.]
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* Support `std::randomize(){...}` (#4706) (#6573). [Yilou Wang]
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@ -28,11 +28,11 @@ Verilator 5.043 devel
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* Support general global constraints (#6709) (#6711). [Yilou Wang]
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* Support `config` default liblist (#6714). [Dan Ruelas-Petrisko]
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* Optimize away calls to empty functions (#6626). [Geza Lore]
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* Optimize redundant headers in Syms implementation files. [Geza Lore]
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* Optimize constructor/destructor VerilatedModules (#6660). [Geza Lore]
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* Optimize repeated function call during symbol table initialization (#6665). [Geza Lore]
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* Optimize functions reading external parameters as pure (#6684). [Geza Lore]
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* Optimize $past delayed variable reuse (#6689). [Geza Lore]
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* Optimize redundant headers in Syms implementation files. [Geza Lore, Fractile Ltd.]
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* Optimize constructor/destructor VerilatedModules (#6660). [Geza Lore, Fractile Ltd.]
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* Optimize repeated function call during symbol table initialization (#6665). [Geza Lore, Fractile Ltd.]
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* Optimize functions reading external parameters as pure (#6684). [Geza Lore, Fractile Ltd.]
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* Optimize $past delayed variable reuse (#6689). [Geza Lore, Fractile Ltd.]
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* Fix expression short circuiting (#6483). [Todd Strader]
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* Fix expression coverage of system calls (#6592). [Todd Strader]
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* Fix `--timing` with `--x-initial-edge` (#6603) (#6631). [Krzysztof Bieganski, Antmicro Ltd.]
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@ -41,19 +41,19 @@ Verilator 5.043 devel
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* Fix initial random values for verilator-created variables (#6611). [Todd Strader]
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* Fix parsing of `with` clause inside covergroups (#6618). [Pawel Kojma, Antmicro Ltd.]
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* Fix slice memory overflow on large output arrays (#6636) (#6638). [Jens Yuechao Liu]
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* Fix memory usage statistics on MacOS (#6644). [Geza Lore]
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* Fix command line statistics with --stats (#6645) (#6646). [Geza Lore]
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* Fix slow compilation of generated sampled value code (#6652). [Geza Lore]
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* Fix non-deterministic output when splitting Syms file. [Geza Lore]
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* Fix memory usage statistics on MacOS (#6644). [Geza Lore, Fractile Ltd.]
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* Fix command line statistics with --stats (#6645) (#6646). [Geza Lore, Fractile Ltd.]
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* Fix slow compilation of generated sampled value code (#6652). [Geza Lore, Fractile Ltd.]
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* Fix non-deterministic output when splitting Syms file. [Geza Lore, Fractile Ltd.]
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* Fix crash on DFG driver lookup (#6649). [Geza Lore]
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* Fix ccache-report with PCH files. [Geza Lore]
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* Fix ccache-report with PCH files. [Geza Lore, Fractile Ltd.]
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* Fix local interface parameter hierarchical access (#6661) (#6666). [Paul Swirhun]
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* Fix splitting of Syms constructor/destructor bodies (#6662). [Geza Lore]
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* Fix long C++ compilation due to VerilatedScope constructors (#6664). [Geza Lore]
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* Fix splitting of Syms constructor/destructor bodies (#6662). [Geza Lore, Fractile Ltd.]
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* Fix long C++ compilation due to VerilatedScope constructors (#6664). [Geza Lore, Fractile Ltd.]
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* Fix large array initialization (#6669). [Artur Bieniek, Antmicro Ltd.]
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* Fix --expand-limit not respected for expressions (#6670). [Geza Lore]
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* Fix --expand-limit not respected for expressions (#6670). [Geza Lore, Fractile Ltd.]
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* Fix `free` name collision (#6675). [Todd Strader]
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* Fix bounds checking in non-inlined function (#6677). [Geza Lore]
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* Fix bounds checking in non-inlined function (#6677). [Geza Lore, Fractile Ltd.]
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* Fix stream operator widening (#6693) (#6697). [Jean-Nicolas Strauss]
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* Fix deleting linked node error in V3Randomize (#6718). [Igor Zaworski, Antmicro Ltd.]
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@ -28,9 +28,9 @@ Alliance <https://chipsalliance.org>`_, and `Antmicro Ltd
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Previous major corporate sponsors of Verilator, by providing significant
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contributions of time or funds include: Antmicro Ltd., Atmel Corporation,
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Compaq Corporation, Digital Equipment Corporation, Embecosm Ltd., Hicamp
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Systems, Intel Corporation, Marvell Inc., Mindspeed Technologies Inc.,
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MicroTune Inc., picoChip Designs Ltd., Sun Microsystems Inc., Nauticus
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Compaq Corporation, Digital Equipment Corporation, Embecosm Ltd., Fractile
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Ltd., Hicamp Systems, Intel Corporation, Marvell Inc., Mindspeed Technologies
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Inc., MicroTune Inc., picoChip Designs Ltd., Sun Microsystems Inc., Nauticus
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Networks Inc., SiCortex Inc, Shunyao CAD, and Western Digital Inc.
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The contributors of major functionality are: Jeremy Bennett, Krzysztof
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@ -124,6 +124,7 @@ Florian
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Foletto
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Forencich
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Forker
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Fractile
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Francillon
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Fredieu
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Freiberger
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