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Internals: Parse ++/-- in statement position as AstStmtExpr (#6280) (#6510) 

Small step towards #6280. No functional change.
This commit is contained in:
Geza Lore 2025-09-29 21:01:40 +02:00 committed by GitHub
parent 09518ee207
commit 202a53f4f6
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2 changed files with 16 additions and 2 deletions
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14
src/V3LinkInc.cpp
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@ -173,6 +173,20 @@ class LinkIncVisitor final : public VNVisitor {
iterateChildren(nodep);
m_insStmtp = nullptr; // Next thing should be new statement
}
void visit(AstStmtExpr* nodep) override {
AstNodeExpr* const exprp = nodep->exprp();
if (VN_IS(exprp, PostAdd) || VN_IS(exprp, PostSub) || VN_IS(exprp, PreAdd)
|| VN_IS(exprp, PreSub)) {
// Repalce this StmtExpr with the expression, visiting it will turn it into a NodeStmt
nodep->replaceWith(exprp->unlinkFrBack());
VL_DO_DANGLING(pushDeletep(nodep), nodep);
m_insStmtp = nullptr;
iterate(exprp);
m_insStmtp = nullptr;
return;
}
visit(static_cast<AstNodeStmt*>(nodep));
}
void visit(AstNodeStmt* nodep) override {
m_insStmtp = nodep;
iterateChildren(nodep);

4
src/verilog.y
View File

@ -3493,7 +3493,7 @@ statement_item<nodep>: // IEEE: statement_item
| fexprLvalue yP_EQ__NEW dynamic_array_new ';' { $$ = new AstAssign{$2, $1, $3}; }
| fexprLvalue yP_EQ__NEW class_new ';' { $$ = new AstAssign{$2, $1, $3}; }
// // IEEE: inc_or_dec_expression
| finc_or_dec_expression ';' { $$ = $1; }
| finc_or_dec_expression ';' { $$ = new AstStmtExpr{$<fl>1, $1}; }
//
// // IEEE: nonblocking_assignment
| fexprLvalue yP_LTE delay_or_event_controlE expr ';'
@ -4001,7 +4001,7 @@ for_step<nodep>: // IEEE: for_step
for_step_assignment<nodep>: // ==IEEE: for_step_assignment
foperator_assignment { $$ = $1; }
| finc_or_dec_expression { $$ = $1; }
| finc_or_dec_expression { $$ = new AstStmtExpr{$<fl>1, $1}; }
// // IEEE: function_subroutine_call
| task_subroutine_callNoSemi { $$ = $1; }
;