26 lines
445 B
Plaintext
26 lines
445 B
Plaintext
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$version Generated by VerilatedVcd $end
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$timescale 1ps $end
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$scope module top $end
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$var wire 1 " clk $end
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$scope module $unit $end
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$upscope $end
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$scope module t $end
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$var wire 1 " clk $end
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$var wire 2 # v_enumed [1:0] $end
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$var wire 2 $ v_other_enumed [1:0] $end
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$scope module sink $end
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$var wire 2 % state [1:0] $end
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$upscope $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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0"
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b00 #
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b00 $
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b00 %
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#10
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1"
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