6 lines
266 B
Plaintext
6 lines
266 B
Plaintext
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%Error: t/t_lint_wireloop.v:9:12: Wire inputs its own output, creating circular logic (wire x=x)
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9 | assign w = w;
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| ^
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... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
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%Error: Exiting due to
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