verilator/test_regress/t/t_interface_top_bad.out

%Error: t/t_interface_top_bad.v:17:19: Unsupported: Interfaced port on top level module
   17 |    ifc.counter_mp c_data
      |                   ^~~~~~
%Error: t/t_interface_top_bad.v:17:4: Parent cell's interface is not found: 'ifc'
   17 |    ifc.counter_mp c_data
      |    ^~~
%Error: Exiting due to
Add SPDX license identifiers. No functional change. 2020-03-21 16:24:24 +01:00			`%Error: t/t_interface_top_bad.v:17:19: Unsupported: Interfaced port on top level module`
Add GCC10-style line number prefix when showing source text for errors. 2020-04-04 02:07:46 +02:00			`17 \| ifc.counter_mp c_data`
			`\| ^~~~~~`
Add SPDX license identifiers. No functional change. 2020-03-21 16:24:24 +01:00			`%Error: t/t_interface_top_bad.v:17:4: Parent cell's interface is not found: 'ifc'`
Add GCC10-style line number prefix when showing source text for errors. 2020-04-04 02:07:46 +02:00			`17 \| ifc.counter_mp c_data`
			`\| ^~~`
Tests: Add additional .out files instead of expects. 2019-06-13 03:49:40 +02:00			`%Error: Exiting due to`