mirror of https://github.com/zachjs/sv2v.git
27 lines
822 B
Haskell
27 lines
822 B
Haskell
{- sv2v
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- Author: Zachary Snow <zach@zachjs.com>
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-
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- Conversion which makes function `logic` and `reg` return types implicit
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-
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- Verilog-2005 restricts function return types to `integer`, `real`,
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- `realtime`, `time`, and implicit signed/dimensioned types.
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-}
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module Convert.FuncRet (convert) where
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import Convert.Traverse
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import Language.SystemVerilog.AST
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convert :: [AST] -> [AST]
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convert = map $ traverseDescriptions $ traverseModuleItems convertFunction
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convertFunction :: ModuleItem -> ModuleItem
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convertFunction (MIPackageItem (Function ml t f decls stmts)) =
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MIPackageItem $ Function ml t' f decls stmts
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where
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t' = case t of
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IntegerVector TReg sg rs -> Implicit sg rs
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IntegerVector TLogic sg rs -> Implicit sg rs
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_ -> t
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convertFunction other = other
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