Files
sv2v/test/basic/interface_module.v
T
Zachary Snow 67466eaa60 major interface conversion update
- module instances with modport bindings are now inlined
- support for modports in generate loops
- support for generic interfaces
- implied modport instance propagation
- add error message for interface instances missing port list
2020-08-08 20:43:47 -06:00

13 lines
211 B
Verilog

module ModuleC;
wire y;
assign y = 1;
initial $display("ModuleB %b", y);
wire x;
assign x = 0;
initial $display("ModuleA %b", x);
endmodule
module top;
ModuleC module_c();
endmodule