mirror of https://github.com/zachjs/sv2v.git
17 lines
399 B
Systemverilog
17 lines
399 B
Systemverilog
module top;
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function log_imp;
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input integer a;
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input integer b;
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return a -> b;
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endfunction
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function log_eq;
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input integer a;
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input integer b;
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return a <-> b;
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endfunction
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initial
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for (integer a = -2; a <= 2; a++)
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for (integer b = -2; b <= 2; b++)
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$display(log_imp(a, b), log_eq(a, b));
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endmodule
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