5 Commits

Author	SHA1	Message	Date
Zachary Snow	383754fa7a	final major round of splitting and cleanup in the SystemVerilog module	2019-04-03 20:24:09 -04:00
Zachary Snow	d578aee5d9	conflate the preprocessor and lexer ... This should make it much easier to add support for ``, `", macros with arguments, etc., in the future.	2019-03-29 05:33:17 -04:00
Zachary Snow	0d9ed3e1fa	updated CLI to support include dirs and multiple files	2019-03-28 19:55:53 -04:00
Zachary Snow	acfbdb07f8	completely rewrote preprocessor; more extensive directive support (include, timescale)	2019-03-18 05:00:23 -04:00
Zachary Snow	7bc81ef67b	directory re-org; streamline build setup	2019-02-28 13:52:31 -05:00