mirror of https://github.com/zachjs/sv2v.git
support size casts with complex size expressions
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1584f39045
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@ -49,9 +49,12 @@ traverseExprM = traverseNestedExprsM $ stately convertExpr
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convertExpr :: Info -> Expr -> Expr
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convertExpr info (Cast (Right c) e) =
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if sized == e
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then Cast (Right c') e
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else sized
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case c' of
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Number _ ->
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if sized == e
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then Cast (Right c') e
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else sized
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_ -> Cast (Right c') e
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where
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c' = simplify $ traverseNestedExprs (substitute info) (simplify c)
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sized = sizedExpr "" c' e
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@ -15,7 +15,7 @@ import Convert.Traverse
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import Language.SystemVerilog.AST
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type TypeMap = Map.Map Identifier Type
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type CastSet = Set.Set (Int, Signing)
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type CastSet = Set.Set (Expr, Signing)
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type ST = StateT TypeMap (Writer CastSet)
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@ -58,38 +58,42 @@ traverseExprM =
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traverseNestedExprsM convertExprM
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where
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convertExprM :: Expr -> ST Expr
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convertExprM (Cast (Right (Number n)) e) = do
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convertExprM (Cast (Right s) e) = do
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typeMap <- get
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case (readNumber n, exprSigning typeMap e) of
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(Just size, Just sg) -> do
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lift $ tell $ Set.singleton (size, sg)
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let f = castFnName size sg
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case exprSigning typeMap e of
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Just sg -> do
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lift $ tell $ Set.singleton (s, sg)
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let f = castFnName s sg
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let args = Args [Just e] []
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return $ Call Nothing f args
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_ -> return $ Cast (Right $ Number n) e
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_ -> return $ Cast (Right s) e
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convertExprM other = return other
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castFn :: Int -> Signing -> Description
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castFn n sg =
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castFn :: Expr -> Signing -> Description
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castFn e sg =
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PackageItem $
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Function (Just Automatic) t fnName [decl] [Return $ Ident inp]
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where
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inp = "inp"
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r = (Number $ show (n - 1), Number "0")
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r = (BinOp Sub e (Number "1"), Number "0")
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t = IntegerVector TLogic sg [r]
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fnName = castFnName n sg
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fnName = castFnName e sg
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decl = Variable Input t inp [] Nothing
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castFnName :: Int -> Signing -> String
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castFnName n sg =
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if n <= 0
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then error $ "cannot have non-positive size cast: " ++ show n
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else
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if sg == Unspecified
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then init name
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else name
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where name = "sv2v_cast_" ++ show n ++ "_" ++ show sg
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castFnName :: Expr -> Signing -> String
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castFnName e sg =
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if sg == Unspecified
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then init name
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else name
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where
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sizeStr = case e of
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Number n ->
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case readNumber n of
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Just v -> show v
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_ -> shortHash e
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_ -> shortHash e
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name = "sv2v_cast_" ++ sizeStr ++ "_" ++ show sg
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exprSigning :: TypeMap -> Expr -> Maybe Signing
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exprSigning typeMap (Ident x) =
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@ -1,4 +1,5 @@
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module top;
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parameter WIDTH = 32;
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initial begin
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logic [31:0] w = 1234;
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int x = -235;
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@ -16,6 +17,10 @@ module top;
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$display("%b %b", x, 40'(x));
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$display("%b %b", y, 40'(y));
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$display("%b %b", z, 40'(z));
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$display("%0d %0d", w, ($clog2(WIDTH))'(w));
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$display("%0d %0d", x, ($clog2(WIDTH))'(x));
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$display("%0d %0d", y, ($clog2(WIDTH))'(y));
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$display("%0d %0d", z, ($clog2(WIDTH))'(z));
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end
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localparam bit foo = '0;
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localparam logic [31:0] bar = 32'(foo);
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@ -20,6 +20,10 @@ module top;
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$display("%b %b", x, {8'hFF, x});
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$display("%b %b", y, {8'b0, y});
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$display("%b %b", z, {35'b0, z});
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$display("%0d %0d", w, w[4:0]);
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$display("%0d %0d", x, $signed(x[4:0]));
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$display("%0d %0d", y, $signed(y[4:0]));
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$display("%0d %0d", z, z[4:0]);
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end
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localparam [0:0] foo = 0;
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localparam [31:0] bar = 32'b0;
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