allow empty list_of_parameter_assignments

2020-03-30 19:27:44 -04:00 · 2020-03-30 19:27:44 -04:00 · bcafef8d01
parent 279a19ab9d
commit bcafef8d01
1 changed files with 2 additions and 1 deletions
--- a/src/Language/SystemVerilog/Parser/Parse.y
+++ b/src/Language/SystemVerilog/Parser/Parse.y
@ -942,7 +942,8 @@ PortBinding :: { PortBinding }
  | ".*"                             { ("*", Nothing) }

 ParamBindings :: { [ParamBinding] }
-  : "#" "(" ParamBindingsInside ")" { $3 }
+  : "#" "("                     ")" { [] }
+  | "#" "(" ParamBindingsInside ")" { $3 }
 ParamBindingsInside :: { [ParamBinding] }
  : ParamBinding                         { [$1] }
  | ParamBinding "," ParamBindingsInside { $1 : $3}