allow .* as element of partial port bindings

src/Convert/Interface.hs

@@ -73,12 +73,12 @@ convertDescription interfaces (Part Module name ports items) =
                 mapper = \(dir, port, Just expr) ->
                     Variable dir (lookupType interfaceItems expr)
                     (ident ++ "_" ++ port) [] Nothing
-        mapInterface (Instance part params ident (Just instancePorts)) =
+        mapInterface (Instance part params ident instancePorts) =
             case Map.lookup part interfaces of
                 Just interface ->
                     Generate $ map GenModuleItem $
                     inlineInterface interface (ident, expandedPorts)
-                Nothing -> Instance part params ident (Just expandedPorts)
+                Nothing -> Instance part params ident expandedPorts
             where expandedPorts = concatMap expandPortBinding instancePorts
         mapInterface other = other
 

src/Convert/StarPort.hs

@@ -22,11 +22,18 @@ convert descriptions =
         getPorts _ = return ()
 
         mapInstance :: ModuleItem -> ModuleItem
-        mapInstance (Instance m p x Nothing) =
-            Instance m p x (Just portBindings)
+        mapInstance (Instance m p x bindings) =
+            Instance m p x $ concatMap expandBinding bindings
             where
-                ports = case Map.lookup m modulePorts of
-                    Nothing -> error $ "could not convert `.*` in instantiation of " ++ m
-                    Just l -> l
-                portBindings = map (\port -> (port, Just $ Ident port)) ports
+                alreadyBound :: [Identifier]
+                alreadyBound = map fst bindings
+                expandBinding :: PortBinding -> [PortBinding]
+                expandBinding ("*", Nothing) =
+                    case Map.lookup m modulePorts of
+                        Just l ->
+                            map (\port -> (port, Just $ Ident port)) $
+                            filter (\s -> not $ elem s alreadyBound) $ l
+                        -- if we can't find it, just skip :(
+                        Nothing -> [("*", Nothing)]
+                expandBinding other = [other]
         mapInstance other = other

src/Convert/Traverse.hs

@@ -45,7 +45,6 @@ module Convert.Traverse
 , traverseNestedStmts
 ) where
 
-import Data.Maybe (fromJust)
 import Control.Monad.State
 import Language.SystemVerilog.AST
 
@@ -302,12 +301,9 @@ traverseExprsM mapper = moduleItemMapper
         decls' <- mapM declMapper decls
         stmts' <- mapM stmtMapper stmts
         return $ MIPackageItem $ Task lifetime f decls' stmts'
-    moduleItemMapper (Instance m params x ml) = do
-        if ml == Nothing
-            then return $ Instance m params x Nothing
-            else do
-                l <- mapM portBindingMapper (fromJust ml)
-                return $ Instance m params x (Just l)
+    moduleItemMapper (Instance m params x l) = do
+        l' <- mapM portBindingMapper l
+        return $ Instance m params x l'
     moduleItemMapper (Modport x l) =
         mapM modportDeclMapper l >>= return . Modport x
     moduleItemMapper (Genvar   x) = return $ Genvar   x

src/Language/SystemVerilog/AST.hs

@@ -177,7 +177,7 @@ data ModuleItem
   = MIDecl     Decl
   | AlwaysC    AlwaysKW Stmt
   | Assign     LHS Expr
-  | Instance   Identifier [PortBinding] Identifier (Maybe [PortBinding]) -- `Nothing` represents `.*`
+  | Instance   Identifier [PortBinding] Identifier [PortBinding]
   | Genvar     Identifier
   | Generate   [GenItem]
   | Modport    Identifier [ModportDecl]
@@ -207,18 +207,18 @@ instance Show ModuleItem where
     AlwaysC    k b   -> printf "%s %s" (show k) (show b)
     Assign     a b   -> printf "assign %s = %s;" (show a) (show b)
     Instance   m params i ports
-      | null params -> printf "%s %s%s;"     m                    i (showMaybePorts ports)
-      | otherwise   -> printf "%s #%s %s%s;" m (showPorts params) i (showMaybePorts ports)
+      | null params -> printf "%s %s%s;"     m                    i (showPorts ports)
+      | otherwise   -> printf "%s #%s %s%s;" m (showPorts params) i (showPorts ports)
     Genvar     x -> printf "genvar %s;" x
     Generate   b -> printf "generate\n%s\nendgenerate" (indent $ unlines' $ map show b)
     Modport    x l   -> printf "modport %s(\n%s\n);" x (indent $ intercalate ",\n" $ map showModportDecl l)
     Initial    s     -> printf "initial %s" (show s)
     MIPackageItem i  -> show i
     where
-    showMaybePorts = maybe "(.*)" showPorts
     showPorts :: [PortBinding] -> String
     showPorts ports = indentedParenList $ map showPort ports
     showPort :: PortBinding -> String
+    showPort ("*", Nothing) = ".*"
     showPort (i, arg) =
       if i == ""
         then show (fromJust arg)

src/Language/SystemVerilog/Parser/Parse.y

@@ -344,9 +344,8 @@ Lifetime :: { Lifetime }
   : "static"    { Static    }
   | "automatic" { Automatic }
 
-ModuleInstantiation :: { (Identifier, Maybe [PortBinding]) }
-  : Identifier "(" Bindings ")" { ($1, Just $3) }
-  | Identifier "(" ".*"     ")" { ($1, Nothing) }
+ModuleInstantiation :: { (Identifier, [PortBinding]) }
+  : Identifier "(" Bindings ")" { ($1, $3) }
 
 TFItems :: { [Decl] }
   : "(" DeclTokens(")") ";" { parseDTsAsDecls $2 }
@@ -396,6 +395,7 @@ Binding :: { (Identifier, Maybe Expr) }
   : "." Identifier "(" opt(Expr) ")" { ($2, $4) }
   | "." Identifier                   { ($2, Just $ Ident $2) }
   | Expr                             { ("", Just $1) }
+  | ".*"                             { ("*", Nothing) }
 
 ParameterBindings :: { [(Identifier, Maybe Expr)] }
   : "#" "(" BindingsNonEmpty ")" { $3 }

src/Language/SystemVerilog/Parser/ParseDecl.hs

@@ -53,7 +53,7 @@ data DeclToken
     | DTDir      Direction
     | DTType     ([Range] -> Type)
     | DTParams   [PortBinding]
-    | DTInstance (Identifier, Maybe [PortBinding])
+    | DTInstance (Identifier, [PortBinding])
     | DTBit      Expr
     | DTConcat   [LHS]
     deriving (Show, Eq)