conversion for always_latch (resolves #54)

This commit is contained in:
Zachary Snow 2019-11-18 19:25:09 -05:00
parent ec0eecb556
commit 49e4f7872d
4 changed files with 46 additions and 1 deletions

View File

@ -1,8 +1,9 @@
{- sv2v
- Author: Zachary Snow <zach@zachjs.com>
-
- Conversion for `always_comb` and `always_ff`
- Conversion for `always_latch`, `always_comb`, and `always_ff`
-
- `always_latch` -> `always @*`
- `always_comb` -> `always @*`
- `always_ff` -> `always`
-}
@ -16,6 +17,8 @@ convert :: [AST] -> [AST]
convert = map $ traverseDescriptions $ traverseModuleItems replaceAlwaysKW
replaceAlwaysKW :: ModuleItem -> ModuleItem
replaceAlwaysKW (AlwaysC AlwaysLatch stmt) =
AlwaysC Always $ Timing (Event SenseStar) stmt
replaceAlwaysKW (AlwaysC AlwaysComb stmt) =
AlwaysC Always $ Timing (Event SenseStar) stmt
replaceAlwaysKW (AlwaysC AlwaysFF stmt) =

View File

@ -0,0 +1,10 @@
module test(a, b, en);
output logic a;
input logic b;
input logic en;
always_latch begin
if (en) begin
a <= b;
end
end
endmodule

10
test/basic/always_latch.v Normal file
View File

@ -0,0 +1,10 @@
module test(a, b, en);
output reg a;
input wire b;
input wire en;
always @(*) begin
if (en) begin
a <= b;
end
end
endmodule

View File

@ -0,0 +1,22 @@
module top;
wire a;
reg b;
reg en;
initial begin
en = 1;
forever #1 en = ~en;
end
test m(.a, .b, .en);
initial begin
$monitor($time, a, b, en);
#1; b = 1;
#1; b = 0;
#1; b = 0;
#1; b = 1;
#1; b = 0;
$finish;
end
endmodule