2019-04-24 20:00:08 +02:00
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{- sv2v
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- Author: Zachary Snow <zach@zachjs.com>
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-
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2019-05-10 16:41:31 +02:00
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- Conversion for `bit`, `int`, `shortint`, `longint`, and `byte`
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2019-04-24 20:00:08 +02:00
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-}
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module Convert.IntTypes (convert) where
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import Convert.Traverse
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import Language.SystemVerilog.AST
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convert :: [AST] -> [AST]
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convert =
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map $
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traverseDescriptions $
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traverseModuleItems $
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traverseTypes convertType
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convertType :: Type -> Type
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2019-10-01 05:59:15 +02:00
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convertType (IntegerAtom kw sg) = elaborateIntegerAtom $ IntegerAtom kw sg
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2019-05-10 16:41:31 +02:00
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convertType (IntegerVector TBit sg rs) = IntegerVector TLogic sg rs
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2019-04-24 20:00:08 +02:00
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convertType other = other
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