prjxray/fuzzers/012-clbn5ffmux
John McMaster 193afc64e8 012-clbn5ffmux: fix/simplify generate.sh
Signed-off-by: John McMaster <johndmcmaster@gmail.com>
2018-11-07 14:48:14 -08:00
..
.gitignore fuzzers: consolidate build scripts, move products to build dir 2018-11-07 14:28:31 -08:00
Makefile fuzzers: consolidate build scripts, move products to build dir 2018-11-07 14:28:31 -08:00
README.md Added tags for headers, subheaders and structured README files a bit 2018-02-14 12:24:18 +01:00
generate.py Make Segmaker db_root be implicit. 2018-10-22 12:04:55 -07:00
generate.sh 012-clbn5ffmux: fix/simplify generate.sh 2018-11-07 14:48:14 -08:00
generate.tcl fuzzers: don't use EXCLUDE_PLACEMENT on ROI 2018-10-31 17:53:42 -07:00
top.py fuzzers: replace inline verilog with top_harnesS() 2018-10-23 14:27:08 -07:00

README.md

CLBn5FFMUX Fuzzer

Purpose

Document A5FFMUX family of CLB muxes

Algorithm

5FFMUX
Inputs can come from either the LUT6_2 NO5 output or the CLB NX input
To perturb the CLB the smallest, want LUT6 always instantiated
However, some routing congestion that would require putting FFs in bypass
(which turns out is actually okay, but didn't realize that at the time)
Decided instead ot instantiate LUT8, but not use the output
Turns out this is okay and won't optimize things away
So then, the 5FF D input is switched between the O5 output and an external CLB input

Outcome

Bits are one hot encoded per mux position