mirror of https://github.com/openXC7/prjxray.git
73 lines
1.6 KiB
Markdown
73 lines
1.6 KiB
Markdown
Some quick tests to understand BRAM configuration
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Written before segments were fully developed, so this preliminary writeup is a bit coarse
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Basically all the RAMB36 configuration tests show two bit flips
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This indicates that RAMB18 and RAMB36 are fully indepdnently configurable
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SDP vs TDP was a lot more complicated, needs more investigation
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Note: tested on a7 after sourcing env.sh. k7 would likely also work
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Raw data
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set_property LOC RAMB36_X0Y21 [get_cells ram]
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design_CLKARDCLK_INV.bits
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< bit_0002031b_013_11
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< bit_0002031b_016_21
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design_CLKBWRCLK_INV.bits
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< bit_0002031b_013_13
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< bit_0002031b_016_19
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design_CLKARDCLK_INV.bits
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< bit_0002031b_013_11
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< bit_0002031b_016_21
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design_CLKBWRCLK_INV.bits
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< bit_0002031b_013_13
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< bit_0002031b_016_19
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design_ENARDEN_INV.bits
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< bit_0002031b_013_16
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< bit_0002031b_016_16
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design_ENBWREN_INV.bits
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< bit_0002031b_013_19
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< bit_0002031b_016_13
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design_RSTRAMARSTRAM_INV.bits
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< bit_0002031b_013_20
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< bit_0002031b_016_12
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design_RSTRAMB_INV.bits
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< bit_0002031b_013_21
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< bit_0002031b_016_11
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design_RSTREGARSTREG_INV.bits
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< bit_0002031b_013_24
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< bit_0002031b_016_08
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design_RSTREGB_INV.bits
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< bit_0002031b_013_27
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< bit_0002031b_016_05
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design_WRITE_MODE_A_NC.bits
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> bit_0002031b_012_00
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> bit_0002031b_018_00
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design_WRITE_MODE_A_RF.bits
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> bit_0002031b_011_24
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> bit_0002031b_018_08
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TDP vs SDP probably does routing changes, leading to a lot of bit flips
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design_RAM_MODE_SDP.bits
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> bit_00020282_010_05
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> bit_00020284_010_06
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< bit_00020289_010_04
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< bit_0002028f_010_04
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> bit_00020300_014_11
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< bit_00020300_016_27
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> bit_00020300_016_25
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...etc
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