prjxray/minitests/roi_harness
Lukasz Dalek ef9226e969 roi_harness: Add ARTY-A7-UART configuration
Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
2019-03-13 17:13:18 +01:00
..
.gitignore roi_harness: basys3 small ROI. Simplified build dir 2018-10-01 15:53:12 -07:00
Makefile Fixup clean target. 2018-10-30 15:06:19 -07:00
README.md Fixed Bullet Point Lists in README.md files 2018-02-18 03:02:33 +01:00
arty.sh roi_harness: Add ARTY-A7-UART configuration 2019-03-13 17:13:18 +01:00
basys3.sh roi_harness: adding env variables for INT_LR tiles and PIPs 2019-02-05 12:40:37 +01:00
create_design_json.py Output required_features as a list rather than a string with newlines. 2019-02-21 15:40:07 -08:00
demo_sw_led.py roi_harness: add README info, chmod +x 2018-01-30 14:50:13 -08:00
demo_sw_led_fasm.py roi_harness: add README info, chmod +x 2018-01-30 14:50:13 -08:00
fasm2bit.sh Fix comments. 2018-10-22 11:20:03 -07:00
roi_base.v roi_harness: basys3 support, separate top.v into harness and ROI .v files 2018-01-18 18:05:36 -08:00
roi_demoscene.v bassy3 LED demos 2018-01-29 12:04:29 -08:00
roi_inv.v roi_harness: inverted LED/switch example 2018-01-18 19:12:38 -08:00
runme.sh Format harness JSON file. 2019-02-20 11:45:03 -08:00
runme.tcl roi_harness: Add ARTY-A7-UART configuration 2019-03-13 17:13:18 +01:00
test_demo_sw_led.py roi_harness: add README info, chmod +x 2018-01-30 14:50:13 -08:00
top.v roi_harness: remove top.v test 2018-01-19 14:09:24 -08:00
zybo.sh zybo: Fix Zybq Zynq-7 roi_harness 2019-03-12 09:48:06 +01:00

README.md

ROI_HARNESS Minitest

Purpose

Creates an ROI with clk, inputs, and outputs to use as a partial reconfiguration test harness

Basic idea:

  • LOC LUTs in the ROI to terminate input and output routing
  • Let Vivado LOC the rest of the logic
  • Manually route signals in and out of the ROI enough to avoid routing loops into the ROI
  • Let Vivado finish the rest of the routes

There is no logic outside of the ROI in order to keep IOB to ROI delays short
Its expected the end user will rip out everything inside the ROI

To target Arty A7 you should source the artix DB environment script then source arty.sh

To build the baseline harness:

./runme.sh

To build a sample Vivado design using the harness:

XRAY_ROIV=roi_inv.v XRAY_FIXED_XDC=out_xc7a35tcpg236-1_BASYS3-SWBUT_roi_basev/fixed_noclk.xdc ./runme.sh

Note: this was intended for verification only and not as an end user flow (they should use SymbiFlow)

To use the harness for the basys3 demo, do something like:

python3 demo_sw_led.py out_xc7a35tcpg236-1_BASYS3-SWBUT_roi_basev 3 2

This example connects switch 3 to LED 2

Result