prjxray/fuzzers/018-clbram
Davide 73b1e27f78 Added tags for headers, subheaders and structured README files a bit
Signed-off-by: Davide <davide.toldo@stud.tu-darmstadt.de>
2018-02-14 12:24:18 +01:00
..
.gitignore clbram fuzzer main bits. Some disabled due to automated ambiguity 2017-12-20 22:46:39 +01:00
Makefile Add "make run" to fuzzers that did not have it yet 2018-01-04 13:49:50 +01:00
README.md Added tags for headers, subheaders and structured README files a bit 2018-02-14 12:24:18 +01:00
generate.py Reformat existing Python files with yapf 2018-01-09 14:50:06 -08:00
generate.sh fuzzers: use env vars to refer to tools (continued) 2017-12-20 22:46:39 +01:00
generate.tcl Set tcl.collectionResultDisplayLimit to unlimited in all fuzzers 2017-12-22 23:28:39 +01:00
top.py Reformat existing Python files with yapf 2018-01-09 14:50:06 -08:00

README.md

CLBRAM Fuzzer

Purpose

Solves SLICEM specific bits:
-Shift register LUT (SRL)
-Memory size
-RAM vs LUT
-Related muxes

Algorithm

Outcome

CLB.SLICE_X0.ALUT.RAM 31_16
CLB.SLICE_X0.ALUT.SMALL 00_04
CLB.SLICE_X0.ALUT.SRL 30_16
CLB.SLICE_X0.BLUT.RAM 31_17
CLB.SLICE_X0.BLUT.SMALL 00_24
CLB.SLICE_X0.BLUT.SRL 30_17
CLB.SLICE_X0.CLUT.RAM 31_46
CLB.SLICE_X0.CLUT.SMALL 00_28
CLB.SLICE_X0.CLUT.SRL 30_46
CLB.SLICE_X0.DLUT.RAM 31_47
CLB.SLICE_X0.DLUT.SMALL 01_59
CLB.SLICE_X0.DLUT.SRL 30_47
CLB.SLICE_X0.WA7USED 00_40
CLB.SLICE_X0.WA8USED 01_27
CLB.SLICE_X0.WEMUX.CE 01_23