prjxray/fuzzers/018-clb-ram
Keith Rothman 5ad24eb6cd Make 018 more robust by selectively disabling inputs and outputs.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2020-09-25 12:59:57 -07:00
..
minitest Add licensing header to Makefiles 2020-05-26 07:33:12 -07:00
Makefile Add some determinism to the randomness in 018. 2020-09-11 10:51:21 -07:00
README.md docs: Fix top level headers and other small clean. 2019-04-03 19:26:28 -07:00
generate.py Add licensing header to fuzzers' python scripts 2020-05-26 07:33:12 -07:00
generate.sh Add licensing header to bash scripts 2020-05-26 07:33:12 -07:00
generate.tcl Add license headers to tcl files 2020-05-26 07:33:12 -07:00
top.py Make 018 more robust by selectively disabling inputs and outputs. 2020-09-25 12:59:57 -07:00

README.md

clb-ram Fuzzer

Primitive RAM SMALL SRL
LUT6
SRL16E X X
SRLC32E X
RAM32X1S X X
RAM64X1S X
RAM32M X X
RAM32X1D X X
RAM64M X
RAM64X1D X
RAM128X1D X
RAM256X1S X
RAM128X1S X

NLUT.RAM

Set to make a RAM* family primitive, otherwise is a SRL or LUT function generator.

NLUT.SMALL

Seems to be set on smaller primitives.

NLUT.SRL

Whether to make a shift register LUT (SRL). Set when using SRL16E or SRLC32E

WA7USED

Set to 1 to propagate CLB's CX input to WA7

WA8USED

Set to 1 to propagate CLB's BX input to WA8

WEMUX.CE

WEMUX.CE CLB RAM write enable
0 CLB WE input
1 CLB CE input