History

Tomasz Michalak 159d6a8e88 Add licensing header to Makefiles Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com> Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>		2020-05-26 07:33:12 -07:00
..
.gitignore	minitest: clean up folders	2019-01-07 23:31:44 +01:00
Makefile	Add licensing header to Makefiles	2020-05-26 07:33:12 -07:00
README.md	MAKE - Format Trailing Whitespace	2019-10-26 10:04:52 +01:00
top.v	minitest: clean up folders	2019-01-07 23:31:44 +01:00

README.md

CLB_RAM Minitest

Purpose

SLICEM RAM test LUT6 => 64 bits Focus on 64 bit 32 probably uses same O5/O6 stuff 128 probably uses same MUX stuff Why isn't there a 256?

Result

RAM128X1D 128-Deep by 1-Wide Dual Port Random Access Memory (Select RAM)
RAM128X1S 128-Deep by 1-Wide Random Access Memory (Select RAM)
RAM256X1S 256-Deep by 1-Wide Random Access Memory (Select RAM)
RAM32M 32-Deep by 8-bit Wide Multi Port Random Access Memory (Select RAM)
RAM32X1D 32-Deep by 1-Wide Static Dual Port Synchronous RAM
RAM32X1S 32-Deep by 1-Wide Static Synchronous RAM
RAM32X1S_1 32-Deep by 1-Wide Static Synchronous RAM with Negative-Edge Clock
RAM32X2S 32-Deep by 2-Wide Static Synchronous RAM

RAM64M 64-Deep by 4-bit Wide Multi Port Random Access Memory (Select RAM)
RAM64X1D 64-Deep by 1-Wide Dual Port Static Synchronous RAM
RAM64X1S 64-Deep by 1-Wide Static Synchronous RAM
RAM64X1S_1 64-Deep by 1-Wide Static Synchronous RAM with Negative-Edge Clock