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prjxray
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912 Commits

Author SHA1 Message Date
Tomasz Michalak 86057f3d17 018-clb-ram: Increase specimen count 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-24 08:05:41 +02:00
Tomasz Michalak 11f5a37a06 050-pip-seed: Increase specimen count 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-23 20:49:14 +02:00
Tomasz Michalak 58baff4f4a fuzzers: Add clean_piplists target 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-23 15:19:16 +02:00
Karol Gugala 683b7562e5 fuzzer: 007: bel: handle multiple bit inputs 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-05-16 19:14:35 +02:00
Karol Gugala e1440a56b4 fuzzers: 007: add properties names mappings 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-05-16 14:52:58 +02:00
Karol Gugala 788e3e0855 fuzzers: 007: correctly handle input clocks and extended pin names 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-05-14 17:34:07 -07:00
Tomasz Michalak e7ce84abbe
Merge pull request #822 from antmicro/prjxray_stabilization_045_hclk_cmt_pips 
045-hclk-cmt-pips: account for hclk_cmt tiles missing from zynq7 and …
 2019-05-14 11:52:47 +02:00
Tomasz Michalak c4e062fa6e 053-pip-ctrlin: increase specimen count 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-13 22:25:43 +02:00
Tomasz Michalak fe809d7d0d 045-hclk-cmt-pips: increase specimen count 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-13 10:17:35 +02:00
Tomasz Michalak 7e05327c97 056-pip-rem: Delete net and cell after unsuccessful routing attempt 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-10 11:14:10 +02:00
Tomasz Michalak b5a4e6932e run_fuzzer.py: Adjust unit names output by free tool 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-09 09:33:22 +02:00
Tim 'mithro' Ansell fbec529926 Less verbose memory usage info. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-05-08 10:09:45 +02:00
Tim 'mithro' Ansell 1ca3f55b05 Fix doctest for Logger. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-05-08 10:09:45 +02:00
Tomasz Michalak 64c0a3c0b4
Merge pull request #824 from antmicro/043-clk-rebuf-pips-zynq 
Resolve missing CLK_REBUF PIPs bits for Zynq
 2019-05-08 07:55:02 +02:00
Tomasz Michalak af50a5f32a 043-clk-rebuf-pips: increase the number of specimen 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-07 15:58:53 +02:00
Tomasz Michalak c094640034 030-iob: don't create liob segbits file for zynq 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-07 13:53:17 +02:00
Tomasz Michalak 9bf9d4e0fd 030-iob: skip broken tile for zynq 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-07 13:36:50 +02:00
Tomasz Michalak 845a8914b3 045-hclk-cmt-pips: account for hclk_cmt tiles missing from zynq7 and re-enable fuzzer 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-07 08:34:18 +02:00
Tim Ansell 938f3788e8
Merge pull request #706 from antmicro/bel-timing 
fuzzers: Adding BEL timing fuzzer
 2019-04-29 09:16:18 -07:00
Tomasz Michalak c91ca7cf7f 054-pip-fan-alt: add solution of BYP_ALT.GFAN PIPs 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-29 08:05:08 +02:00
Tim 'mithro' Ansell 4473789694 fuzzers: Disable timing fuzzer on Kintex. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-28 18:53:51 -07:00
Karol Gugala 1952b3df75 fuzzers: 007: create run.ok file 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 634ca791c7 fuzzers: 007: bel: merge slicel and slicem timigs 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 7154cfcf61 fuzzers: add timing fuzzer to global makefile 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 69cc63ea81 utils: add sdfmerge tool 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala ba62b6b9c9 fuzzers: 007: add BEL to Makefile 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 5d9da26f78 Fuzzers: 007: add bel timing fuzzer 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Tomasz Michalak 40f0ef6fa8 052-pip-clkin: run make format 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-25 09:36:52 +02:00
Tomasz Michalak d67cb4c250 052-pip-clkin: re-enable fuzzer 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-25 09:36:52 +02:00
Tomasz Michalak 8a47473bd1 052-pip-clkin: don't route PIPs with same wires in one run 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-25 09:36:52 +02:00
Tomasz Michalak 6337cac12a 052-pip-clkin: use interconnect tiles with different x coordinates 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-25 09:36:52 +02:00
Tomasz Michalak 28729661ac fuzzers: disable 056-pip-rem until other instabilities are fixed 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-24 07:53:48 +02:00
Tomasz Michalak 6a5d048c4d fuzzers: disable 052-pip-clkin until fuzzer becomes stable 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-24 07:53:22 +02:00
Tomasz Michalak f1c06d6bde fuzzers: disable 045-hclk-cmt-pips for stabilization 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-23 16:25:13 -07:00
Tomasz Michalak 491359842e fuzzers: disable 057-pip-bi for stabilization 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-23 16:25:13 -07:00
Tomasz Michalak e3c70dda78 fuzzers: disable 041-clk-hrow-pips for stabilization efforts 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-23 16:25:13 -07:00
Tomasz Michalak 4efa6f31d1 fuzzers: Fix error usage 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-18 23:01:14 +02:00
Tomasz Michalak fde33d064f 056-pip-rem: lower PDIL-1 DRC severity 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-17 10:59:54 +02:00
litghost 37c46aa7f7
Merge pull request #773 from litghost/add_more_parts 
Add make targets to build additional outputs from each database.
 2019-04-11 10:00:05 -07:00
Tim 'mithro' Ansell 02cd21f4ba fuzzers: Disable retries by default. 
Retries can be re-enabled when #635 is fixed.

Currently the retries are just causing CI to take a long time.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-10 16:56:47 -07:00
Keith Rothman 36177e9599 Add make targets to build additional outputs from each database. 
These targets are for:
 - Generating additional database outputs that are part, e.g. yaml files.
 - Generating harnesses

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-04-10 11:55:39 -07:00
Keith Rothman 3e343bbda7 Add fuzzer for documenting pin to pad relationship for part. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-04-08 15:59:51 -07:00
Tim 'mithro' Ansell 9717fa48eb docs: Fix top level headers and other small clean. 
* Make sure all files have top level headers.
 * Fixing a few spelling mistakes.
 * Fixed some trailing spaces.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-03 19:26:28 -07:00
litghost 08d6224c82
Merge pull request #738 from litghost/even_more_ppips 
Add another IOI variant to the ppips
 2019-03-22 08:57:30 -07:00
Keith Rothman e1fde3203d Run make format. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-03-22 08:35:53 -07:00
Keith Rothman 34559709bb Add BRKH_INT, fix grammer, and add some line breaks. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-03-22 08:15:45 -07:00
litghost 5e9211d57c
Merge pull request #727 from litghost/bufmrce 
Solve remaining bits in the ROI
 2019-03-22 07:58:00 -07:00
Keith Rothman 1d140ac3b1 Add another IOI variant. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-03-21 14:24:04 -07:00
Keith Rothman c0b8c2bd0d Run make format. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-03-21 14:19:41 -07:00
Keith Rothman 3e851a6256 Reduce number of active GCLKs in final iterations. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-03-21 13:41:36 -07:00