mirror of https://github.com/openXC7/prjxray.git
Merge pull request #612 from litghost/refactor_int_fuzzers
Refactor INT fuzzers.
This commit is contained in:
commit
f7c6f76bb3
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@ -16,6 +16,10 @@ print("Loading tags from design.txt.")
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with open("design.txt", "r") as f:
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for line in f:
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tile, pip, src, dst, pnum, pdir = line.split()
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if not tile.startswith('INT_'):
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continue
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_, pip = pip.split(".")
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_, src = src.split("/")
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_, dst = dst.split("/")
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@ -34,29 +34,5 @@ route_design
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write_checkpoint -force design.dcp
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proc write_txtdata {filename} {
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puts "FUZ([pwd]): Writing $filename."
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set fp [open $filename w]
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set all_pips [lsort -unique [get_pips -of_objects [get_nets -hierarchical]]]
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# FIXME: getting IOB. Don't think this works correctly
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set tiles [get_tiles [regsub -all {CLBL[LM]} [get_tiles -of_objects [get_sites -of_objects [get_pblocks roi]]] INT]]
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set ntiles [llength $tiles]
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set tilei 0
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foreach tile $tiles {
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incr tilei
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if {($tilei % 10) == 0 } {
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puts "FUZ([pwd]): Dumping pips from tile $tile ($tilei / $ntiles)"
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}
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foreach pip [filter $all_pips "TILE == $tile"] {
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set src_wire [get_wires -uphill -of_objects $pip]
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set dst_wire [get_wires -downhill -of_objects $pip]
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set num_pips [llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst_wire]]]
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set dir_prop [get_property IS_DIRECTIONAL $pip]
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puts $fp "$tile $pip $src_wire $dst_wire $num_pips $dir_prop"
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}
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}
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close $fp
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}
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write_bitstream -force design.bit
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write_txtdata design.txt
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write_pip_txtdata design.txt
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@ -1,9 +0,0 @@
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#!/bin/bash
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source ${XRAY_GENHEADER}
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${XRAY_VIVADO} -mode batch -source ../generate.tcl
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${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
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python3 ../generate.py
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@ -141,25 +141,6 @@ for {set idx 0} {$idx < [llength $todo_lines]} {incr idx} {
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}
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}
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proc write_txtdata {filename tiles} {
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puts "Writing $filename."
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set fp [open $filename w]
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set all_pips [lsort -unique [get_pips -of_objects [get_nets -hierarchical]]]
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if {$all_pips != {}} {
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puts "Dumping pips."
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foreach tile $tiles {
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foreach pip [filter $all_pips "TILE == $tile"] {
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set src_wire [get_wires -uphill -of_objects $pip]
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set dst_wire [get_wires -downhill -of_objects $pip]
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set num_pips [llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst_wire]]]
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set dir_prop [get_property IS_DIRECTIONAL $pip]
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puts $fp "$tile $pip $src_wire $dst_wire $num_pips $dir_prop"
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}
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}
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}
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close $fp
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}
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route_design
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write_checkpoint -force design.dcp
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write_bitstream -force design.bit
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@ -172,4 +153,4 @@ if {[info exists ::env(QUICK) ] && "$::env(QUICK)" == "Y"} {
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set tiles [get_tiles [regsub -all {CLBL[LM]} [get_tiles -of_objects [get_sites -of_objects [get_pblocks roi]]] INT]]
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}
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write_txtdata design.txt $tiles
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write_pip_txtdata design.txt
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@ -1,6 +1,6 @@
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#!/usr/bin/env python3
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import os, re
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import re
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from prjxray.segmaker import Segmaker
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@ -14,6 +14,10 @@ print("Loading tags from design.txt.")
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with open("design.txt", "r") as f:
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for line in f:
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tile, pip, src, dst, pnum, pdir = line.split()
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if not tile.startswith('INT_'):
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continue
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_, pip = pip.split(".")
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_, src = src.split("/")
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_, dst = dst.split("/")
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@ -1,9 +0,0 @@
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#!/bin/bash
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source ${XRAY_GENHEADER}
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${XRAY_VIVADO} -mode batch -source ../generate.tcl
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${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
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python3 ../generate.py
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@ -96,26 +96,7 @@ for {set idx 0} {$idx < [llength $todo_lines]} {incr idx} {
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}
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}
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proc write_txtdata {filename} {
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puts "Writing $filename."
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set fp [open $filename w]
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set all_pips [lsort -unique [get_pips -of_objects [get_nets -hierarchical]]]
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if {$all_pips != {}} {
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puts "Dumping pips."
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foreach tile [get_tiles [regsub -all {CLBL[LM]} [get_tiles -of_objects [get_sites -of_objects [get_pblocks roi]]] INT]] {
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foreach pip [filter $all_pips "TILE == $tile"] {
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set src_wire [get_wires -uphill -of_objects $pip]
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set dst_wire [get_wires -downhill -of_objects $pip]
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set num_pips [llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst_wire]]]
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set dir_prop [get_property IS_DIRECTIONAL $pip]
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puts $fp "$tile $pip $src_wire $dst_wire $num_pips $dir_prop"
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}
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}
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}
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close $fp
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}
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route_design
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write_checkpoint -force design.dcp
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write_bitstream -force design.bit
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write_txtdata design.txt
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write_pip_txtdata design.txt
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@ -1,6 +1,6 @@
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#!/usr/bin/env python3
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import os, re
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import re
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from prjxray.segmaker import Segmaker
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@ -14,6 +14,10 @@ print("Loading tags from design.txt.")
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with open("design.txt", "r") as f:
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for line in f:
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tile, pip, src, dst, pnum, pdir = line.split()
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if not tile.startswith('INT_'):
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continue
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_, pip = pip.split(".")
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_, src = src.split("/")
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_, dst = dst.split("/")
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@ -1,9 +0,0 @@
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#!/bin/bash
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source ${XRAY_GENHEADER}
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${XRAY_VIVADO} -mode batch -source ../generate.tcl
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${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
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python3 ../generate.py
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@ -61,26 +61,7 @@ for {set idx 0} {$idx < [llength $todo_lines]} {incr idx} {
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route_via $mynet "$tile/$src_wire $tile/$dst_wire"
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}
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proc write_txtdata {filename} {
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puts "Writing $filename."
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set fp [open $filename w]
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set all_pips [lsort -unique [get_pips -of_objects [get_nets -hierarchical]]]
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if {$all_pips != {}} {
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puts "Dumping pips."
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foreach tile [get_tiles [regsub -all {CLBL[LM]} [get_tiles -of_objects [get_sites -of_objects [get_pblocks roi]]] INT]] {
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foreach pip [filter $all_pips "TILE == $tile"] {
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set src_wire [get_wires -uphill -of_objects $pip]
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set dst_wire [get_wires -downhill -of_objects $pip]
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set num_pips [llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst_wire]]]
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set dir_prop [get_property IS_DIRECTIONAL $pip]
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puts $fp "$tile $pip $src_wire $dst_wire $num_pips $dir_prop"
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}
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}
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}
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close $fp
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}
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route_design
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write_checkpoint -force design.dcp
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write_bitstream -force design.bit
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write_txtdata design.txt
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write_pip_txtdata design.txt
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@ -16,6 +16,10 @@ print("Loading tags from design.txt.")
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with open("design.txt", "r") as f:
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for line in f:
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tile, pip, src, dst, pnum, pdir = line.split()
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if not tile.startswith('INT_'):
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continue
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_, pip = pip.split(".")
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_, src = src.split("/")
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_, dst = dst.split("/")
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@ -62,26 +62,7 @@ for {set idx 0} {$idx < [llength $todo_lines]} {incr idx} {
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route_via $mynet "$tile/$src_wire $tile/$dst_wire"
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}
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proc write_txtdata {filename} {
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puts "Writing $filename."
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set fp [open $filename w]
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set all_pips [lsort -unique [get_pips -of_objects [get_nets -hierarchical]]]
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if {$all_pips != {}} {
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puts "Dumping pips."
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foreach tile [get_tiles [regsub -all {CLBL[LM]} [get_tiles -of_objects [get_sites -of_objects [get_pblocks roi]]] INT]] {
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foreach pip [filter $all_pips "TILE == $tile"] {
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set src_wire [get_wires -uphill -of_objects $pip]
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set dst_wire [get_wires -downhill -of_objects $pip]
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set num_pips [llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst_wire]]]
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set dir_prop [get_property IS_DIRECTIONAL $pip]
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puts $fp "$tile $pip $src_wire $dst_wire $num_pips $dir_prop"
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}
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}
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}
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close $fp
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}
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route_design
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write_checkpoint -force design.dcp
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write_bitstream -force design.bit
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write_txtdata design.txt
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write_pip_txtdata design.txt
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@ -1,10 +0,0 @@
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#!/bin/bash
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FUZDIR=$PWD
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source ${XRAY_GENHEADER}
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${XRAY_VIVADO} -mode batch -source $FUZDIR/generate.tcl
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${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
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python3 $FUZDIR/generate.py
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@ -105,25 +105,6 @@ proc route_todo {} {
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}
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}
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proc write_txtdata {filename} {
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puts "Writing $filename."
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set fp [open $filename w]
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set all_pips [lsort -unique [get_pips -of_objects [get_nets -hierarchical]]]
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if {$all_pips != {}} {
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puts "Dumping pips."
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foreach tile [get_tiles [regsub -all {CLBL[LM]} [get_tiles -of_objects [get_sites -of_objects [get_pblocks roi]]] INT]] {
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foreach pip [filter $all_pips "TILE == $tile"] {
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set src_wire [get_wires -uphill -of_objects $pip]
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set dst_wire [get_wires -downhill -of_objects $pip]
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set num_pips [llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst_wire]]]
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set dir_prop [get_property IS_DIRECTIONAL $pip]
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puts $fp "$tile $pip $src_wire $dst_wire $num_pips $dir_prop"
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}
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}
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}
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close $fp
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}
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proc run {} {
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build_basic
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route_todo
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@ -131,7 +112,7 @@ proc run {} {
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write_checkpoint -force design.dcp
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write_bitstream -force design.bit
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write_txtdata design.txt
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write_pip_txtdata design.txt
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}
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run
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@ -1,5 +1,4 @@
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MAKETODO_FLAGS=--re ".*"
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TODO_N=5
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export FUZDIR=$(shell pwd)
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PIPLIST_TCL=$(FUZDIR)/bipiplist.tcl
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PIP_TYPE?=bipips_int
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@ -1,11 +0,0 @@
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#!/bin/bash
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source ${XRAY_GENHEADER}
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while ! ${XRAY_VIVADO} -mode batch -source ../generate.tcl; do
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rm -rf design*
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done
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${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
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python3 ../generate.py
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@ -1,14 +0,0 @@
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#!/bin/bash
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set -ex
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FUZDIR=$PWD
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source ${XRAY_GENHEADER}
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echo '`define SEED 32'"'h$(echo $1 | md5sum | cut -c1-8)" > setseed.vh
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${XRAY_VIVADO} -mode batch -source $FUZDIR/generate.tcl | tee vivado_stdout.log | grep "FUZ[^:]\+:"
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${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
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python3 $FUZDIR/generate.py
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@ -41,6 +41,10 @@ print("Loading tags from %s." % args.design)
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with open(args.design, "r") as f:
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for line in f:
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tile, pip, src, dst, pnum, pdir = line.split()
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if not tile.startswith('INT_'):
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continue
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_, pip = pip.split(".")
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_, src = src.split("/")
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_, dst = dst.split("/")
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@ -108,3 +108,26 @@ proc lintersect {lst1 lst2} {
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proc putl {lst} {
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foreach line $lst {puts $line}
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}
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proc write_pip_txtdata {filename} {
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puts "FUZ([pwd]): Writing $filename."
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set fp [open $filename w]
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set nets [get_nets -hierarchical]
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set nnets [llength $nets]
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set neti 0
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foreach net $nets {
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incr neti
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if {($neti % 100) == 0 } {
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puts "FUZ([pwd]): Dumping pips from net $net ($neti / $nnets)"
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}
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foreach pip [get_pips -of_objects $net] {
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set tile [get_tiles -of_objects $pip]
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set src_wire [get_wires -uphill -of_objects $pip]
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set dst_wire [get_wires -downhill -of_objects $pip]
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set num_pips [llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst_wire]]]
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set dir_prop [get_property IS_DIRECTIONAL $pip]
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puts $fp "$tile $pip $src_wire $dst_wire $num_pips $dir_prop"
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}
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}
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close $fp
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}
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