mirror of https://github.com/openXC7/prjxray.git
Refactor 037 to remove some unstable pips.
This does lose the IMUX->OCLKM pip, but I believe that is okay. That pip was returning an incorrect solution anyways. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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@ -3,21 +3,28 @@ PIP_TYPE?=ioi3
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PIPLIST_TCL=$(FUZDIR)/ioi3_pip_list.tcl
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PIPLIST_TCL=$(FUZDIR)/ioi3_pip_list.tcl
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TODO_RE=".*"
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TODO_RE=".*"
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EXCLUDE_RE=".*((PHASER)|(CLKDIVF)|(CLKDIVP)|(CLKDIVB)|(IOI_ILOGIC[01]_O)|(IOI_OLOGIC[01]_CLKB?\.)|(IOI_IMUX_RC)|(IOI_OLOGIC[01]_[OT]FB)).*"
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EXCLUDE_RE=".*((PHASER)|(CLKDIVF)|(CLKDIVP)|(CLKDIVB)|(IOI_ILOGIC[01]_O)|(IOI_OLOGIC[01]_CLKB?\.)|(IOI_IMUX_RC)|(IOI_OLOGIC[01]_[OT]FB)|(OCLKM.*IMUX31)|(IOI_ILOGIC0_CLKB\.IOI_IMUX22_1)).*"
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MAKETODO_FLAGS=--pip-type ${PIP_TYPE} --seg-type $(PIP_TYPE) --re $(TODO_RE) --sides "xr,xl" --exclude-re $(EXCLUDE_RE)
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MAKETODO_FLAGS=--pip-type ${PIP_TYPE} --seg-type $(PIP_TYPE) --re $(TODO_RE) --sides "xr,xl" --exclude-re $(EXCLUDE_RE)
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N = 40
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N = 40
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A_PIPLIST=lioi3.txt
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A_PIPLIST=lioi3.txt
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SEGMATCH_FLAGS=-c 6 -m 20 -M 50
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SPECIMENS_DEPS=build/cmt_regions.csv
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SPECIMENS_DEPS=build/cmt_regions.csv
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include ../pip_loop.mk
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include ../pip_loop.mk
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SIX_BIT_PIPS="OLOGIC[01]_CLKDIV"
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build/segbits_ioi3_x.rdb: $(SPECIMENS_OK)
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build/segbits_ioi3_x.rdb: $(SPECIMENS_OK)
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${XRAY_SEGMATCH} ${SEGMATCH_FLAGS} -o build/segbits_ioi3_x.rdb \
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# Most pips are 3 bits, force a 3 bit solution
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${XRAY_SEGMATCH} -c 3 -m 20 -M 50 -o build/segbits_ioi3_x_match_3.rdb \
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$(shell find build -name segdata_lioi3*.txt) $(shell find build -name segdata_rioi3*.txt)
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$(shell find build -name segdata_lioi3*.txt) $(shell find build -name segdata_rioi3*.txt)
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# Some are 6 bit solutions, solve for 6 bits and merge respectively
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${XRAY_SEGMATCH} -c 6 -m 20 -M 50 -o build/segbits_ioi3_x_match_6.rdb \
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$(shell find build -name segdata_lioi3*.txt) $(shell find build -name segdata_rioi3*.txt)
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grep -v ${SIX_BIT_PIPS} build/segbits_ioi3_x_match_3.rdb > build/segbits_ioi3_x.rdb
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grep ${SIX_BIT_PIPS} build/segbits_ioi3_x_match_6.rdb >> build/segbits_ioi3_x.rdb
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RDBS = build/segbits_ioi3_x.rdb
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RDBS = build/segbits_ioi3_x.rdb
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@ -38,6 +38,7 @@ proc run {} {
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set_property IS_ENABLED 0 [get_drc_checks {REQP-13}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-13}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-98}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-98}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-99}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-99}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-105}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-115}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-115}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-144}]
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set_property IS_ENABLED 0 [get_drc_checks {REQP-144}]
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@ -210,11 +210,16 @@ def run():
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if random.randint(0, 1):
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if random.randint(0, 1):
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oclkb = oclk
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oclkb = oclk
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else:
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else:
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if random.randint(0, 1):
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oclkb, _ = clocks.get_clock(
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oclkb, _ = clocks.get_clock(
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ilogic_site,
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ilogic_site,
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allow_ioclks=True,
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allow_ioclks=True,
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allow_rclks=True,
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allow_rclks=True,
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allow_fabric=not is_lut)
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allow_fabric=not is_lut)
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else:
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# Explicitly provide IMUX stimulus to resolve IMUX pips
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oclk = random.randint(0, 1)
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oclkb = random.randint(0, 1)
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DATA_RATE = random.choice(['DDR', 'SDR'])
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DATA_RATE = random.choice(['DDR', 'SDR'])
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clk, is_lut = clocks.get_clock(
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clk, is_lut = clocks.get_clock(
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@ -226,12 +231,17 @@ def run():
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clkb = clk
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clkb = clk
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else:
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else:
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clkb = clk
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clkb = clk
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if random.randint(0, 1):
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while clkb == clk:
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while clkb == clk:
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clkb, _ = clocks.get_clock(
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clkb, _ = clocks.get_clock(
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ilogic_site,
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ilogic_site,
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allow_ioclks=True,
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allow_ioclks=True,
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allow_rclks=True,
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allow_rclks=True,
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allow_empty=False)
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allow_empty=False)
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else:
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# Explicitly provide IMUX stimulus to resolve IMUX pips
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clk = random.randint(0, 1)
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clkb = random.randint(0, 1)
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if ilogic_site_type is None:
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if ilogic_site_type is None:
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pass
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pass
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