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Added bitread and segprint to the Makefile flow 

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
This commit is contained in:
Maciej Kurc 2019-06-17 14:02:31 +02:00
parent 3783e7b2e3
commit 728a6a76d2
4 changed files with 19 additions and 4 deletions
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10
minitests/litex/src.vivado/Makefile
View File

@ -3,11 +3,13 @@ VIVADO = $(BASE_PATH)/utils/vivado.sh
PART = xc7a35tcsg324-1 PART = xc7a35tcsg324-1
BIT2FASM_ARGS = --db-root "$(BASE_PATH)/database/artix7" --part "$(BASE_PATH)/database/artix7/$(PART)" --verbose BIT2FASM_ARGS = --db-root "$(BASE_PATH)/database/artix7" --part "$(BASE_PATH)/database/artix7/$(PART)" --verbose
all: top.fasm all: top.fasm top.bits segprint.log
clean: clean:
@rm -f *.bit @rm -f *.bit
@rm -f *.bits
@rm -f *.fasm @rm -f *.fasm
@rm -f *.log
@rm -rf build @rm -rf build
.PHONY: all clean .PHONY: all clean
@ -25,3 +27,9 @@ top.fasm: top.bit
$(BIT2FASM_ARGS) \ $(BIT2FASM_ARGS) \
top.bit >top.fasm \ top.bit >top.fasm \
|| (rm -f top.fasm && exit -1) || (rm -f top.fasm && exit -1)
top.bits: top.bit
$(XRAY_BITREAD) -part_file $(BASE_PATH)/database/artix7/$(PART).yaml -o top.bits -z -y top.bit
segprint.log: top.bits
$(XRAY_SEGPRINT) -z -D -b top.bits > segprint.log

2
minitests/litex/src.vivado/top.tcl
View File

@ -22,6 +22,6 @@ report_drc -file top_drc.rpt
report_timing_summary -datasheet -max_paths 10 -file top_timing.rpt report_timing_summary -datasheet -max_paths 10 -file top_timing.rpt
report_power -file top_power.rpt report_power -file top_power.rpt
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
write_bitstream -force top.bit write_bitstream -force top.bit
write_cfgmem -force -format bin -interface spix4 -size 16 -loadbit "up 0x0 top.bit" -file top.bin write_cfgmem -force -format bin -interface spix4 -size 16 -loadbit "up 0x0 top.bit" -file top.bin
quit quit

9
minitests/litex/src.yosys/Makefile
View File

@ -4,11 +4,12 @@ VIVADO = $(BASE_PATH)/utils/vivado.sh
PART = xc7a35tcsg324-1 PART = xc7a35tcsg324-1
BIT2FASM_ARGS = --db-root "$(BASE_PATH)/database/artix7" --part "$(BASE_PATH)/database/artix7/$(PART)" --verbose BIT2FASM_ARGS = --db-root "$(BASE_PATH)/database/artix7" --part "$(BASE_PATH)/database/artix7/$(PART)" --verbose
all: top.fasm all: top.fasm top.bits segprint.log
clean: clean:
@rm -f *.edif @rm -f *.edif
@rm -f *.bit @rm -f *.bit
@rm -f *.bits
@rm -f *.fasm @rm -f *.fasm
@rm -f *.log @rm -f *.log
@rm -rf build @rm -rf build
@ -34,3 +35,9 @@ top.fasm: top.bit
$(BIT2FASM_ARGS) \ $(BIT2FASM_ARGS) \
top.bit >top.fasm \ top.bit >top.fasm \
|| (rm -f top.fasm && exit -1) || (rm -f top.fasm && exit -1)
top.bits: top.bit
$(XRAY_BITREAD) -part_file $(BASE_PATH)/database/artix7/$(PART).yaml -o top.bits -z -y top.bit
segprint.log: top.bits
$(XRAY_SEGPRINT) -z -D -b top.bits > segprint.log

2
minitests/litex/src.yosys/top.tcl
View File

@ -21,6 +21,6 @@ report_drc -file top_drc.rpt
report_timing_summary -datasheet -max_paths 10 -file top_timing.rpt report_timing_summary -datasheet -max_paths 10 -file top_timing.rpt
report_power -file top_power.rpt report_power -file top_power.rpt
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
write_bitstream -force top.bit write_bitstream -force top.bit
write_cfgmem -force -format bin -interface spix4 -size 16 -loadbit "up 0x0 top.bit" -file top.bin write_cfgmem -force -format bin -interface spix4 -size 16 -loadbit "up 0x0 top.bit" -file top.bin
quit quit