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fixedpnr: include latches 

Signed-off-by: John McMaster <JohnDMcMaster@gmail.com>
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
This commit is contained in:
John McMaster 2017-11-27 15:43:02 -08:00 committed by Tim 'mithro' Ansell
parent 339fd235bc
commit 6eb44b0c33
4 changed files with 27 additions and 3 deletions
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4
minitests/fixedpnr/runme.sh
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@ -2,9 +2,9 @@
set -ex
vivado -mode batch -source runme.tcl
for ff in fdre fdse fdce fdce_inv fdpe; do
for ff in fdre fdse fdce fdce_inv fdpe ldce ldpe; do
${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design_$ff.bits -z -y design_$ff.bit
${XRAY_SEGPRINT} design_$ff.bits >design_$ff.seg
${XRAY_SEGPRINT} -z design_$ff.bits >design_$ff.seg
done
diff -u design_fdre.bits design_fdse.bits

2
minitests/fixedpnr/runme.tcl
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@ -29,7 +29,7 @@ write_bitstream -force design_fdre.bit
close_project
foreach variant {fdse fdce fdce_inv fdpe} {}
foreach variant {fdse fdce fdce_inv fdpe ldce ldpe} {
create_project -force -part $::env(XRAY_PART) design_${variant} design_${variant}
read_verilog top_${variant}.v
read_xdc fixed.xdc

12
minitests/fixedpnr/top_ldce.v Normal file
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@ -0,0 +1,12 @@
module top(input clk, ce, sr, d, output q);
(* LOC="SLICE_X16Y100", BEL="AFF", DONT_TOUCH *)
LDCE ff (
.G(clk),
.GE(ce),
.CLR(sr),
.D(d),
.Q(q)
);
endmodule

12
minitests/fixedpnr/top_ldpe.v Normal file
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@ -0,0 +1,12 @@
module top(input clk, ce, sr, d, output q);
(* LOC="SLICE_X16Y100", BEL="AFF", DONT_TOUCH *)
LDPE ff (
.G(clk),
.GE(ce),
.PRE(sr),
.D(d),
.Q(q)
);
endmodule