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Remove unused class 

Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
This commit is contained in:
Tomasz Michalak 2019-10-08 10:33:37 +02:00
parent b356ed2761
commit 630cebd0fb
4 changed files with 0 additions and 355 deletions
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2
lib/CMakeLists.txt
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@ -4,7 +4,6 @@ add_library(libprjxray
segbits_file_reader.cc segbits_file_reader.cc
xilinx/bitstream_writer.cc xilinx/bitstream_writer.cc
xilinx/configuration_packet.cc xilinx/configuration_packet.cc
xilinx/configuration_packetizer.cc
xilinx/configuration_register.cc xilinx/configuration_register.cc
xilinx/frames.cc xilinx/frames.cc
xilinx/configuration.cc xilinx/configuration.cc
@ -52,7 +51,6 @@ if (PRJXRAY_BUILD_TESTING)
xilinx/tests/xc7series/configuration_column_test.cc xilinx/tests/xc7series/configuration_column_test.cc
xilinx/tests/xc7series/configuration_test.cc xilinx/tests/xc7series/configuration_test.cc
xilinx/tests/xc7series/configuration_packet_test.cc xilinx/tests/xc7series/configuration_packet_test.cc
xilinx/tests/xc7series/configuration_packetizer_test.cc
xilinx/tests/xc7series/crc_test.cc xilinx/tests/xc7series/crc_test.cc
xilinx/tests/xc7series/ecc_test.cc xilinx/tests/xc7series/ecc_test.cc
xilinx/tests/xc7series/frame_address_test.cc xilinx/tests/xc7series/frame_address_test.cc

72
lib/include/prjxray/xilinx/configuration_packetizer.h
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@ -1,72 +0,0 @@
#ifndef PRJXRAY_LIB_XILINX_CONFIGURATION_PACKETIZER_H_
#define PRJXRAY_LIB_XILINX_CONFIGURATION_PACKETIZER_H_
#include <absl/types/optional.h>
#include <absl/types/span.h>
#include <prjxray/xilinx/configuration.h>
namespace prjxray {
namespace xilinx {
template <typename ArchType>
class ConfigurationPacketizer {
public:
class iterator
: std::iterator<
std::input_iterator_tag,
ConfigurationPacket<typename ArchType::ConfRegType>> {
public:
iterator(
const typename ArchType::Part* part,
typename Configuration<ArchType>::FrameMap::const_iterator
begin,
typename Configuration<ArchType>::FrameMap::const_iterator
end);
iterator& operator++();
bool operator==(const iterator& other) const;
bool operator!=(const iterator& other) const;
const ConfigurationPacket<typename ArchType::ConfRegType>&
operator*() const;
const ConfigurationPacket<typename ArchType::ConfRegType>*
operator->() const;
private:
friend class ConfigurationPacketizer;
enum class State {
Start,
FrameAddressWritten,
FrameDataWritten,
ZeroPadWritten,
Finished,
};
const typename ArchType::Part* part_;
State state_;
typename Configuration<ArchType>::FrameMap::const_iterator
frame_cur_;
typename Configuration<ArchType>::FrameMap::const_iterator
frame_end_;
absl::optional<uint32_t> frame_address_;
absl::optional<
ConfigurationPacket<typename ArchType::ConfRegType>>
packet_;
int zero_pad_packets_to_write_;
};
ConfigurationPacketizer(const Configuration<ArchType>& config);
iterator begin() const;
iterator end() const;
private:
const Configuration<ArchType>& config_;
};
} // namespace xilinx
} // namespace prjxray
#endif // PRJXRAY_LIB_XILINX_CONFIGURATION_PACKETIZER_H_

162
lib/xilinx/configuration_packetizer.cc
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@ -1,162 +0,0 @@
#include <absl/types/span.h>
#include <prjxray/xilinx/configuration.h>
#include <prjxray/xilinx/configuration_packetizer.h>
namespace prjxray {
namespace xilinx {
template <typename ArchType>
ConfigurationPacketizer<ArchType>::ConfigurationPacketizer(
const Configuration<ArchType>& config)
: config_(config) {}
template <typename ArchType>
typename ConfigurationPacketizer<ArchType>::iterator
ConfigurationPacketizer<ArchType>::begin() const {
return iterator(&config_.part(), config_.frames().begin(),
config_.frames().end());
}
template <typename ArchType>
typename ConfigurationPacketizer<ArchType>::iterator
ConfigurationPacketizer<ArchType>::end() const {
return iterator(&config_.part(), config_.frames().end(),
config_.frames().end());
}
template <typename ArchType>
ConfigurationPacketizer<ArchType>::iterator::iterator(
const typename ArchType::Part* part,
typename Configuration<ArchType>::FrameMap::const_iterator begin,
typename Configuration<ArchType>::FrameMap::const_iterator end)
: part_(part),
state_(begin != end ? State::Start : State::Finished),
frame_cur_(begin),
frame_end_(end) {
this->operator++();
}
template <typename ArchType>
const ConfigurationPacket<typename ArchType::ConfRegType>&
ConfigurationPacketizer<ArchType>::iterator::operator*() const {
return *packet_;
}
template <typename ArchType>
const ConfigurationPacket<typename ArchType::ConfRegType>*
ConfigurationPacketizer<ArchType>::iterator::operator->() const {
return &(*packet_);
}
template <typename ArchType>
bool ConfigurationPacketizer<ArchType>::iterator::operator==(
const ConfigurationPacketizer<ArchType>::iterator& other) const {
return state_ == other.state_ && frame_cur_ == other.frame_cur_;
}
template <typename ArchType>
bool ConfigurationPacketizer<ArchType>::iterator::operator!=(
const ConfigurationPacketizer<ArchType>::iterator& other) const {
return !(*this == other);
}
template <>
typename ConfigurationPacketizer<Series7>::iterator&
ConfigurationPacketizer<Series7>::iterator::operator++() {
using ArchType = Series7;
// Frames are accessed via an indirect addressing scheme using the FAR
// and FDRI registers. Writes begin with writing the target frame
// address to FAR and then the frame data is written to FDRI. The
// following state machine primarily follows that flow:
// Start -> FrameAddressWritten -> FrameDataWritten -> Start....
// When the last frame within a row is written, 2 full frames (202
// words) of zero padding need to be written after the frame data.
switch (state_) {
case State::FrameDataWritten: {
// If this is the last address in this row (i.e. the
// next valid address known by the part is in a
// different row, half, or bus type), start a zero fill.
// Otherwise, increment the frame iterator and fall
// through to Start.
auto& this_address = frame_cur_->first;
auto next_address =
part_->GetNextFrameAddress(frame_cur_->first);
if (next_address &&
(next_address->block_type() !=
this_address.block_type() ||
next_address->is_bottom_half_rows() !=
this_address.is_bottom_half_rows() ||
next_address->row() != this_address.row())) {
zero_pad_packets_to_write_ = 202;
// Type 0 frames aren't documented in UG470. In
// practice, they are used to zero pad in the
// bitstream.
packet_ = ConfigurationPacket<
typename ArchType::ConfRegType>(
0,
ConfigurationPacket<
typename ArchType::ConfRegType>::
Opcode::NOP,
ArchType::ConfRegType::CRC, {});
state_ = State::ZeroPadWritten;
break;
}
++frame_cur_;
}
case State::Start:
if (frame_cur_ == frame_end_) {
state_ = State::Finished;
frame_address_.reset();
packet_.reset();
return *this;
}
frame_address_ = frame_cur_->first;
packet_ = ConfigurationPacket<
typename ArchType::ConfRegType>(
1,
ConfigurationPacket<
typename ArchType::ConfRegType>::Opcode::Write,
ArchType::ConfRegType::FAR,
absl::Span<uint32_t>(&frame_address_.value(), 1));
state_ = State::FrameAddressWritten;
break;
case State::FrameAddressWritten:
packet_ = ConfigurationPacket<
typename ArchType::ConfRegType>(
1,
ConfigurationPacket<
typename ArchType::ConfRegType>::Opcode::Write,
ArchType::ConfRegType::FDRI, frame_cur_->second);
state_ = State::FrameDataWritten;
break;
case State::ZeroPadWritten:
if (--zero_pad_packets_to_write_ == 1) {
++frame_cur_;
state_ = State::Start;
}
break;
case State::Finished:
break;
}
return *this;
}
template ConfigurationPacketizer<Series7>::ConfigurationPacketizer(
const Configuration<Series7>& config);
template ConfigurationPacketizer<Series7>::iterator
ConfigurationPacketizer<Series7>::begin() const;
template ConfigurationPacketizer<Series7>::iterator
ConfigurationPacketizer<Series7>::end() const;
template const ConfigurationPacket<typename Series7::ConfRegType>&
ConfigurationPacketizer<Series7>::iterator::operator*() const;
template const ConfigurationPacket<typename Series7::ConfRegType>*
ConfigurationPacketizer<Series7>::iterator::operator->() const;
template bool ConfigurationPacketizer<Series7>::iterator::operator==(
const ConfigurationPacketizer<Series7>::iterator& other) const;
template bool ConfigurationPacketizer<Series7>::iterator::operator!=(
const ConfigurationPacketizer<Series7>::iterator& other) const;
} // namespace xilinx
} // namespace prjxray

119
lib/xilinx/tests/xc7series/configuration_packetizer_test.cc
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@ -1,119 +0,0 @@
#include <map>
#include <vector>
#include <gtest/gtest.h>
#include <prjxray/xilinx/architectures.h>
#include <prjxray/xilinx/configuration_packetizer.h>
using namespace prjxray::xilinx;
TEST(ConfigurationPacketizerTest, EmptyConfigGeneratesNoPackets) {
auto part = xc7series::Part::FromFile("configuration_test.yaml");
ASSERT_TRUE(part);
std::map<xc7series::FrameAddress, std::vector<uint32_t>> frames;
Configuration<Series7> config(*part, &frames);
ConfigurationPacketizer<Series7> packetizer(config);
EXPECT_EQ(packetizer.begin(), packetizer.end());
}
TEST(ConfigurationPacketizerTest, ConfigWithFramesGeneratesPackets) {
auto part = xc7series::Part::FromFile("configuration_test.yaml");
ASSERT_TRUE(part);
std::map<xc7series::FrameAddress, std::vector<uint32_t>> frames;
frames[0] = std::vector<uint32_t>(101, 0xAA);
frames[1] = std::vector<uint32_t>(101, 0xBB);
Configuration<Series7> config(*part, &frames);
EXPECT_EQ(config.frames().at(0), frames[0]);
EXPECT_EQ(config.frames().at(1), frames[1]);
ConfigurationPacketizer<Series7> packetizer(config);
auto packet = packetizer.begin();
ASSERT_NE(packet, packetizer.end());
// Write 0x0 to FAR
EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
EXPECT_EQ(packet->opcode(),
ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
EXPECT_EQ(packet->address(), Series7::ConfRegType::FAR);
EXPECT_EQ(packet->data(), std::vector<uint32_t>{0});
++packet;
ASSERT_NE(packet, packetizer.end());
EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
EXPECT_EQ(packet->opcode(),
ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
EXPECT_EQ(packet->address(), Series7::ConfRegType::FDRI);
EXPECT_EQ(packet->data(), frames[0]);
++packet;
ASSERT_NE(packet, packetizer.end());
EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
EXPECT_EQ(packet->opcode(),
ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
EXPECT_EQ(packet->address(), Series7::ConfRegType::FAR);
EXPECT_EQ(packet->data(), std::vector<uint32_t>{1});
++packet;
ASSERT_NE(packet, packetizer.end());
EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
EXPECT_EQ(packet->opcode(),
ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
EXPECT_EQ(packet->address(), Series7::ConfRegType::FDRI);
EXPECT_EQ(packet->data(), frames[1]);
++packet;
EXPECT_EQ(packet, packetizer.end());
}
TEST(ConfigurationPacketizerTest, ConfigWithFrameAtEndOfRowGeneratesZerofill) {
auto part = xc7series::Part::FromFile("configuration_test.yaml");
ASSERT_TRUE(part);
xc7series::FrameAddress last_frame_in_first_row(
xc7series::BlockType::CLB_IO_CLK, false, 0, 43, 41);
std::map<xc7series::FrameAddress, std::vector<uint32_t>> frames;
frames[last_frame_in_first_row] = std::vector<uint32_t>(101, 0xAA);
Configuration<Series7> config(*part, &frames);
ConfigurationPacketizer<Series7> packetizer(config);
auto packet = packetizer.begin();
ASSERT_NE(packet, packetizer.end());
EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
EXPECT_EQ(packet->opcode(),
ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
EXPECT_EQ(packet->address(), Series7::ConfRegType::FAR);
EXPECT_EQ(packet->data(),
std::vector<uint32_t>{last_frame_in_first_row});
++packet;
ASSERT_NE(packet, packetizer.end());
EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
EXPECT_EQ(packet->opcode(),
ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
EXPECT_EQ(packet->address(), Series7::ConfRegType::FDRI);
EXPECT_EQ(packet->data(), frames[last_frame_in_first_row]);
for (int ii = 0; ii < 202; ++ii) {
++packet;
ASSERT_NE(packet, packetizer.end());
EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(0));
EXPECT_EQ(
packet->opcode(),
ConfigurationPacket<Series7::ConfRegType>::Opcode::NOP);
EXPECT_EQ(packet->address(), Series7::ConfRegType::CRC);
EXPECT_EQ(packet->data(), std::vector<uint32_t>());
}
++packet;
EXPECT_EQ(packet, packetizer.end());
}