Change location of Series7 tests and adapt to new API

Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>

lib/CMakeLists.txt

@@ -45,21 +45,21 @@ if (PRJXRAY_BUILD_TESTING)
 		 WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/test_data)
 
 	add_executable(xilinx_xc7series_test
-		xilinx/xc7series/bitstream_reader_test.cc
-		xilinx/xc7series/bitstream_writer_test.cc
-		xilinx/xc7series/block_type_test.cc
-		xilinx/xc7series/configuration_bus_test.cc
-		xilinx/xc7series/configuration_column_test.cc
-		xilinx/xc7series/configuration_test.cc
-		xilinx/xc7series/configuration_packet_test.cc
-		xilinx/xc7series/configuration_packetizer_test.cc
-		xilinx/xc7series/crc_test.cc
-		xilinx/xc7series/ecc_test.cc
-		xilinx/xc7series/frame_address_test.cc
-		xilinx/xc7series/global_clock_region_test.cc
-		xilinx/xc7series/part_test.cc
-		xilinx/xc7series/row_test.cc
-		xilinx/xc7series/frames_test.cc)
+		xilinx/tests/xc7series/bitstream_reader_test.cc
+		xilinx/tests/xc7series/bitstream_writer_test.cc
+		xilinx/tests/xc7series/block_type_test.cc
+		xilinx/tests/xc7series/configuration_bus_test.cc
+		xilinx/tests/xc7series/configuration_column_test.cc
+		xilinx/tests/xc7series/configuration_test.cc
+		xilinx/tests/xc7series/configuration_packet_test.cc
+		xilinx/tests/xc7series/configuration_packetizer_test.cc
+		xilinx/tests/xc7series/crc_test.cc
+		xilinx/tests/xc7series/ecc_test.cc
+		xilinx/tests/xc7series/frame_address_test.cc
+		xilinx/tests/xc7series/global_clock_region_test.cc
+		xilinx/tests/xc7series/part_test.cc
+		xilinx/tests/xc7series/row_test.cc
+		xilinx/tests/xc7series/frames_test.cc)
 	target_link_libraries(xilinx_xc7series_test libprjxray gtest_main)
 	add_test(NAME xilinx_xc7series_test
 		 COMMAND xilinx_xc7series_test

lib/xilinx/tests/xc7series/bitstream_reader_test.cc

@@ -1,34 +1,35 @@
 #include <array>
 
 #include <gtest/gtest.h>
-#include <prjxray/xilinx/xc7series/bitstream_reader.h>
-#include <prjxray/xilinx/xc7series/configuration_packet.h>
-#include <prjxray/xilinx/xc7series/configuration_register.h>
+#include <prjxray/xilinx/architectures.h>
+#include <prjxray/xilinx/bitstream_reader.h>
+#include <prjxray/xilinx/configuration_packet.h>
+#include <prjxray/xilinx/configuration_register.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
 
 TEST(BitstreamReaderTest, InitWithEmptyBytesReturnsNull) {
 	absl::Span<uint8_t> bitstream;
-	auto reader = xc7series::BitstreamReader::InitWithBytes(bitstream);
+	auto reader = BitstreamReader<Series7>::InitWithBytes(bitstream);
 	EXPECT_FALSE(reader);
 }
 
 TEST(BitstreamReaderTest, InitWithOnlySyncReturnsObject) {
 	std::vector<uint8_t> bitstream{0xAA, 0x99, 0x55, 0x66};
-	auto reader = xc7series::BitstreamReader::InitWithBytes(bitstream);
+	auto reader = BitstreamReader<Series7>::InitWithBytes(bitstream);
 	EXPECT_TRUE(reader);
 }
 
 TEST(BitstreamReaderTest, InitWithSyncAfterNonWordSizedPaddingReturnsObject) {
 	std::vector<uint8_t> bitstream{0xFF, 0xFE, 0xAA, 0x99, 0x55, 0x66};
-	auto reader = xc7series::BitstreamReader::InitWithBytes(bitstream);
+	auto reader = BitstreamReader<Series7>::InitWithBytes(bitstream);
 	EXPECT_TRUE(reader);
 }
 
 TEST(BitstreamReaderTest, InitWithSyncAfterWordSizedPaddingReturnsObject) {
 	std::vector<uint8_t> bitstream{0xFF, 0xFE, 0xFD, 0xFC,
 	                               0xAA, 0x99, 0x55, 0x66};
-	auto reader = xc7series::BitstreamReader::InitWithBytes(bitstream);
+	auto reader = BitstreamReader<Series7>::InitWithBytes(bitstream);
 	EXPECT_TRUE(reader);
 }
 
@@ -37,13 +38,13 @@ TEST(BitstreamReaderTest, ParsesType1Packet) {
 	    0xAA, 0x99, 0x55, 0x66,  // sync
 	    0x20, 0x00, 0x00, 0x00,  // NOP
 	};
-	auto reader = xc7series::BitstreamReader::InitWithBytes(bitstream);
+	auto reader = BitstreamReader<Series7>::InitWithBytes(bitstream);
 	ASSERT_TRUE(reader);
 	ASSERT_NE(reader->begin(), reader->end());
 
 	auto first_packet = reader->begin();
 	EXPECT_EQ(first_packet->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::NOP);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::NOP);
 
 	EXPECT_EQ(++first_packet, reader->end());
 }
@@ -53,7 +54,7 @@ TEST(BitstreamReaderTest, ParseType2PacketWithoutType1Fails) {
 	    0xAA, 0x99, 0x55, 0x66,  // sync
 	    0x40, 0x00, 0x00, 0x00,  // Type 2 NOP
 	};
-	auto reader = xc7series::BitstreamReader::InitWithBytes(bitstream);
+	auto reader = BitstreamReader<Series7>::InitWithBytes(bitstream);
 	ASSERT_TRUE(reader);
 	EXPECT_EQ(reader->begin(), reader->end());
 }
@@ -69,23 +70,21 @@ TEST(BitstreamReaderTest, ParsesType2AfterType1Packet) {
 	std::vector<uint32_t> data_words{0x01020304, 0x05060708, 0x090A0B0C,
 	                                 0x0D0E0F10};
 
-	auto reader = xc7series::BitstreamReader::InitWithBytes(bitstream);
+	auto reader = BitstreamReader<Series7>::InitWithBytes(bitstream);
 	ASSERT_TRUE(reader);
 	ASSERT_NE(reader->begin(), reader->end());
 
 	auto first_packet = reader->begin();
 	EXPECT_EQ(first_packet->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::Read);
-	EXPECT_EQ(first_packet->address(),
-	          xc7series::ConfigurationRegister::FDRO);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::Read);
+	EXPECT_EQ(first_packet->address(), Series7::ConfRegType::FDRO);
 	EXPECT_EQ(first_packet->data(), absl::Span<uint32_t>());
 
 	auto second_packet = ++first_packet;
 	ASSERT_NE(second_packet, reader->end());
 	EXPECT_EQ(second_packet->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::Read);
-	EXPECT_EQ(second_packet->address(),
-	          xc7series::ConfigurationRegister::FDRO);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::Read);
+	EXPECT_EQ(second_packet->address(), Series7::ConfRegType::FDRO);
 	EXPECT_EQ(first_packet->data(), absl::Span<uint32_t>(data_words));
 
 	EXPECT_EQ(++first_packet, reader->end());

lib/xilinx/tests/xc7series/bitstream_writer_test.cc

@@ -1,14 +1,14 @@
 #include <array>
 
 #include <gtest/gtest.h>
-#include <prjxray/xilinx/xc7series/bitstream_reader.h>
-#include <prjxray/xilinx/xc7series/bitstream_writer.h>
-#include <prjxray/xilinx/xc7series/configuration_packet.h>
-#include <prjxray/xilinx/xc7series/configuration_register.h>
+#include <prjxray/xilinx/bitstream_reader.h>
+#include <prjxray/xilinx/bitstream_writer.h>
+#include <prjxray/xilinx/configuration_packet.h>
+#include <prjxray/xilinx/configuration_register.h>
 
 #include <prjxray/bit_ops.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
 
 constexpr uint32_t kType1NOP = prjxray::bit_field_set<uint32_t>(0, 31, 29, 0x1);
 
@@ -32,7 +32,7 @@ constexpr uint32_t MakeType2(const int opcode, const int word_count) {
 	    26, 0, word_count);
 }
 
-void dump_packets(xc7series::BitstreamWriter writer, bool nl = true) {
+void dump_packets(BitstreamWriter<Series7> writer, bool nl = true) {
 	int i = 0;
 	// for (uint32_t x : itr) {
 	for (auto itr = writer.begin(); itr != writer.end(); ++itr) {
@@ -51,53 +51,62 @@ void dump_packets(xc7series::BitstreamWriter writer, bool nl = true) {
 
 // Special all 0's
 void AddType0(
-    std::vector<std::unique_ptr<xc7series::ConfigurationPacket>>& packets) {
+    std::vector<std::unique_ptr<ConfigurationPacket<Series7::ConfRegType>>>&
+        packets) {
 	// InitWithWords doesn't like type 0
 	/*
 	static std::vector<uint32_t> words{0x00000000};
 	absl::Span<uint32_t> word_span(words);
-	auto packet = xc7series::ConfigurationPacket::InitWithWords(word_span);
+	auto packet =
+	ConfigurationPacket<Series7::ConfRegType>::InitWithWords(word_span);
 	packets.push_back(*(packet.second));
 	*/
 	static std::vector<uint32_t> words{};
 	absl::Span<uint32_t> word_span(words);
 	// CRC is config value 0
-	packets.emplace_back(new xc7series::ConfigurationPacket(
-	    0, xc7series::ConfigurationPacket::NOP,
-	    xc7series::ConfigurationRegister::CRC, word_span));
+	packets.emplace_back(new ConfigurationPacket<Series7::ConfRegType>(
+	    0, ConfigurationPacket<Series7::ConfRegType>::NOP,
+	    Series7::ConfRegType::CRC, word_span));
 }
 
 void AddType1(
-    std::vector<std::unique_ptr<xc7series::ConfigurationPacket>>& packets) {
+    std::vector<std::unique_ptr<ConfigurationPacket<Series7::ConfRegType>>>&
+        packets) {
 	static std::vector<uint32_t> words{MakeType1(0x2, 0x3, 2), 0xAA, 0xBB};
 	absl::Span<uint32_t> word_span(words);
-	auto packet = xc7series::ConfigurationPacket::InitWithWords(word_span);
+	auto packet =
+	    ConfigurationPacket<Series7::ConfRegType>::InitWithWords(word_span);
 	packets.emplace_back(
-	    new xc7series::ConfigurationPacket(*(packet.second)));
+	    new ConfigurationPacket<Series7::ConfRegType>(*(packet.second)));
 }
 
 // Empty
 void AddType1E(
-    std::vector<std::unique_ptr<xc7series::ConfigurationPacket>>& packets) {
+    std::vector<std::unique_ptr<ConfigurationPacket<Series7::ConfRegType>>>&
+        packets) {
 	static std::vector<uint32_t> words{MakeType1(0x2, 0x3, 0)};
 	absl::Span<uint32_t> word_span(words);
-	auto packet = xc7series::ConfigurationPacket::InitWithWords(word_span);
+	auto packet =
+	    ConfigurationPacket<Series7::ConfRegType>::InitWithWords(word_span);
 	packets.emplace_back(
-	    new xc7series::ConfigurationPacket(*(packet.second)));
+	    new ConfigurationPacket<Series7::ConfRegType>(*(packet.second)));
 }
 
 void AddType2(
-    std::vector<std::unique_ptr<xc7series::ConfigurationPacket>>& packets) {
+    std::vector<std::unique_ptr<ConfigurationPacket<Series7::ConfRegType>>>&
+        packets) {
 	// Type 1 packet with address
 	// Without this InitWithWords will fail on type 2
-	xc7series::ConfigurationPacket* packet1;
+	ConfigurationPacket<Series7::ConfRegType>* packet1;
 	{
 		static std::vector<uint32_t> words{MakeType1(0x2, 0x3, 0)};
 		absl::Span<uint32_t> word_span(words);
 		auto packet1_pair =
-		    xc7series::ConfigurationPacket::InitWithWords(word_span);
+		    ConfigurationPacket<Series7::ConfRegType>::InitWithWords(
+		        word_span);
 		packets.emplace_back(
-		    new xc7series::ConfigurationPacket(*(packet1_pair.second)));
+		    new ConfigurationPacket<Series7::ConfRegType>(
+		        *(packet1_pair.second)));
 		packet1 = packets[0].get();
 	}
 	// Type 2 packet with data
@@ -105,18 +114,21 @@ void AddType2(
 		static std::vector<uint32_t> words{
 		    MakeType2(0x01, 12), 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12};
 		absl::Span<uint32_t> word_span(words);
-		auto packet = xc7series::ConfigurationPacket::InitWithWords(
-		    word_span, packet1);
+		auto packet =
+		    ConfigurationPacket<Series7::ConfRegType>::InitWithWords(
+		        word_span, packet1);
 		packets.emplace_back(
-		    new xc7series::ConfigurationPacket(*(packet.second)));
+		    new ConfigurationPacket<Series7::ConfRegType>(
+		        *(packet.second)));
 	}
 }
 
 // Empty packets should produce just the header
 TEST(BitstreamWriterTest, WriteHeader) {
-	std::vector<std::unique_ptr<xc7series::ConfigurationPacket>> packets;
+	std::vector<std::unique_ptr<ConfigurationPacket<Series7::ConfRegType>>>
+	    packets;
 
-	xc7series::BitstreamWriter writer(packets);
+	BitstreamWriter<Series7> writer(packets);
 	std::vector<uint32_t> words(writer.begin(), writer.end());
 
 	// Per UG470 pg 80: Bus Width Auto Detection
@@ -128,9 +140,10 @@ TEST(BitstreamWriterTest, WriteHeader) {
 }
 
 TEST(BitstreamWriterTest, WriteType0) {
-	std::vector<std::unique_ptr<xc7series::ConfigurationPacket>> packets;
+	std::vector<std::unique_ptr<ConfigurationPacket<Series7::ConfRegType>>>
+	    packets;
 	AddType0(packets);
-	xc7series::BitstreamWriter writer(packets);
+	BitstreamWriter<Series7> writer(packets);
 	// dump_packets(writer, false);
 	std::vector<uint32_t> words(writer.begin(), writer.end());
 	std::vector<uint32_t> ref{// Bus width + sync
@@ -141,9 +154,10 @@ TEST(BitstreamWriterTest, WriteType0) {
 	EXPECT_EQ(words, ref);
 }
 TEST(BitstreamWriterTest, WriteType1) {
-	std::vector<std::unique_ptr<xc7series::ConfigurationPacket>> packets;
+	std::vector<std::unique_ptr<ConfigurationPacket<Series7::ConfRegType>>>
+	    packets;
 	AddType1(packets);
-	xc7series::BitstreamWriter writer(packets);
+	BitstreamWriter<Series7> writer(packets);
 	// dump_packets(writer, false);
 	std::vector<uint32_t> words(writer.begin(), writer.end());
 	std::vector<uint32_t> ref{// Bus width + sync
@@ -155,9 +169,10 @@ TEST(BitstreamWriterTest, WriteType1) {
 }
 
 TEST(BitstreamWriterTest, WriteType2) {
-	std::vector<std::unique_ptr<xc7series::ConfigurationPacket>> packets;
+	std::vector<std::unique_ptr<ConfigurationPacket<Series7::ConfRegType>>>
+	    packets;
 	AddType2(packets);
-	xc7series::BitstreamWriter writer(packets);
+	BitstreamWriter<Series7> writer(packets);
 	// dump_packets(writer, false);
 	std::vector<uint32_t> words(writer.begin(), writer.end());
 	std::vector<uint32_t> ref{
@@ -172,12 +187,13 @@ TEST(BitstreamWriterTest, WriteType2) {
 }
 
 TEST(BitstreamWriterTest, WriteMulti) {
-	std::vector<std::unique_ptr<xc7series::ConfigurationPacket>> packets;
+	std::vector<std::unique_ptr<ConfigurationPacket<Series7::ConfRegType>>>
+	    packets;
 	AddType1(packets);
 	AddType1E(packets);
 	AddType2(packets);
 	AddType1E(packets);
-	xc7series::BitstreamWriter writer(packets);
+	BitstreamWriter<Series7> writer(packets);
 	// dump_packets(writer, false);
 	std::vector<uint32_t> words(writer.begin(), writer.end());
 	std::vector<uint32_t> ref{

lib/xilinx/tests/xc7series/block_type_test.cc

@@ -2,7 +2,7 @@
 
 #include <gtest/gtest.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
 
 TEST(BlockTypeTest, YamlEncode) {
 	YAML::Node node;

lib/xilinx/tests/xc7series/configuration_column_test.cc

@@ -5,7 +5,7 @@
 #include <prjxray/xilinx/xc7series/frame_address.h>
 #include <yaml-cpp/yaml.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
 
 TEST(ConfigurationColumnTest, IsValidFrameAddress) {
 	xc7series::ConfigurationColumn column(10);

lib/xilinx/tests/xc7series/configuration_packet_test.cc

@@ -1,12 +1,12 @@
-#include <prjxray/xilinx/xc7series/configuration_packet.h>
-
 #include <functional>
 
 #include <absl/meta/type_traits.h>
 #include <gtest/gtest.h>
 #include <prjxray/bit_ops.h>
+#include <prjxray/xilinx/architectures.h>
+#include <prjxray/xilinx/configuration_packet.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
 
 constexpr uint32_t kType1NOP = prjxray::bit_field_set<uint32_t>(0, 31, 29, 0x1);
 
@@ -31,7 +31,8 @@ constexpr uint32_t MakeType2(const int opcode, const int word_count) {
 }
 
 TEST(ConfigPacket, InitWithZeroBytes) {
-	auto packet = xc7series::ConfigurationPacket::InitWithWords({});
+	auto packet =
+	    ConfigurationPacket<Series7::ConfRegType>::InitWithWords({});
 
 	EXPECT_EQ(packet.first, absl::Span<uint32_t>());
 	EXPECT_FALSE(packet.second);
@@ -40,65 +41,65 @@ TEST(ConfigPacket, InitWithZeroBytes) {
 TEST(ConfigPacket, InitWithType1Nop) {
 	std::vector<uint32_t> words{kType1NOP};
 	absl::Span<uint32_t> word_span(words);
-	auto packet = xc7series::ConfigurationPacket::InitWithWords(word_span);
+	auto packet =
+	    ConfigurationPacket<Series7::ConfRegType>::InitWithWords(word_span);
 	EXPECT_EQ(packet.first, absl::Span<uint32_t>());
 	ASSERT_TRUE(packet.second);
 	EXPECT_EQ(packet.second->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::NOP);
-	EXPECT_EQ(packet.second->address(),
-	          xc7series::ConfigurationRegister::CRC);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::NOP);
+	EXPECT_EQ(packet.second->address(), Series7::ConfRegType::CRC);
 	EXPECT_EQ(packet.second->data(), absl::Span<uint32_t>());
 }
 
 TEST(ConfigPacket, InitWithType1Read) {
 	std::vector<uint32_t> words{MakeType1(0x1, 0x2, 2), 0xAA, 0xBB};
 	absl::Span<uint32_t> word_span(words);
-	auto packet = xc7series::ConfigurationPacket::InitWithWords(word_span);
+	auto packet =
+	    ConfigurationPacket<Series7::ConfRegType>::InitWithWords(word_span);
 	EXPECT_EQ(packet.first, absl::Span<uint32_t>());
 	ASSERT_TRUE(packet.second);
 	EXPECT_EQ(packet.second->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::Read);
-	EXPECT_EQ(packet.second->address(),
-	          xc7series::ConfigurationRegister::FDRI);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::Read);
+	EXPECT_EQ(packet.second->address(), Series7::ConfRegType::FDRI);
 	EXPECT_EQ(packet.second->data(), word_span.subspan(1));
 }
 
 TEST(ConfigPacket, InitWithType1Write) {
 	std::vector<uint32_t> words{MakeType1(0x2, 0x3, 2), 0xAA, 0xBB};
 	absl::Span<uint32_t> word_span(words);
-	auto packet = xc7series::ConfigurationPacket::InitWithWords(word_span);
+	auto packet =
+	    ConfigurationPacket<Series7::ConfRegType>::InitWithWords(word_span);
 	EXPECT_EQ(packet.first, absl::Span<uint32_t>());
 	ASSERT_TRUE(packet.second);
 	EXPECT_EQ(packet.second->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::Write);
-	EXPECT_EQ(packet.second->address(),
-	          xc7series::ConfigurationRegister::FDRO);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
+	EXPECT_EQ(packet.second->address(), Series7::ConfRegType::FDRO);
 	EXPECT_EQ(packet.second->data(), word_span.subspan(1));
 }
 
 TEST(ConfigPacket, InitWithType2WithoutPreviousPacketFails) {
 	std::vector<uint32_t> words{MakeType2(0x01, 12)};
 	absl::Span<uint32_t> word_span(words);
-	auto packet = xc7series::ConfigurationPacket::InitWithWords(word_span);
+	auto packet =
+	    ConfigurationPacket<Series7::ConfRegType>::InitWithWords(word_span);
 	EXPECT_EQ(packet.first, words);
 	EXPECT_FALSE(packet.second);
 }
 
 TEST(ConfigPacket, InitWithType2WithPreviousPacket) {
-	xc7series::ConfigurationPacket previous_packet(
+	ConfigurationPacket<Series7::ConfRegType> previous_packet(
 	    static_cast<unsigned int>(0x1),
-	    xc7series::ConfigurationPacket::Opcode::Read,
-	    xc7series::ConfigurationRegister::MFWR, absl::Span<uint32_t>());
+	    ConfigurationPacket<Series7::ConfRegType>::Opcode::Read,
+	    Series7::ConfRegType::MFWR, absl::Span<uint32_t>());
 	std::vector<uint32_t> words{
 	    MakeType2(0x01, 12), 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12};
 	absl::Span<uint32_t> word_span(words);
-	auto packet = xc7series::ConfigurationPacket::InitWithWords(
+	auto packet = ConfigurationPacket<Series7::ConfRegType>::InitWithWords(
 	    word_span, &previous_packet);
 	EXPECT_EQ(packet.first, absl::Span<uint32_t>());
 	ASSERT_TRUE(packet.second);
 	EXPECT_EQ(packet.second->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::Read);
-	EXPECT_EQ(packet.second->address(),
-	          xc7series::ConfigurationRegister::MFWR);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::Read);
+	EXPECT_EQ(packet.second->address(), Series7::ConfRegType::MFWR);
 	EXPECT_EQ(packet.second->data(), word_span.subspan(1));
 }

lib/xilinx/tests/xc7series/configuration_packetizer_test.cc

@@ -1,19 +1,20 @@
-#include <prjxray/xilinx/xc7series/configuration_packetizer.h>
-
 #include <map>
 #include <vector>
 
 #include <gtest/gtest.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+#include <prjxray/xilinx/architectures.h>
+#include <prjxray/xilinx/configuration_packetizer.h>
+
+using namespace prjxray::xilinx;
 
 TEST(ConfigurationPacketizerTest, EmptyConfigGeneratesNoPackets) {
 	auto part = xc7series::Part::FromFile("configuration_test.yaml");
 	ASSERT_TRUE(part);
 
 	std::map<xc7series::FrameAddress, std::vector<uint32_t>> frames;
-	xc7series::Configuration config(*part, &frames);
-	xc7series::ConfigurationPacketizer packetizer(config);
+	Configuration<Series7> config(*part, &frames);
+	ConfigurationPacketizer<Series7> packetizer(config);
 
 	EXPECT_EQ(packetizer.begin(), packetizer.end());
 }
@@ -26,12 +27,12 @@ TEST(ConfigurationPacketizerTest, ConfigWithFramesGeneratesPackets) {
 	frames[0] = std::vector<uint32_t>(101, 0xAA);
 	frames[1] = std::vector<uint32_t>(101, 0xBB);
 
-	xc7series::Configuration config(*part, &frames);
+	Configuration<Series7> config(*part, &frames);
 
 	EXPECT_EQ(config.frames().at(0), frames[0]);
 	EXPECT_EQ(config.frames().at(1), frames[1]);
 
-	xc7series::ConfigurationPacketizer packetizer(config);
+	ConfigurationPacketizer<Series7> packetizer(config);
 
 	auto packet = packetizer.begin();
 	ASSERT_NE(packet, packetizer.end());
@@ -39,32 +40,32 @@ TEST(ConfigurationPacketizerTest, ConfigWithFramesGeneratesPackets) {
 	// Write 0x0 to FAR
 	EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
 	EXPECT_EQ(packet->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::Write);
-	EXPECT_EQ(packet->address(), xc7series::ConfigurationRegister::FAR);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
+	EXPECT_EQ(packet->address(), Series7::ConfRegType::FAR);
 	EXPECT_EQ(packet->data(), std::vector<uint32_t>{0});
 
 	++packet;
 	ASSERT_NE(packet, packetizer.end());
 	EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
 	EXPECT_EQ(packet->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::Write);
-	EXPECT_EQ(packet->address(), xc7series::ConfigurationRegister::FDRI);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
+	EXPECT_EQ(packet->address(), Series7::ConfRegType::FDRI);
 	EXPECT_EQ(packet->data(), frames[0]);
 
 	++packet;
 	ASSERT_NE(packet, packetizer.end());
 	EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
 	EXPECT_EQ(packet->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::Write);
-	EXPECT_EQ(packet->address(), xc7series::ConfigurationRegister::FAR);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
+	EXPECT_EQ(packet->address(), Series7::ConfRegType::FAR);
 	EXPECT_EQ(packet->data(), std::vector<uint32_t>{1});
 
 	++packet;
 	ASSERT_NE(packet, packetizer.end());
 	EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
 	EXPECT_EQ(packet->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::Write);
-	EXPECT_EQ(packet->address(), xc7series::ConfigurationRegister::FDRI);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
+	EXPECT_EQ(packet->address(), Series7::ConfRegType::FDRI);
 	EXPECT_EQ(packet->data(), frames[1]);
 
 	++packet;
@@ -81,16 +82,16 @@ TEST(ConfigurationPacketizerTest, ConfigWithFrameAtEndOfRowGeneratesZerofill) {
 	std::map<xc7series::FrameAddress, std::vector<uint32_t>> frames;
 	frames[last_frame_in_first_row] = std::vector<uint32_t>(101, 0xAA);
 
-	xc7series::Configuration config(*part, &frames);
-	xc7series::ConfigurationPacketizer packetizer(config);
+	Configuration<Series7> config(*part, &frames);
+	ConfigurationPacketizer<Series7> packetizer(config);
 
 	auto packet = packetizer.begin();
 	ASSERT_NE(packet, packetizer.end());
 
 	EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
 	EXPECT_EQ(packet->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::Write);
-	EXPECT_EQ(packet->address(), xc7series::ConfigurationRegister::FAR);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
+	EXPECT_EQ(packet->address(), Series7::ConfRegType::FAR);
 	EXPECT_EQ(packet->data(),
 	          std::vector<uint32_t>{last_frame_in_first_row});
 
@@ -98,18 +99,18 @@ TEST(ConfigurationPacketizerTest, ConfigWithFrameAtEndOfRowGeneratesZerofill) {
 	ASSERT_NE(packet, packetizer.end());
 	EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(1));
 	EXPECT_EQ(packet->opcode(),
-	          xc7series::ConfigurationPacket::Opcode::Write);
-	EXPECT_EQ(packet->address(), xc7series::ConfigurationRegister::FDRI);
+	          ConfigurationPacket<Series7::ConfRegType>::Opcode::Write);
+	EXPECT_EQ(packet->address(), Series7::ConfRegType::FDRI);
 	EXPECT_EQ(packet->data(), frames[last_frame_in_first_row]);
 
 	for (int ii = 0; ii < 202; ++ii) {
 		++packet;
 		ASSERT_NE(packet, packetizer.end());
 		EXPECT_EQ(packet->header_type(), static_cast<unsigned int>(0));
-		EXPECT_EQ(packet->opcode(),
-		          xc7series::ConfigurationPacket::Opcode::NOP);
-		EXPECT_EQ(packet->address(),
-		          xc7series::ConfigurationRegister::CRC);
+		EXPECT_EQ(
+		    packet->opcode(),
+		    ConfigurationPacket<Series7::ConfRegType>::Opcode::NOP);
+		EXPECT_EQ(packet->address(), Series7::ConfRegType::CRC);
 		EXPECT_EQ(packet->data(), std::vector<uint32_t>());
 	}
 

lib/xilinx/tests/xc7series/configuration_test.cc

@@ -1,5 +1,3 @@
-#include <prjxray/xilinx/xc7series/configuration.h>
-
 #include <cstdint>
 #include <iostream>
 #include <vector>
@@ -7,17 +5,18 @@
 #include <absl/types/span.h>
 #include <gtest/gtest.h>
 #include <prjxray/memory_mapped_file.h>
-#include <prjxray/xilinx/xc7series/configuration_packet.h>
-#include <prjxray/xilinx/xc7series/configuration_register.h>
-#include <prjxray/xilinx/xc7series/frame_address.h>
-#include <prjxray/xilinx/xc7series/frames.h>
-#include <prjxray/xilinx/xc7series/part.h>
-#include <prjxray/xilinx/xc7series/utils.h>
+#include <prjxray/xilinx/architectures.h>
+#include <prjxray/xilinx/bitstream_reader.h>
+#include <prjxray/xilinx/configuration.h>
+#include <prjxray/xilinx/configuration_packet.h>
+#include <prjxray/xilinx/configuration_register.h>
+#include <prjxray/xilinx/frames.h>
 #include <yaml-cpp/yaml.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
+
 TEST(ConfigurationTest, ConstructFromPacketsWithSingleFrame) {
-	std::vector<xc7series::FrameAddress> test_part_addresses;
+	std::vector<Series7::FrameAddress> test_part_addresses;
 	test_part_addresses.push_back(0x4567);
 	test_part_addresses.push_back(0x4568);
 
@@ -28,35 +27,35 @@ TEST(ConfigurationTest, ConstructFromPacketsWithSingleFrame) {
 	std::vector<uint32_t> frame_address{0x4567};
 	std::vector<uint32_t> frame(101, 0xAA);
 
-	std::vector<xc7series::ConfigurationPacket> packets{
+	std::vector<ConfigurationPacket<Series7::ConfRegType>> packets{
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::IDCODE,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::IDCODE,
 	        absl::MakeSpan(idcode),
 	    },
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::FAR,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::FAR,
 	        absl::MakeSpan(frame_address),
 	    },
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::CMD,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::CMD,
 	        absl::MakeSpan(cmd),
 	    },
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::FDRI,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::FDRI,
 	        absl::MakeSpan(frame),
 	    },
 	};
 
 	auto test_config =
-	    xc7series::Configuration::InitWithPackets(test_part, packets);
+	    Configuration<Series7>::InitWithPackets(test_part, packets);
 	ASSERT_TRUE(test_config);
 
 	EXPECT_EQ(test_config->part().idcode(), static_cast<uint32_t>(0x1234));
@@ -81,35 +80,35 @@ TEST(ConfigurationTest, ConstructFromPacketsWithAutoincrement) {
 	std::vector<uint32_t> frame(202, 0xAA);
 	std::fill_n(frame.begin() + 101, 101, 0xBB);
 
-	std::vector<xc7series::ConfigurationPacket> packets{
+	std::vector<ConfigurationPacket<Series7::ConfRegType>> packets{
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::IDCODE,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::IDCODE,
 	        absl::MakeSpan(idcode),
 	    },
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::FAR,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::FAR,
 	        absl::MakeSpan(frame_address),
 	    },
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::CMD,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::CMD,
 	        absl::MakeSpan(cmd),
 	    },
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::FDRI,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::FDRI,
 	        absl::MakeSpan(frame),
 	    },
 	};
 
 	auto test_config =
-	    xc7series::Configuration::InitWithPackets(test_part, packets);
+	    Configuration<Series7>::InitWithPackets(test_part, packets);
 	ASSERT_TRUE(test_config);
 
 	absl::Span<uint32_t> frame_span(frame);
@@ -130,25 +129,24 @@ TEST(ConfigurationTest,
 	    "configuration_test.debug.bit");
 	ASSERT_TRUE(debug_bitstream);
 
-	auto debug_reader = xc7series::BitstreamReader::InitWithBytes(
+	auto debug_reader = BitstreamReader<Series7>::InitWithBytes(
 	    debug_bitstream->as_bytes());
 	ASSERT_TRUE(debug_reader);
 
 	auto debug_configuration =
-	    xc7series::Configuration::InitWithPackets(*part, *debug_reader);
+	    Configuration<Series7>::InitWithPackets(*part, *debug_reader);
 	ASSERT_TRUE(debug_configuration);
 
 	auto perframecrc_bitstream = prjxray::MemoryMappedFile::InitWithFile(
 	    "configuration_test.perframecrc.bit");
 	ASSERT_TRUE(perframecrc_bitstream);
 
-	auto perframecrc_reader = xc7series::BitstreamReader::InitWithBytes(
+	auto perframecrc_reader = BitstreamReader<Series7>::InitWithBytes(
 	    perframecrc_bitstream->as_bytes());
 	ASSERT_TRUE(perframecrc_reader);
 
 	auto perframecrc_configuration =
-	    xc7series::Configuration::InitWithPackets(*part,
-	                                              *perframecrc_reader);
+	    Configuration<Series7>::InitWithPackets(*part, *perframecrc_reader);
 	ASSERT_TRUE(perframecrc_configuration);
 
 	for (auto debug_frame : debug_configuration->frames()) {
@@ -187,24 +185,24 @@ TEST(ConfigurationTest, DebugAndNormalBitstreamsProduceEqualConfigurations) {
 	    "configuration_test.debug.bit");
 	ASSERT_TRUE(debug_bitstream);
 
-	auto debug_reader = xc7series::BitstreamReader::InitWithBytes(
+	auto debug_reader = BitstreamReader<Series7>::InitWithBytes(
 	    debug_bitstream->as_bytes());
 	ASSERT_TRUE(debug_reader);
 
 	auto debug_configuration =
-	    xc7series::Configuration::InitWithPackets(*part, *debug_reader);
+	    Configuration<Series7>::InitWithPackets(*part, *debug_reader);
 	ASSERT_TRUE(debug_configuration);
 
 	auto normal_bitstream =
 	    prjxray::MemoryMappedFile::InitWithFile("configuration_test.bit");
 	ASSERT_TRUE(normal_bitstream);
 
-	auto normal_reader = xc7series::BitstreamReader::InitWithBytes(
+	auto normal_reader = BitstreamReader<Series7>::InitWithBytes(
 	    normal_bitstream->as_bytes());
 	ASSERT_TRUE(normal_reader);
 
 	auto normal_configuration =
-	    xc7series::Configuration::InitWithPackets(*part, *normal_reader);
+	    Configuration<Series7>::InitWithPackets(*part, *normal_reader);
 	ASSERT_TRUE(normal_configuration);
 
 	for (auto debug_frame : debug_configuration->frames()) {
@@ -250,7 +248,7 @@ TEST(ConfigurationTest, CheckForPaddingFrames) {
 	auto test_part = absl::optional<xc7series::Part>(
 	    xc7series::Part(0x1234, test_part_addresses));
 
-	xc7series::Frames frames;
+	Frames<Series7> frames;
 	frames.getFrames().emplace(std::make_pair(
 	    test_part_addresses.at(0), std::vector<uint32_t>(101, 0xAA)));
 	frames.getFrames().emplace(std::make_pair(
@@ -263,9 +261,9 @@ TEST(ConfigurationTest, CheckForPaddingFrames) {
 	    test_part_addresses.at(4), std::vector<uint32_t>(101, 0xEE)));
 	ASSERT_EQ(frames.getFrames().size(), 5);
 
-	xc7series::PacketData packet_data =
-	    xc7series::createType2ConfigurationPacketData(frames.getFrames(),
-	                                                  test_part);
+	Configuration<Series7>::PacketData packet_data =
+	    Configuration<Series7>::createType2ConfigurationPacketData(
+	        frames.getFrames(), test_part);
 	// createType2ConfigurationPacketData should detect 4
 	// row/half/block_type switches thus add 4*2 padding frames  moreover 2
 	// extra padding frames are added at the end of the creation of the data
@@ -277,35 +275,35 @@ TEST(ConfigurationTest, CheckForPaddingFrames) {
 	std::vector<uint32_t> cmd{0x0001};
 	std::vector<uint32_t> frame_address{0x0};
 
-	std::vector<xc7series::ConfigurationPacket> packets{
+	std::vector<ConfigurationPacket<Series7::ConfRegType>> packets{
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::IDCODE,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::IDCODE,
 	        absl::MakeSpan(idcode),
 	    },
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::FAR,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::FAR,
 	        absl::MakeSpan(frame_address),
 	    },
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::CMD,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::CMD,
 	        absl::MakeSpan(cmd),
 	    },
 	    {
 	        static_cast<unsigned int>(0x1),
-	        xc7series::ConfigurationPacket::Opcode::Write,
-	        xc7series::ConfigurationRegister::FDRI,
+	        ConfigurationPacket<Series7::ConfRegType>::Opcode::Write,
+	        Series7::ConfRegType::FDRI,
 	        absl::MakeSpan(packet_data),
 	    },
 	};
 
 	auto test_config =
-	    xc7series::Configuration::InitWithPackets(*test_part, packets);
+	    Configuration<Series7>::InitWithPackets(*test_part, packets);
 	ASSERT_EQ(test_config->frames().size(), 5);
 	for (auto& frame : test_config->frames()) {
 		EXPECT_EQ(frame.second, frames.getFrames().at(frame.first));

lib/xilinx/tests/xc7series/crc_test.cc

@@ -2,7 +2,7 @@
 
 #include <gtest/gtest.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
 
 TEST(IcapCrcTest, SimpleTests) {
 	// CRC for Zero Data

lib/xilinx/tests/xc7series/ecc_test.cc

@@ -2,7 +2,7 @@
 
 #include <gtest/gtest.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
 
 TEST(IcapEccTest, SimpleTests) {
 	// ECC for Zero Data

lib/xilinx/tests/xc7series/frame_address_test.cc

@@ -2,7 +2,7 @@
 
 #include <gtest/gtest.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
 
 TEST(FrameAddressTest, YamlEncode) {
 	xc7series::FrameAddress address(xc7series::BlockType::BLOCK_RAM, false,

lib/xilinx/tests/xc7series/frames_test.cc

@@ -2,10 +2,12 @@
 
 #include <gtest/gtest.h>
 
-#include <prjxray/xilinx/xc7series/frames.h>
+#include <prjxray/xilinx/architectures.h>
+#include <prjxray/xilinx/frames.h>
 #include <prjxray/xilinx/xc7series/part.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
+
 TEST(FramesTest, FillInMissingFrames) {
 	std::vector<xc7series::FrameAddress> test_part_addresses = {
 	    xc7series::FrameAddress(xc7series::BlockType::CLB_IO_CLK, false, 0,
@@ -21,7 +23,7 @@ TEST(FramesTest, FillInMissingFrames) {
 
 	xc7series::Part test_part(0x1234, test_part_addresses);
 
-	xc7series::Frames frames;
+	Frames<Series7> frames;
 	frames.getFrames().emplace(std::make_pair(
 	    xc7series::FrameAddress(2), std::vector<uint32_t>(101, 0xCC)));
 	frames.getFrames().emplace(std::make_pair(

lib/xilinx/tests/xc7series/global_clock_region_test.cc

@@ -2,7 +2,7 @@
 
 #include <gtest/gtest.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
 
 TEST(GlobalClockRegionTest, IsValidFrameAddress) {
 	std::vector<xc7series::FrameAddress> addresses;

lib/xilinx/tests/xc7series/part_test.cc

@@ -2,7 +2,7 @@
 
 #include <gtest/gtest.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
 
 TEST(PartTest, IsValidFrameAddress) {
 	std::vector<xc7series::FrameAddress> addresses;

lib/xilinx/tests/xc7series/row_test.cc

@@ -2,7 +2,7 @@
 
 #include <gtest/gtest.h>
 
-namespace xc7series = prjxray::xilinx::xc7series;
+using namespace prjxray::xilinx;
 
 TEST(RowTest, IsValidFrameAddress) {
 	std::vector<xc7series::FrameAddress> addresses;