Add reset config to allow upload to PS region

Signed-off-by: Andrew Butt <butta@seas.upenn.edu>

utils/openocd/board-digilent-pynqz1.cfg

@@ -58,3 +58,14 @@ proc zynqpl_program {tap} {
 	irscan $tap $XC7_BYPASS
 	runtest 2000
 }
+
+proc zynqpl_reset_release {target} {
+   # Unlock SLCR
+    $target mww 0xf8000008 0xdf0d
+    # Enable level shifters, both PL-PS and PS-PL
+    $target mww 0xf8000900 0xF
+    # Release FPGA reset
+    $target mww 0xf8000240 0x0
+    # Lock SLCR
+    $target mww 0xf8000004 0x767b
+}