From 5d4f056864ca764bc9f6918c05083446d8ea9c6f Mon Sep 17 00:00:00 2001
From: Andrew Butt <butta@seas.upenn.edu>
Date: Fri, 29 May 2020 09:54:48 -0400
Subject: [PATCH] Add reset config to allow upload to PS region

Signed-off-by: Andrew Butt <butta@seas.upenn.edu>
---
 utils/openocd/board-digilent-pynqz1.cfg | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/utils/openocd/board-digilent-pynqz1.cfg b/utils/openocd/board-digilent-pynqz1.cfg
index f44998cf..06b286d3 100644
--- a/utils/openocd/board-digilent-pynqz1.cfg
+++ b/utils/openocd/board-digilent-pynqz1.cfg
@@ -58,3 +58,14 @@ proc zynqpl_program {tap} {
 	irscan $tap $XC7_BYPASS
 	runtest 2000
 }
+
+proc zynqpl_reset_release {target} {
+   # Unlock SLCR
+    $target mww 0xf8000008 0xdf0d
+    # Enable level shifters, both PL-PS and PS-PL
+    $target mww 0xf8000900 0xF
+    # Release FPGA reset
+    $target mww 0xf8000240 0x0
+    # Lock SLCR
+    $target mww 0xf8000004 0x767b
+}