docs: Whitespace cleanup.

Signed-off-by: Tim 'mithro' Ansell <[email protected]>
This commit is contained in:
Tim 'mithro' Ansell
2019-04-04 10:09:24 -07:00
parent 487b28c43b
commit 31ef5df168
2 changed files with 2 additions and 2 deletions
+1 -1
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@@ -8,7 +8,7 @@ This is where we describe the logical components in a device to VPR.
* VtR stands for `Verilog to Routing <https://verilogtorouting.org/>`_,
* VPR stands for VtR Place and Route.
* VtR also has its own synthesis tool called ODIN-II, but we are using `Yosys <https://github.com/YosysHQ/yosys>`_ instead of that.
Fuzzers
^^^^^^^