mirror of https://github.com/openXC7/prjxray.git
Add 070-tileconn fuzzer
Signed-off-by: Clifford Wolf <clifford@clifford.at> Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
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/specimen_*/
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/tileconn.json
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N := 1
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SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
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SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
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database: $(SPECIMENS_OK)
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cp specimen_001/tileconn.json tileconn.json
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pushdb:
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cp tileconn.json ${XRAY_DATABASE_DIR}/$(XRAY_DATABASE)/tileconn.json
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$(SPECIMENS_OK):
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bash generate.sh $(subst /OK,,$@)
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touch $@
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clean:
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rm -rf specimen_[0-9][0-9][0-9]/ tileconn.json
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.PHONY: database pushdb clean
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#!/usr/bin/env python3
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import os, sys, json, re
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database = dict()
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print("Loading %s grid." % os.getenv("XRAY_DATABASE"))
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with open("%s/%s/tilegrid.json" % (os.getenv("XRAY_DATABASE_DIR"), os.getenv("XRAY_DATABASE")), "r") as f:
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grid = json.load(f)
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print("Loading tilepairs.txt.")
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with open("tilepairs.txt") as f:
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for line in f:
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w1, w2 = line.split()
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t1, w1 = w1.split("/")
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t2, w2 = w2.split("/")
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t1_type = grid["tiles"][t1]["type"]
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t1_grid_x = grid["tiles"][t1]["grid_x"]
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t1_grid_y = grid["tiles"][t1]["grid_y"]
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t2_type = grid["tiles"][t2]["type"]
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t2_grid_x = grid["tiles"][t2]["grid_x"]
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t2_grid_y = grid["tiles"][t2]["grid_y"]
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if (t1_grid_x < t2_grid_x) or ((t1_grid_x == t2_grid_x) and (t1_grid_y < t2_grid_y)):
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key = (t1_type, t2_type, t2_grid_x-t1_grid_x, t2_grid_y-t1_grid_y)
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if key not in database:
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database[key] = set()
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database[key].add((w1, w2))
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else:
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key = (t2_type, t1_type, t1_grid_x-t2_grid_x, t1_grid_y-t2_grid_y)
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if key not in database:
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database[key] = set()
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database[key].add((w2, w1))
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print("Converting database.")
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json_db = list()
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for key in sorted(database.keys()):
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(t1, t2, dx, dy) = key
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entry = dict()
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entry["tile_types"] = [t1, t2]
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entry["grid_deltas"] = [dx, dy]
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entry["wire_pairs"] = list(sorted(database[key]))
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json_db.append(entry)
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print("Writing tileconn.json.")
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with open("tileconn.json", "w") as f:
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print(json.dumps(json_db, sort_keys=True, indent="\t"), file=f)
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#!/bin/bash -x
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source ${XRAY_GENHEADER}
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vivado -mode batch -source ../generate.tcl
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# python3 ../generate.py design_*.delta > tilegrid.json
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if 0 {
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create_project -force -part $::env(XRAY_PART) design design
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read_verilog ../top.v
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synth_design -top top
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set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports a]
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set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports y]
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create_pblock roi
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resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
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set_property CFGBVS VCCO [current_design]
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set_property CONFIG_VOLTAGE 3.3 [current_design]
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set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
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place_design
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route_design
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write_checkpoint -force design.dcp
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# write_bitstream -force design.bit
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}
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proc print_tile_pair {fp t1 t2} {
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set t1 [get_tiles $t1]
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set t2 [get_tiles $t2]
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puts "Checking $t1 against $t2."
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set t1_nodes [lsort -unique [get_nodes -quiet -of_objects [get_wires -of_objects $t1]]]
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set t2_nodes [lsort -unique [get_nodes -quiet -of_objects [get_wires -of_objects $t2]]]
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set nodes {}
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foreach node $t1_nodes {
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if {$node in $t2_nodes} {
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lappend nodes $node
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}
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}
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foreach node $nodes {
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set t1_wires [get_wires -quiet -filter "TILE_NAME == $t1" -of_objects $node]
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set t2_wires [get_wires -quiet -filter "TILE_NAME == $t2" -of_objects $node]
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foreach w1 $t1_wires {
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foreach w2 $t2_wires {
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puts $fp "$w1 $w2"
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}
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}
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}
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}
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proc print_tile_pairs {fp lst} {
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for {set i 1} {$i < [llength $lst]} {incr i} {
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print_tile_pair $fp [lindex $lst [expr $i - 1]] [lindex $lst $i]
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}
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}
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set fp [open "tilepairs.txt" w]
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if {$::env(XRAY_DATABASE) == "artix7"} {
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# horizontal pairs
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print_tile_pairs $fp "INT_R_X13Y114 CLBLL_R_X13Y114 CLBLL_L_X14Y114 INT_L_X14Y114 INT_R_X15Y114"
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print_tile_pairs $fp "VBRK_X29Y125 CLBLM_L_X10Y120 INT_L_X10Y120 INT_R_X11Y120 CLBLM_R_X11Y120 VBRK_X34Y125 CLBLL_L_X12Y120"
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print_tile_pairs $fp "CLBLL_R_X17Y113 VFRAME_X47Y118"
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print_tile_pairs $fp "HCLK_VBRK_X29Y130 HCLK_CLB_X30Y130 HCLK_L_X31Y130 HCLK_R_X32Y130 HCLK_CLB_X33Y130 HCLK_VBRK_X34Y130 HCLK_CLB_X35Y130"
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print_tile_pairs $fp "HCLK_CLB_X46Y130 HCLK_VFRAME_X47Y130"
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print_tile_pairs $fp "T_TERM_INT_X31Y156 T_TERM_INT_X32Y156"
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print_tile_pairs $fp "BRKH_CLB_X10Y99 BRKH_INT_X10Y99 BRKH_INT_X11Y99 BRKH_CLB_X11Y99"
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print_tile_pairs $fp "BRKH_B_TERM_INT_X36Y104 BRKH_B_TERM_INT_X37Y104"
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# vertical pairs
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print_tile_pairs $fp "CLBLM_L_X10Y115 CLBLM_L_X10Y114"
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print_tile_pairs $fp "INT_L_X10Y115 INT_L_X10Y114"
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print_tile_pairs $fp "INT_R_X11Y115 INT_R_X11Y114"
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print_tile_pairs $fp "CLBLM_R_X11Y115 CLBLM_R_X11Y114"
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print_tile_pairs $fp "VBRK_X34Y120 VBRK_X34Y119"
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print_tile_pairs $fp "CLBLL_L_X12Y115 CLBLL_L_X12Y114"
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print_tile_pairs $fp "CLBLL_R_X13Y115 CLBLL_R_X13Y115"
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print_tile_pairs $fp "VFRAME_X47Y120 VFRAME_X47Y119"
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print_tile_pairs $fp "T_TERM_INT_X31Y156 INT_L_X10Y149"
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print_tile_pairs $fp "T_TERM_INT_X32Y156 INT_R_X11Y149"
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print_tile_pairs $fp "CLBLM_L_X10Y100 BRKH_CLB_X10Y99"
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print_tile_pairs $fp "INT_L_X10Y100 BRKH_INT_X10Y99"
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print_tile_pairs $fp "INT_R_X11Y100 BRKH_INT_X11Y99"
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print_tile_pairs $fp "CLBLM_R_X11Y100 BRKH_CLB_X11Y99"
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print_tile_pairs $fp "INT_L_X12Y100 BRKH_B_TERM_INT_X36Y104"
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print_tile_pairs $fp "INT_R_X13Y100 BRKH_B_TERM_INT_X37Y104"
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}
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close $fp
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module top(input a, output y);
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assign y = a;
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endmodule
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