From 27fd7df5e8cd945d6c0132cf06ce4263e121df29 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 26 Nov 2017 00:41:45 +0100 Subject: [PATCH] Add 070-tileconn fuzzer Signed-off-by: Clifford Wolf Signed-off-by: Tim 'mithro' Ansell --- fuzzers/070-tileconn/.gitignore | 2 + fuzzers/070-tileconn/Makefile | 20 +++++++ fuzzers/070-tileconn/generate.py | 50 ++++++++++++++++++ fuzzers/070-tileconn/generate.sh | 8 +++ fuzzers/070-tileconn/generate.tcl | 88 +++++++++++++++++++++++++++++++ fuzzers/070-tileconn/top.v | 3 ++ 6 files changed, 171 insertions(+) create mode 100644 fuzzers/070-tileconn/.gitignore create mode 100644 fuzzers/070-tileconn/Makefile create mode 100644 fuzzers/070-tileconn/generate.py create mode 100755 fuzzers/070-tileconn/generate.sh create mode 100644 fuzzers/070-tileconn/generate.tcl create mode 100644 fuzzers/070-tileconn/top.v diff --git a/fuzzers/070-tileconn/.gitignore b/fuzzers/070-tileconn/.gitignore new file mode 100644 index 00000000..15ab97d1 --- /dev/null +++ b/fuzzers/070-tileconn/.gitignore @@ -0,0 +1,2 @@ +/specimen_*/ +/tileconn.json diff --git a/fuzzers/070-tileconn/Makefile b/fuzzers/070-tileconn/Makefile new file mode 100644 index 00000000..56f10429 --- /dev/null +++ b/fuzzers/070-tileconn/Makefile @@ -0,0 +1,20 @@ + +N := 1 +SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N))) +SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS)) + +database: $(SPECIMENS_OK) + cp specimen_001/tileconn.json tileconn.json + +pushdb: + cp tileconn.json ${XRAY_DATABASE_DIR}/$(XRAY_DATABASE)/tileconn.json + +$(SPECIMENS_OK): + bash generate.sh $(subst /OK,,$@) + touch $@ + +clean: + rm -rf specimen_[0-9][0-9][0-9]/ tileconn.json + +.PHONY: database pushdb clean + diff --git a/fuzzers/070-tileconn/generate.py b/fuzzers/070-tileconn/generate.py new file mode 100644 index 00000000..3f37b6cd --- /dev/null +++ b/fuzzers/070-tileconn/generate.py @@ -0,0 +1,50 @@ +#!/usr/bin/env python3 + +import os, sys, json, re + +database = dict() + +print("Loading %s grid." % os.getenv("XRAY_DATABASE")) +with open("%s/%s/tilegrid.json" % (os.getenv("XRAY_DATABASE_DIR"), os.getenv("XRAY_DATABASE")), "r") as f: + grid = json.load(f) + +print("Loading tilepairs.txt.") +with open("tilepairs.txt") as f: + for line in f: + w1, w2 = line.split() + t1, w1 = w1.split("/") + t2, w2 = w2.split("/") + + t1_type = grid["tiles"][t1]["type"] + t1_grid_x = grid["tiles"][t1]["grid_x"] + t1_grid_y = grid["tiles"][t1]["grid_y"] + + t2_type = grid["tiles"][t2]["type"] + t2_grid_x = grid["tiles"][t2]["grid_x"] + t2_grid_y = grid["tiles"][t2]["grid_y"] + + if (t1_grid_x < t2_grid_x) or ((t1_grid_x == t2_grid_x) and (t1_grid_y < t2_grid_y)): + key = (t1_type, t2_type, t2_grid_x-t1_grid_x, t2_grid_y-t1_grid_y) + if key not in database: + database[key] = set() + database[key].add((w1, w2)) + else: + key = (t2_type, t1_type, t1_grid_x-t2_grid_x, t1_grid_y-t2_grid_y) + if key not in database: + database[key] = set() + database[key].add((w2, w1)) + +print("Converting database.") +json_db = list() +for key in sorted(database.keys()): + (t1, t2, dx, dy) = key + entry = dict() + entry["tile_types"] = [t1, t2] + entry["grid_deltas"] = [dx, dy] + entry["wire_pairs"] = list(sorted(database[key])) + json_db.append(entry) + +print("Writing tileconn.json.") +with open("tileconn.json", "w") as f: + print(json.dumps(json_db, sort_keys=True, indent="\t"), file=f) + diff --git a/fuzzers/070-tileconn/generate.sh b/fuzzers/070-tileconn/generate.sh new file mode 100755 index 00000000..0f364af6 --- /dev/null +++ b/fuzzers/070-tileconn/generate.sh @@ -0,0 +1,8 @@ +#!/bin/bash -x + +source ${XRAY_GENHEADER} + +vivado -mode batch -source ../generate.tcl + +# python3 ../generate.py design_*.delta > tilegrid.json + diff --git a/fuzzers/070-tileconn/generate.tcl b/fuzzers/070-tileconn/generate.tcl new file mode 100644 index 00000000..66b6d1db --- /dev/null +++ b/fuzzers/070-tileconn/generate.tcl @@ -0,0 +1,88 @@ +if 0 { +create_project -force -part $::env(XRAY_PART) design design + +read_verilog ../top.v +synth_design -top top + +set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports a] +set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports y] + +create_pblock roi +resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)" + +set_property CFGBVS VCCO [current_design] +set_property CONFIG_VOLTAGE 3.3 [current_design] +set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design] + +place_design +route_design + +write_checkpoint -force design.dcp +# write_bitstream -force design.bit +} + +proc print_tile_pair {fp t1 t2} { + set t1 [get_tiles $t1] + set t2 [get_tiles $t2] + + puts "Checking $t1 against $t2." + + set t1_nodes [lsort -unique [get_nodes -quiet -of_objects [get_wires -of_objects $t1]]] + set t2_nodes [lsort -unique [get_nodes -quiet -of_objects [get_wires -of_objects $t2]]] + set nodes {} + + foreach node $t1_nodes { + if {$node in $t2_nodes} { + lappend nodes $node + } + } + + foreach node $nodes { + set t1_wires [get_wires -quiet -filter "TILE_NAME == $t1" -of_objects $node] + set t2_wires [get_wires -quiet -filter "TILE_NAME == $t2" -of_objects $node] + foreach w1 $t1_wires { + foreach w2 $t2_wires { + puts $fp "$w1 $w2" + } + } + } +} + +proc print_tile_pairs {fp lst} { + for {set i 1} {$i < [llength $lst]} {incr i} { + print_tile_pair $fp [lindex $lst [expr $i - 1]] [lindex $lst $i] + } +} + +set fp [open "tilepairs.txt" w] +if {$::env(XRAY_DATABASE) == "artix7"} { + # horizontal pairs + print_tile_pairs $fp "INT_R_X13Y114 CLBLL_R_X13Y114 CLBLL_L_X14Y114 INT_L_X14Y114 INT_R_X15Y114" + print_tile_pairs $fp "VBRK_X29Y125 CLBLM_L_X10Y120 INT_L_X10Y120 INT_R_X11Y120 CLBLM_R_X11Y120 VBRK_X34Y125 CLBLL_L_X12Y120" + print_tile_pairs $fp "CLBLL_R_X17Y113 VFRAME_X47Y118" + print_tile_pairs $fp "HCLK_VBRK_X29Y130 HCLK_CLB_X30Y130 HCLK_L_X31Y130 HCLK_R_X32Y130 HCLK_CLB_X33Y130 HCLK_VBRK_X34Y130 HCLK_CLB_X35Y130" + print_tile_pairs $fp "HCLK_CLB_X46Y130 HCLK_VFRAME_X47Y130" + print_tile_pairs $fp "T_TERM_INT_X31Y156 T_TERM_INT_X32Y156" + print_tile_pairs $fp "BRKH_CLB_X10Y99 BRKH_INT_X10Y99 BRKH_INT_X11Y99 BRKH_CLB_X11Y99" + print_tile_pairs $fp "BRKH_B_TERM_INT_X36Y104 BRKH_B_TERM_INT_X37Y104" + + # vertical pairs + print_tile_pairs $fp "CLBLM_L_X10Y115 CLBLM_L_X10Y114" + print_tile_pairs $fp "INT_L_X10Y115 INT_L_X10Y114" + print_tile_pairs $fp "INT_R_X11Y115 INT_R_X11Y114" + print_tile_pairs $fp "CLBLM_R_X11Y115 CLBLM_R_X11Y114" + print_tile_pairs $fp "VBRK_X34Y120 VBRK_X34Y119" + print_tile_pairs $fp "CLBLL_L_X12Y115 CLBLL_L_X12Y114" + print_tile_pairs $fp "CLBLL_R_X13Y115 CLBLL_R_X13Y115" + print_tile_pairs $fp "VFRAME_X47Y120 VFRAME_X47Y119" + print_tile_pairs $fp "T_TERM_INT_X31Y156 INT_L_X10Y149" + print_tile_pairs $fp "T_TERM_INT_X32Y156 INT_R_X11Y149" + print_tile_pairs $fp "CLBLM_L_X10Y100 BRKH_CLB_X10Y99" + print_tile_pairs $fp "INT_L_X10Y100 BRKH_INT_X10Y99" + print_tile_pairs $fp "INT_R_X11Y100 BRKH_INT_X11Y99" + print_tile_pairs $fp "CLBLM_R_X11Y100 BRKH_CLB_X11Y99" + print_tile_pairs $fp "INT_L_X12Y100 BRKH_B_TERM_INT_X36Y104" + print_tile_pairs $fp "INT_R_X13Y100 BRKH_B_TERM_INT_X37Y104" +} +close $fp + diff --git a/fuzzers/070-tileconn/top.v b/fuzzers/070-tileconn/top.v new file mode 100644 index 00000000..5a70fc18 --- /dev/null +++ b/fuzzers/070-tileconn/top.v @@ -0,0 +1,3 @@ +module top(input a, output y); + assign y = a; +endmodule