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Add a third IOI, LIOI_X0Y9, for special handling. Without this change, 

LIOI_X0Y9 has empty "bits" in tilegrid.json.  Note there is no RIOI at Y9,
since the bottom right region of the 100T is high speed serial IO.

Signed-off-by: Tim Callahan <tcal@google.com>
This commit is contained in:
Tim Callahan 2020-05-20 22:49:28 -07:00
parent 316461a42d
commit 26484851d7
1 changed files with 1 additions and 1 deletions
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2
settings/artix7_100t.sh
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@ -12,7 +12,7 @@ export XRAY_EXCLUDE_ROI_TILEGRID=""
# (special handling for frame addresses of certain IOIs -- see the script for details).
# This needs to be changed for any new device!
# If you have a FASM mismatch or unknown bits in IOIs, CHECK THIS FIRST.
export XRAY_IOI3_TILES="RIOI3_X57Y109 LIOI3_X0Y109"
export XRAY_IOI3_TILES="LIOI3_X0Y9 LIOI3_X0Y109 RIOI3_X57Y109"
# clock pin
export XRAY_PIN_00="Y22"