From 26484851d7972b9247593cbc932b1d3c128b0a34 Mon Sep 17 00:00:00 2001 From: Tim Callahan Date: Wed, 20 May 2020 22:49:28 -0700 Subject: [PATCH] Add a third IOI, LIOI_X0Y9, for special handling. Without this change, LIOI_X0Y9 has empty "bits" in tilegrid.json. Note there is no RIOI at Y9, since the bottom right region of the 100T is high speed serial IO. Signed-off-by: Tim Callahan --- settings/artix7_100t.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/settings/artix7_100t.sh b/settings/artix7_100t.sh index 919b0d6f..4a875a7f 100644 --- a/settings/artix7_100t.sh +++ b/settings/artix7_100t.sh @@ -12,7 +12,7 @@ export XRAY_EXCLUDE_ROI_TILEGRID="" # (special handling for frame addresses of certain IOIs -- see the script for details). # This needs to be changed for any new device! # If you have a FASM mismatch or unknown bits in IOIs, CHECK THIS FIRST. -export XRAY_IOI3_TILES="RIOI3_X57Y109 LIOI3_X0Y109" +export XRAY_IOI3_TILES="LIOI3_X0Y9 LIOI3_X0Y109 RIOI3_X57Y109" # clock pin export XRAY_PIN_00="Y22"