mirror of https://github.com/openXC7/prjxray.git
fasm2frame: optional value on simple elements
Remove INT prefixes not in segdb Better test cases Signed-off-by: John McMaster <johndmcmaster@gmail.com>
This commit is contained in:
parent
7110a67c55
commit
23813e3065
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@ -4,9 +4,37 @@ import os
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import re
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import sys
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import json
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import collections
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# Based on segprint function
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# Modified to return dict instead of list
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class FASMSyntaxError(Exception):
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pass
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def parsebit(val):
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'''Return "!012_23" => (12, 23, False)'''
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isset = True
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# Default is 0. Skip explicit call outs
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if val[0] == '!':
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isset = False
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val = val[1:]
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# 28_05 => 28, 05
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seg_word_column, word_bit_n = val.split('_')
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return int(seg_word_column), int(word_bit_n), isset
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'''
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Loosely based on segprint function
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Maybe better to return as two distinct dictionaries?
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{
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'tile.blah': {None: (12, 23)},
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'tile.meh': {
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'O5': [(11, 2, False), (12, 2, True)],
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'O6': [(11, 2, True), (12, 2, False)],
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},
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}
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'''
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segbitsdb = dict()
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@ -16,25 +44,49 @@ def get_database(segtype):
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segbitsdb[segtype] = {}
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def process(l):
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l = l.strip()
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# CLBLM_L.SLICEL_X1.ALUT.INIT[10] 29_14
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parts = line.split()
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name = parts[0]
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bit_vals = parts[1:]
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# Assumption
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# only 1 bit => non-enumerated value
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if len(bit_vals) == 1:
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seg_word_column, word_bit_n, isset = parsebit(bit_vals[0])
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if not isset:
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raise Exception(
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"Expect single bit DB entries to be set, got %s" % l)
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segbitsdb[segtype][name] = {None: (seg_word_column, word_bit_n)}
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else:
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# An enumerated value
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# Split the base name and selected key
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m = re.match(r'(.+)[.](.+)', name)
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name = m.group(1)
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key = m.group(2)
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# May or may not be the first key encountered
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m = segbitsdb[segtype].get(name, {})
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segbitsdb[segtype][name] = m
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l = []
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m[key] = l
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#print("Add %s.%s" % (name, key))
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for bit_val in bit_vals:
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seg_word_column, word_bit_n, isset = parsebit(bit_val)
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l.append((seg_word_column, word_bit_n, isset))
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with open("%s/%s/segbits_%s.db" % (os.getenv("XRAY_DATABASE_DIR"),
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os.getenv("XRAY_DATABASE"), segtype),
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"r") as f:
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for line in f:
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# CLBLM_L.SLICEL_X1.ALUT.INIT[10] 29_14
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parts = line.split()
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name = parts[0]
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vals = parts[1:]
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segbitsdb[segtype][name] = vals
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process(line)
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with open("%s/%s/segbits_int_%s.db" %
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(os.getenv("XRAY_DATABASE_DIR"), os.getenv("XRAY_DATABASE"),
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segtype[-1]), "r") as f:
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for line in f:
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# CLBLM_L.SLICEL_X1.ALUT.INIT[10] 29_14
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parts = line.split()
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name = parts[0]
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vals = parts[1:]
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segbitsdb[segtype][name] = vals
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process(line)
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return segbitsdb[segtype]
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@ -79,6 +131,10 @@ def dump_frm(f, frames):
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def run(f_in, f_out, sparse=False, debug=False):
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# address to array of 101 32 bit words
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frames = {}
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# Directives we've seen so far
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# Complain if there is a duplicate
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# Contains line number of last entry
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used_names = {}
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def frames_init():
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'''Set all frames to 0'''
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@ -97,6 +153,10 @@ def run(f_in, f_out, sparse=False, debug=False):
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'''Set given bit in given frame address and word'''
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frames[frame_addr][word_addr] |= 1 << bit_index
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def frame_clear(frame_addr, word_addr, bit_index):
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'''Set given bit in given frame address and word'''
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frames[frame_addr][word_addr] &= 0xFFFFFFFF ^ (1 << bit_index)
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with open("%s/%s/tilegrid.json" % (os.getenv("XRAY_DATABASE_DIR"),
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os.getenv("XRAY_DATABASE")), "r") as f:
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grid = json.load(f)
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@ -105,7 +165,7 @@ def run(f_in, f_out, sparse=False, debug=False):
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# Initiaize bitstream to 0
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frames_init()
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for l in f_in:
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for line_number, l in enumerate(f_in, 1):
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# Comment
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# Remove all text including and after #
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i = l.rfind('#')
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@ -119,16 +179,22 @@ def run(f_in, f_out, sparse=False, debug=False):
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# tile.site.stuff value
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# INT_L_X10Y102.CENTER_INTER_L.IMUX_L1 EE2END0
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m = re.match(
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r'([a-zA-Z0-9_]+)[.]([a-zA-Z0-9_]+)[.]([a-zA-Z0-9_.\[\]]+)[ ](.+)',
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l)
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# Optional value
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m = re.match(r'([a-zA-Z0-9_]+)[.]([a-zA-Z0-9_.\[\]]+)([ ](.+))?', l)
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if not m:
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raise Exception("Bad line: %s" % l)
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raise FASMSyntaxError("Bad line: %s" % l)
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tile = m.group(1)
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site = m.group(2)
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suffix = m.group(3)
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name = m.group(2)
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value = m.group(4)
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used_name = (tile, name)
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old_line_number = used_names.get(used_name, None)
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if old_line_number:
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raise FASMSyntaxError(
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"Duplicate name lines %d and %d, second line: %s" %
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(old_line_number, line_number, l))
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used_names[used_name] = line_number
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tilej = grid['tiles'][tile]
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seg = tilej['segment']
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segj = grid['segments'][seg]
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@ -140,53 +206,60 @@ def run(f_in, f_out, sparse=False, debug=False):
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for coli in range(segj['frames']):
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frame_init(seg_baseaddr + coli)
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# Now lets look up the bits we need frames for
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segdb = get_database(segj['type'])
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def clb2dbkey(tile, tilej, site, suffix, value):
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db_k = '%s.%s.%s' % (tilej['type'], site, suffix)
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return db_k
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def int2dbkey(tile, tilej, site, suffix, value):
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return '%s.%s.%s' % (tilej['type'], suffix, value)
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tile2dbkey = {
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'CLBLL_L': clb2dbkey,
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'CLBLL_R': clb2dbkey,
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'CLBLM_L': clb2dbkey,
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'CLBLM_R': clb2dbkey,
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'INT_L': int2dbkey,
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'INT_R': int2dbkey,
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'HCLK_L': int2dbkey,
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'HCLK_R': int2dbkey,
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}
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f = tile2dbkey.get(tilej['type'], None)
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if f is None:
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raise Exception("Unhandled segment type %s" % tilej['type'])
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db_k = f(tile, tilej, site, suffix, value)
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try:
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db_vals = segdb[db_k]
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except KeyError:
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raise Exception(
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"Key %s (from line '%s') not found in segment DB %s" %
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(db_k, l, segj['type']))
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for val in db_vals:
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# Default is 0. Skip explicit call outs
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if val[0] == '!':
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continue
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# 28_05 => 28, 05
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seg_word_column, word_bit_n = val.split('_')
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seg_word_column, word_bit_n = int(seg_word_column), int(word_bit_n)
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def update_segbit(seg_word_column, word_bit_n, isset):
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'''Set or clear a single bit in a segment at the given word column and word bit position'''
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# Now we have the word column and word bit index
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# Combine with the segments relative frame position to fully get the position
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frame_addr = seg_baseaddr + seg_word_column
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# 2 words per segment
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word_addr = seg_word_base + word_bit_n // 32
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bit_index = word_bit_n % 32
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frame_set(frame_addr, word_addr, bit_index)
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if isset:
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frame_set(frame_addr, word_addr, bit_index)
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else:
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frame_clear(frame_addr, word_addr, bit_index)
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# Now lets look up the bits we need frames for
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segdb = get_database(segj['type'])
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db_k = '%s.%s' % (tilej['type'], name)
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try:
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db_vals = segdb[db_k]
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except KeyError:
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raise FASMSyntaxError(
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"Segment DB %s, key %s not found from line '%s'" %
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(segj['type'], db_k, l))
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'''
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Creating the key depends on whether its an enumerated or a fixed value
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If its enumerated, the value forms part of the key
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We'd also like to ideally identify if there is a syntax error
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Ultimately probably easier to separate out these two cases
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'''
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# A single bit value?
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if None in db_vals:
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seg_word_column, word_bit_n = db_vals[None]
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# Value optional, defaults to 1
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isset = 1
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if value:
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isset = {'0': 0, '1': 1}.get(value, None)
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if isset is None:
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raise FASMSyntaxError(
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"Bad binary value %s on line %s" % (value, l))
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update_segbit(seg_word_column, word_bit_n, isset)
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# An enumerated value
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else:
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if not value:
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raise FASMSyntaxError(
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"Enumerable entry %s must have explicit value" % name)
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# Get the specific entry we need
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try:
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db_vals = db_vals[value]
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except KeyError:
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raise FASMSyntaxError(
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"Invalid entry %s. Valid entries are %s" %
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(value, db_vals.keys()))
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for seg_word_column, word_bit_n, isset in db_vals:
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update_segbit(seg_word_column, word_bit_n, isset)
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if debug:
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#dump_frames_verbose(frames)
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@ -5,29 +5,50 @@ import re
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import sys
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import json
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enumdb = dict()
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def get_enums(segtype):
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if segtype in enumdb:
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return enumdb[segtype]
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enumdb[segtype] = {}
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def process(l):
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l = l.strip()
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# CLBLM_L.SLICEL_X1.ALUT.INIT[10] 29_14
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parts = line.split()
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name = parts[0]
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bit_vals = parts[1:]
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# Assumption
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# only 1 bit => non-enumerated value
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enumdb[segtype][name] = len(bit_vals) != 1
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with open("%s/%s/segbits_%s.db" % (os.getenv("XRAY_DATABASE_DIR"),
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os.getenv("XRAY_DATABASE"), segtype),
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"r") as f:
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for line in f:
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process(line)
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with open("%s/%s/segbits_int_%s.db" %
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(os.getenv("XRAY_DATABASE_DIR"), os.getenv("XRAY_DATABASE"),
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segtype[-1]), "r") as f:
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for line in f:
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process(line)
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return enumdb[segtype]
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def isenum(segtype, tag):
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return get_enums(segtype)[tag]
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def tag2fasm(grid, seg, tag):
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'''Given tilegrid, segment name and tag, return fasm directive'''
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segj = grid['segments'][seg]
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def clbf(seg, tile, tag_post):
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return '%s.%s 1' % (tile, tag_post)
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def intf(seg, tile, tag_post):
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# Make the selection an argument of the configruation
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m = re.match(r'(.*)[.]([A-Za-z0-9_]+)', tag_post)
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which = m.group(1)
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value = m.group(2)
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site = {
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'clbll_l': 'CENTER_INTER_L',
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'clbll_r': 'CENTER_INTER_R',
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'clblm_l': 'CENTER_INTER_L',
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'clblm_r': 'CENTER_INTER_R',
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'hclk_l': 'HCLK_L',
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'hclk_r': 'HCLK_R',
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}[segj['type']]
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return '%s.%s.%s %s' % (tile, site, which, value)
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m = re.match(r'([A-Za-z0-9_]+)[.](.*)', tag)
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tile_type = m.group(1)
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tag_post = m.group(2)
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@ -39,20 +60,14 @@ def tag2fasm(grid, seg, tag):
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else:
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raise Exception("Couldn't find tile type %s" % tile_type)
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tag2asm = {
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'CLBLL_L': clbf,
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'CLBLL_R': clbf,
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'CLBLM_L': clbf,
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'CLBLM_R': clbf,
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'INT_L': intf,
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'INT_R': intf,
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'HCLK_L': intf,
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'HCLK_R': intf,
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}
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f = tag2asm.get(tile_type, None)
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if f is None:
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raise Exception("Unhandled segment type %s" % tile_type)
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return f(seg, tile, tag_post)
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if not isenum(segj['type'], tag):
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return '%s.%s 1' % (tile, tag_post)
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else:
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# Make the selection an argument of the configruation
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m = re.match(r'(.*)[.]([A-Za-z0-9_]+)', tag_post)
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which = m.group(1)
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value = m.group(2)
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return '%s.%s %s' % (tile, which, value)
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def run(f_in, f_out, sparse=False):
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@ -2,23 +2,22 @@
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# segprint -zd test_data/clb_ff/design.bits
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# FF as LDCE
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CLBLM_L_X10Y102.SLICEM_X0.AFF.DMUX.AX 1
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CLBLM_L_X10Y102.SLICEM_X0.AFF.DMUX AX
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CLBLM_L_X10Y102.SLICEM_X0.AFF.ZINI 1
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CLBLM_L_X10Y102.SLICEM_X0.AFF.ZRST 1
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CLBLM_L_X10Y102.SLICEM_X0.CEUSEDMUX 1
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# CLBLM_L_X10Y102.SLICEM_X0.SRUSEDMUX 1
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CLBLM_L_X10Y102.SLICEM_X0.SRUSEDMUX 1
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# CLBLM_L_X10Y102.SLICEM_X0.FFSYNC 0
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# CLBLM_L_X10Y102.SLICEM_X0.LATCH 0
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# Note: a number of pseudo pips here
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# Omitted
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INT_L_X10Y102.CENTER_INTER_L.BYP_ALT0 EE2END0
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INT_L_X10Y102.CENTER_INTER_L.BYP_ALT1 EL1END1
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INT_L_X10Y102.CENTER_INTER_L.CLK_L1 GCLK_L_B11_WEST
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INT_L_X10Y102.CENTER_INTER_L.CTRL_L1 ER1END2
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INT_L_X10Y102.CENTER_INTER_L.FAN_ALT7 BYP_BOUNCE0
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INT_L_X10Y102.CENTER_INTER_L.WW2BEG0 LOGIC_OUTS_L4
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INT_L_X10Y102.BYP_ALT0 EE2END0
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INT_L_X10Y102.BYP_ALT1 EL1END1
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INT_L_X10Y102.CLK_L1 GCLK_L_B11_WEST
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INT_L_X10Y102.CTRL_L1 ER1END2
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INT_L_X10Y102.FAN_ALT7 BYP_BOUNCE0
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INT_L_X10Y102.WW2BEG0 LOGIC_OUTS_L4
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HCLK_L_X31Y130.HCLK_L.ENABLE_BUFFER HCLK_CK_BUFHCLK8
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HCLK_L_X31Y130.HCLK_L.HCLK_LEAF_CLK_B_BOTL5 HCLK_CK_BUFHCLK8
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HCLK_L_X31Y130.ENABLE_BUFFER.HCLK_CK_BUFHCLK8 1
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HCLK_L_X31Y130.HCLK_LEAF_CLK_B_BOTL5 HCLK_CK_BUFHCLK8
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@ -0,0 +1,25 @@
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# Loosely based on
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# segprint -zd test_data/clb_ff/design.bits
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# FF as LDCE
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CLBLM_L_X10Y102.SLICEM_X0.AFF.DMUX AX
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CLBLM_L_X10Y102.SLICEM_X0.AFF.ZINI 1
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CLBLM_L_X10Y102.SLICEM_X0.AFF.ZRST 1
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CLBLM_L_X10Y102.SLICEM_X0.CEUSEDMUX 1
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CLBLM_L_X10Y102.SLICEM_X0.SRUSEDMUX 1
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# Unused bits explicitly set to 0
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CLBLM_L_X10Y102.SLICEM_X0.FFSYNC 0
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CLBLM_L_X10Y102.SLICEM_X0.LATCH 0
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# Note: a number of pseudo pips here
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# Omitted
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INT_L_X10Y102.BYP_ALT0 EE2END0
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INT_L_X10Y102.BYP_ALT1 EL1END1
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INT_L_X10Y102.CLK_L1 GCLK_L_B11_WEST
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INT_L_X10Y102.CTRL_L1 ER1END2
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INT_L_X10Y102.FAN_ALT7 BYP_BOUNCE0
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INT_L_X10Y102.WW2BEG0 LOGIC_OUTS_L4
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||||
|
||||
HCLK_L_X31Y130.ENABLE_BUFFER.HCLK_CK_BUFHCLK8 1
|
||||
HCLK_L_X31Y130.HCLK_LEAF_CLK_B_BOTL5 HCLK_CK_BUFHCLK8
|
||||
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
# Loosely based on
|
||||
# segprint -zd test_data/clb_ff/design.bits
|
||||
|
||||
# FF as LDCE
|
||||
CLBLM_L_X10Y102.SLICEM_X0.AFF.DMUX AX
|
||||
CLBLM_L_X10Y102.SLICEM_X0.AFF.ZINI 1
|
||||
CLBLM_L_X10Y102.SLICEM_X0.AFF.ZRST 1
|
||||
CLBLM_L_X10Y102.SLICEM_X0.CEUSEDMUX 1
|
||||
# CLBLM_L_X10Y102.SLICEM_X0.SRUSEDMUX 1
|
||||
# Optional entry
|
||||
CLBLM_L_X10Y102.SLICEM_X0.SRUSEDMUX
|
||||
|
||||
# Note: a number of pseudo pips here
|
||||
# Omitted
|
||||
INT_L_X10Y102.BYP_ALT0 EE2END0
|
||||
INT_L_X10Y102.BYP_ALT1 EL1END1
|
||||
INT_L_X10Y102.CLK_L1 GCLK_L_B11_WEST
|
||||
INT_L_X10Y102.CTRL_L1 ER1END2
|
||||
INT_L_X10Y102.FAN_ALT7 BYP_BOUNCE0
|
||||
INT_L_X10Y102.WW2BEG0 LOGIC_OUTS_L4
|
||||
|
||||
HCLK_L_X31Y130.ENABLE_BUFFER.HCLK_CK_BUFHCLK8 1
|
||||
HCLK_L_X31Y130.HCLK_LEAF_CLK_B_BOTL5 HCLK_CK_BUFHCLK8
|
||||
|
||||
|
|
@ -18,18 +18,18 @@ CLBLM_L_X10Y102.SLICEM_X0.ALUT.INIT[63] 1
|
|||
|
||||
# din bus
|
||||
# din[0]
|
||||
INT_L_X10Y102.CENTER_INTER_L.IMUX_L1 EE2END0
|
||||
INT_L_X10Y102.IMUX_L1 EE2END0
|
||||
# din[1]
|
||||
INT_L_X10Y102.CENTER_INTER_L.IMUX_L2 EE2END1
|
||||
INT_L_X10Y102.IMUX_L2 EE2END1
|
||||
# din[2]
|
||||
INT_L_X10Y102.CENTER_INTER_L.IMUX_L4 EE2END2
|
||||
INT_L_X10Y102.IMUX_L4 EE2END2
|
||||
# din[3]
|
||||
INT_L_X10Y102.CENTER_INTER_L.IMUX_L7 EE2END3
|
||||
INT_L_X10Y102.IMUX_L7 EE2END3
|
||||
# din[4]
|
||||
INT_L_X10Y102.CENTER_INTER_L.IMUX_L8 EL1END0
|
||||
INT_L_X10Y102.IMUX_L8 EL1END0
|
||||
# din[5]
|
||||
INT_L_X10Y102.CENTER_INTER_L.IMUX_L11 EL1END1
|
||||
INT_L_X10Y102.IMUX_L11 EL1END1
|
||||
|
||||
# dout[0]
|
||||
INT_L_X10Y102.CENTER_INTER_L.WW2BEG0 LOGIC_OUTS_L12
|
||||
INT_L_X10Y102.WW2BEG0 LOGIC_OUTS_L12
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,5 @@
|
|||
# TODO: need better coverage for different tile types
|
||||
|
||||
import fasm2frame
|
||||
|
||||
import unittest
|
||||
|
|
@ -74,6 +76,63 @@ class TestStringMethods(unittest.TestCase):
|
|||
self.bitread_frm_equals(
|
||||
'test_data/ff_int.fasm', 'test_data/ff_int/design.bits')
|
||||
|
||||
def test_ff_int_op1(self):
|
||||
'''Omitted key set to '''
|
||||
self.bitread_frm_equals(
|
||||
'test_data/ff_int_op1.fasm', 'test_data/ff_int/design.bits')
|
||||
|
||||
# Same check as above, but isolated test case
|
||||
def test_opkey_01_default(self):
|
||||
'''Optional key with binary omitted value should produce valid result'''
|
||||
fin = StringIO.StringIO("CLBLM_L_X10Y102.SLICEM_X0.SRUSEDMUX")
|
||||
fout = StringIO.StringIO()
|
||||
fasm2frame.run(fin, fout)
|
||||
|
||||
def test_opkey_01_1(self):
|
||||
fin = StringIO.StringIO("CLBLM_L_X10Y102.SLICEM_X0.SRUSEDMUX 1")
|
||||
fout = StringIO.StringIO()
|
||||
fasm2frame.run(fin, fout)
|
||||
|
||||
def test_opkey_enum(self):
|
||||
'''Optional key with enumerated value should produce syntax error'''
|
||||
# CLBLM_L.SLICEM_X0.AMUX.O6 !30_06 !30_07 !30_08 30_11
|
||||
fin = StringIO.StringIO("CLBLM_L_X10Y102.SLICEM_X0.AMUX.O6")
|
||||
fout = StringIO.StringIO()
|
||||
try:
|
||||
fasm2frame.run(fin, fout)
|
||||
self.fail("Expected syntax error")
|
||||
except fasm2frame.FASMSyntaxError:
|
||||
pass
|
||||
|
||||
def test_ff_int_0s(self):
|
||||
'''Explicit 0 entries'''
|
||||
self.bitread_frm_equals(
|
||||
'test_data/ff_int_0s.fasm', 'test_data/ff_int/design.bits')
|
||||
|
||||
def test_badkey(self):
|
||||
'''Bad key should throw syntax error'''
|
||||
fin = StringIO.StringIO("CLBLM_L_X10Y102.SLICEM_X0.SRUSEDMUX 2")
|
||||
fout = StringIO.StringIO()
|
||||
try:
|
||||
fasm2frame.run(fin, fout)
|
||||
self.fail("Expected syntax error")
|
||||
except fasm2frame.FASMSyntaxError:
|
||||
pass
|
||||
|
||||
def test_dupkey(self):
|
||||
'''Duplicate key should throw syntax error'''
|
||||
fin = StringIO.StringIO(
|
||||
"""\
|
||||
CLBLM_L_X10Y102.SLICEM_X0.SRUSEDMUX 0
|
||||
CLBLM_L_X10Y102.SLICEM_X0.SRUSEDMUX 1
|
||||
""")
|
||||
fout = StringIO.StringIO()
|
||||
try:
|
||||
fasm2frame.run(fin, fout)
|
||||
self.fail("Expected syntax error")
|
||||
except fasm2frame.FASMSyntaxError:
|
||||
pass
|
||||
|
||||
def test_sparse(self):
|
||||
'''Verify sparse equivilent to normal encoding'''
|
||||
frm_fn = 'test_data/lut_int.fasm'
|
||||
|
|
|
|||
Loading…
Reference in New Issue