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prjxray/minitests/partial_reconfig_flow/roi_implement.tcl

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partial_reconfig_flow: Rework to allow any verilog for ROI Change naming to clarify which files are related to synthesis vs implementation. Rewrite ROI synthesis and implementation rules as pattern rules to allow any .v to be used as an ROI design. Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
2018-01-26 05:29:15 +01:00
open_checkpoint harness_impl.dcp
read_checkpoint -cell roi [lindex $argv 0]
opt_design
place_design
route_design
write_checkpoint -force [lindex $argv 1]