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prjxray-db
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Updating DB based on "Merge pull request #179 from litghost/fix_fuzzer". 

See [Info File](Info.md) for details.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
Tim 'mithro' Ansell 2018-10-24 17:47:45 +00:00
parent ef74779839
commit 9f15e1561b
164 changed files with 986244 additions and 986239 deletions
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347
Info.md
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@ -37,26 +37,27 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING).
# Details
Last updated on Tue Oct 23 16:01:05 UTC 2018 (2018-10-23T16:01:05+00:00).
Last updated on Wed Oct 24 17:47:45 UTC 2018 (2018-10-24T17:47:45+00:00).
Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [v0.0-836-gfeb1a2c](https://github.com/SymbiFlow/prjxray/commit/feb1a2ca7b137befa1e4e1fe65ab1f70f2b8fcfe).
Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [v0.0-858-g7f2735d](https://github.com/SymbiFlow/prjxray/commit/7f2735dd4b5c9c695642b377515194af8909bf4d).
Latest commit was;
```
commit feb1a2ca7b137befa1e4e1fe65ab1f70f2b8fcfe
Author: Tim 'mithro' Ansell <me@mith.ro>
Date: Mon Oct 22 16:14:29 2018 +0000
commit 7f2735dd4b5c9c695642b377515194af8909bf4d
Merge: 01c359c 47cc2b0
Author: Tim Ansell <me@mith.ro>
Date: Tue Oct 23 09:57:25 2018 -0700
Remove 070-tileconn fuzzer from top level Makefile.
Merge pull request #179 from litghost/fix_fuzzer
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
Fix indirection.
```
## Database for [artix7](artix7/)
### Settings
Created using following [settings.sh (sha256: a215bd6ad72742d242ed4d9e6712f393f57341577f9c5197e84c7d61635b9e18)](https://github.com/SymbiFlow/prjxray/blob/feb1a2ca7b137befa1e4e1fe65ab1f70f2b8fcfe/database/artix7/settings.sh)
Created using following [settings.sh (sha256: cb777c1e854d877556482ff2067eff348386ce627caa0ef5617a6e5dea01dc6a)](https://github.com/SymbiFlow/prjxray/blob/7f2735dd4b5c9c695642b377515194af8909bf4d/database/artix7/settings.sh)
```shell
export XRAY_DATABASE="artix7"
export XRAY_PART="xc7a50tfgg484-1"
@ -64,7 +65,7 @@ export XRAY_ROI="SLICE_X12Y100:SLICE_X27Y149"
export XRAY_ROI_FRAMES="0x00000000:0xffffffff"
# Leave some CLBs to the left to allow easy ROI entering
export XRAY_ROI="SLICE_X8Y100:SLICE_X27Y149 RAMB18_X0Y20:RAMB18_X0Y59 RAMB36_X0Y10:RAMB36_X0Y29 DSP48_X0Y59:DSP48_X0Y20"
export XRAY_ROI="SLICE_X8Y100:SLICE_X27Y149 RAMB18_X0Y40:RAMB18_X0Y59 RAMB36_X0Y20:RAMB36_X0Y29 DSP48_X0Y40:DSP48_X0Y59"
export XRAY_ROI_GRID_X1="18"
export XRAY_ROI_GRID_X2="47"
export XRAY_ROI_GRID_Y1="0"
@ -105,173 +106,173 @@ Results have checksums;
* [`81e0696179a33bdf8d2279a53b406911a403d50224355e9ad29eccee01a70305 ./artix7/ppips_hclk_r.db`](./artix7/ppips_hclk_r.db)
* [`be617c15d1ec311b6249791414bbd69380fe90b476353cbb2fc2a7cb06f5029d ./artix7/ppips_int_l.db`](./artix7/ppips_int_l.db)
* [`a1423859c97a82dcfb114644f50b991db4ca7e0996e6d1ae4d2c97bfdfcb723d ./artix7/ppips_int_r.db`](./artix7/ppips_int_r.db)
* [`8aba20247656e287de5d0033bfaf31f2514cff0d041bd438719116673dc5e815 ./artix7/segbits_clbll_l.db`](./artix7/segbits_clbll_l.db)
* [`46c98e9e1d05d5d57055e67922560d85bb639981476ac8b69577cd00792878ff ./artix7/segbits_clbll_r.db`](./artix7/segbits_clbll_r.db)
* [`33e7a95886148e7418eda981147c90b15ffc770414a00fb7eca543300bbf0d5a ./artix7/segbits_clblm_l.db`](./artix7/segbits_clblm_l.db)
* [`4bd2d802fb5b62ebe2941d658edc466bab26b87c12d3c6fcbdcd614e51eb2e3f ./artix7/segbits_clblm_r.db`](./artix7/segbits_clblm_r.db)
* [`ce8aa28ad2ae2834d6182d6044cd0eae62da84551c486c1b04e3400116718f67 ./artix7/segbits_clbll_l.db`](./artix7/segbits_clbll_l.db)
* [`087a5f7c98aa864b1a1232660806ecbd2f4fc1a963f387821ddab47d9c358d2c ./artix7/segbits_clbll_r.db`](./artix7/segbits_clbll_r.db)
* [`e2b4f7eda0ee7cc02db131660a9677e3264ab2ec2d1bdc833fa9218fbe62f97f ./artix7/segbits_clblm_l.db`](./artix7/segbits_clblm_l.db)
* [`d67044a5aeac20f746130c86c3a104fb7173f012325aeb181c19c9adaba3dbae ./artix7/segbits_clblm_r.db`](./artix7/segbits_clblm_r.db)
* [`20f7bf469951b04a56e5e140b6327470750b08960643353384b35baf85eb9117 ./artix7/segbits_hclk_l.db`](./artix7/segbits_hclk_l.db)
* [`5e22f758a04eab3185b2453c9994aa2fa48f50ca8a6b49bf82e8fc4351f23a5c ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
* [`08dee581e565abbd09db559f9226139ba5a253f8aec4f3492152d8df8a87bbab ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
* [`be5f0c64ee17ad010dfea5125200216b2c69a558477a80133d043ed466e565be ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
* [`a215bd6ad72742d242ed4d9e6712f393f57341577f9c5197e84c7d61635b9e18 ./artix7/settings.sh`](./artix7/settings.sh)
* [`ce6b7525f841dc0c345a47509ade7c2e63e501f15375f13ae45ab68d5a963a48 ./artix7/site_type_BSCAN.json`](./artix7/site_type_BSCAN.json)
* [`4af72f95cdd44ac39ba343800b34f1fea766de38173fe9683c137e09b9da538e ./artix7/site_type_BUFGCTRL.json`](./artix7/site_type_BUFGCTRL.json)
* [`44ac2616c6bd02df6c767b4d75103d20e2afe933b7bf9468c0665cc475d9aaac ./artix7/site_type_BUFHCE.json`](./artix7/site_type_BUFHCE.json)
* [`b8fba943d1daba4bf68b60662ecd54d15d2e420844b3c365fccbbf540397e04f ./artix7/site_type_BUFIO.json`](./artix7/site_type_BUFIO.json)
* [`a3faa1fa985bb5ee8473992735ee4eb1137d65716e76ca382c8db5679b7e1c0a ./artix7/site_type_BUFMRCE.json`](./artix7/site_type_BUFMRCE.json)
* [`d9c702eb3efe272eaccdbac71f132397a8dc2bebb9957ac501c12191d229a415 ./artix7/site_type_BUFR.json`](./artix7/site_type_BUFR.json)
* [`918f7d1fa92e0781305ce37ec4a4803efbb19472b165b7a56fa78f254f5df8dc ./artix7/site_type_CAPTURE.json`](./artix7/site_type_CAPTURE.json)
* [`74c501f8de850d82eb3f3c9b1e50dfb0c29ead2449b03d85378bef0483219e0f ./artix7/site_type_DCIRESET.json`](./artix7/site_type_DCIRESET.json)
* [`7b99edd1b5bfe05ee855348b380647a288355e731f3c91b242f52d821db34d6a ./artix7/site_type_DNA_PORT.json`](./artix7/site_type_DNA_PORT.json)
* [`0f07ecfc6e124097bbdd9c2619b190d18f81e1c5903fed2970d6659f488737c7 ./artix7/site_type_DSP48E1.json`](./artix7/site_type_DSP48E1.json)
* [`c74665236aca328cc4de4959cbb1727b7a08f13aa01b2870179e3867eb6aaf5d ./artix7/site_type_EFUSE_USR.json`](./artix7/site_type_EFUSE_USR.json)
* [`70141a9433b6dd32954f23ae076d92d586453582789ddcd66a5755ef622cb988 ./artix7/site_type_FIFO18E1.json`](./artix7/site_type_FIFO18E1.json)
* [`e1b663d21680ca7c4a0e6a3b20f66b836a8a9d1f3da4816aafd2061c9881ecdc ./artix7/site_type_FRAME_ECC.json`](./artix7/site_type_FRAME_ECC.json)
* [`84afea9b88a7ed8e799893849e2c46dcdc2a9b783ce8150efebb15e13f8f7b6a ./artix7/site_type_GTPE2_CHANNEL.json`](./artix7/site_type_GTPE2_CHANNEL.json)
* [`5599e5df43aea8ab3d18adb1a411ac7c1ceea42801f85122b2c49f71de2d0242 ./artix7/site_type_GTPE2_COMMON.json`](./artix7/site_type_GTPE2_COMMON.json)
* [`97f68051d25c4c7a090ba151aa7682d4235677dc8eb7e84fe6577352bbc2eda5 ./artix7/site_type_IBUFDS_GTE2.json`](./artix7/site_type_IBUFDS_GTE2.json)
* [`3835f1bfbe1df674a972b133520aa0381ce3f7d076535935d7a6a90be0c6ec3c ./artix7/site_type_ICAP.json`](./artix7/site_type_ICAP.json)
* [`ab7bbac6fcb133918525355ef4fa4571cf3ffd43ce0d5adac6b3e93161e205d4 ./artix7/site_type_IDELAYCTRL.json`](./artix7/site_type_IDELAYCTRL.json)
* [`9d8f8a7f5374aeb7ecbcb930159e1f7d21d83f3015bb5bb3d3aa444f11b2123c ./artix7/site_type_IDELAYE2.json`](./artix7/site_type_IDELAYE2.json)
* [`2420d7e698aaf21ad65d74eb93cd0b944f5ac533dd600378fa626eedd0876abe ./artix7/site_type_ILOGICE3.json`](./artix7/site_type_ILOGICE3.json)
* [`81856766758a3b5a1ecec5a27512fbb591e2ddb9021c5aaeca71ddc4e9a6b286 ./artix7/site_type_IN_FIFO.json`](./artix7/site_type_IN_FIFO.json)
* [`618e38cee78dc8250a844e2e9fbcf59ad21ecdb7b4c361a7a621642d7dc15917 ./artix7/site_type_IOB33.json`](./artix7/site_type_IOB33.json)
* [`2dc8c4858b34913cb2e46141b25f39022b1dafb2b271ef769a3fbc328209543e ./artix7/site_type_IOB33M.json`](./artix7/site_type_IOB33M.json)
* [`e0e70aa2e7daf98a8d7d9dc9fca081753ba353bab9955a993edc0acf99331635 ./artix7/site_type_IOB33S.json`](./artix7/site_type_IOB33S.json)
* [`6922af5e94c020bf330e088a74c09ad7be09b4264756154dea5769d5631e22bf ./artix7/site_type_IPAD.json`](./artix7/site_type_IPAD.json)
* [`56628765dbeb552cb6e1131b47f5cec56cdb1d17abd07f62e1721adbc76d69d3 ./artix7/site_type_MMCME2_ADV.json`](./artix7/site_type_MMCME2_ADV.json)
* [`c1d5e2087d3f643f1699659fdb07ffade805f80406193c361ff2cb66f999a8f3 ./artix7/site_type_OLOGICE3.json`](./artix7/site_type_OLOGICE3.json)
* [`26a864898c5fccc0713e6c50cc1d979b85c7f80ef283ad7f4bebc390b272a0a0 ./artix7/site_type_OPAD.json`](./artix7/site_type_OPAD.json)
* [`79495b1ef561bfaf7046681be864de8b108b00007d2232b600b8fb2b9bd5e8f9 ./artix7/site_type_OUT_FIFO.json`](./artix7/site_type_OUT_FIFO.json)
* [`b05d25b6344a6a12efa4ec5ac3daa6715a10c5766d505b2d2920d02cdb8cdd71 ./artix7/site_type_PCIE_2_1.json`](./artix7/site_type_PCIE_2_1.json)
* [`a4260d6f3314deff82afb8ff1293a73132302ef22398fb24bed1dc7b1d086b72 ./artix7/site_type_PHASER_IN_PHY.json`](./artix7/site_type_PHASER_IN_PHY.json)
* [`5bf9c6cde3fb0e3054fc3b4a3d39a234c0dbddcfc6f70458aa9f3014c7752166 ./artix7/site_type_PHASER_OUT_PHY.json`](./artix7/site_type_PHASER_OUT_PHY.json)
* [`c98a21b4d4f832432629982f0595fe503aca5479ecf8f85526308ef1ffa8f681 ./artix7/site_type_PHASER_REF.json`](./artix7/site_type_PHASER_REF.json)
* [`0580134f137cf6f0195dd6df59ad63e8bf858a25af2de000742c0140438c5bbf ./artix7/site_type_PHY_CONTROL.json`](./artix7/site_type_PHY_CONTROL.json)
* [`9da8e5576ed978fd0796491c16d36853253d58463a04f6697f13bf24df22fe6a ./artix7/site_type_PLLE2_ADV.json`](./artix7/site_type_PLLE2_ADV.json)
* [`854c6355e4623de12b3c5fecadfcadbe56ee6909fdcca50e12d541c4d2b34cba ./artix7/site_type_PMV2.json`](./artix7/site_type_PMV2.json)
* [`a8ab8f75cf4c5b906de35b7f8cd6f56e22a026d7e8e3dccf368147d182fc6dc2 ./artix7/site_type_RAMB18E1.json`](./artix7/site_type_RAMB18E1.json)
* [`a268e5868691d7889be21a12b73761f8904ec2da9011e721da1118f1a768feb0 ./artix7/site_type_RAMBFIFO36E1.json`](./artix7/site_type_RAMBFIFO36E1.json)
* [`a172cd5740420c65d891d2a0cfeb2683d6357c30debb14a9e2c97aced3fc814c ./artix7/site_type_SLICEL.json`](./artix7/site_type_SLICEL.json)
* [`3810abcfb6b49fc50bd46db80edd07267e4febe54fec261d15f2dc124104c374 ./artix7/site_type_SLICEM.json`](./artix7/site_type_SLICEM.json)
* [`0851f78f9189764d7a2598cf596aca27b9bfec59386e9ca8a3e437300e8d17bd ./artix7/site_type_STARTUP.json`](./artix7/site_type_STARTUP.json)
* [`7329766c3d005888d7c26e2971eede01b5868561ebf3a2fd79418ede9b8eea7e ./artix7/site_type_TIEOFF.json`](./artix7/site_type_TIEOFF.json)
* [`9878d53bf8ee5edaefca55f6f2fbc4688c892d3ee733055b37457f427a1f0d84 ./artix7/site_type_USR_ACCESS.json`](./artix7/site_type_USR_ACCESS.json)
* [`2d05c8f9d59638153cc69fdb858b9b0a4ece6827fa47ff3d8022991e0b389776 ./artix7/site_type_XADC.json`](./artix7/site_type_XADC.json)
* [`f27c7a1c94c45ffc45db1f743fc36900a946ae6f9bfaf6c192647e48b988073a ./artix7/tileconn.json`](./artix7/tileconn.json)
* [`5753b8d2271890815cf886ea46ac71e8023e323ac95bd61ce52d1c87a2c4cfe8 ./artix7/tilegrid.json`](./artix7/tilegrid.json)
* [`23cbdbf81c66dc42a59144fd7c528e957ef90e8af2238a762bccf03155126639 ./artix7/tile_type_BRAM_INT_INTERFACE_L.json`](./artix7/tile_type_BRAM_INT_INTERFACE_L.json)
* [`398d6be7e17c3983246e6bb63a9ab10d07450efcb826ea9309bac9794ec2105a ./artix7/tile_type_BRAM_INT_INTERFACE_R.json`](./artix7/tile_type_BRAM_INT_INTERFACE_R.json)
* [`c374353f2b0dea34b09d506fc0e86f7880530ffb5b5f7b6ffc7e078f9e7f7b00 ./artix7/tile_type_BRAM_L.json`](./artix7/tile_type_BRAM_L.json)
* [`4ba88e04247ade6a0c755c67ca13e40f5a4f5c86943250b1ac855fe653924a09 ./artix7/tile_type_BRAM_R.json`](./artix7/tile_type_BRAM_R.json)
* [`58dff08cf299ed766fc6653c8c3e4671d7b484ff6e94bbbb4e5eca4512f15a4f ./artix7/tile_type_BRKH_BRAM.json`](./artix7/tile_type_BRKH_BRAM.json)
* [`8d554352d645b0d7f006960e05d98d1dd02d235542ae478ca419a3b0ea141475 ./artix7/tile_type_BRKH_B_TERM_INT.json`](./artix7/tile_type_BRKH_B_TERM_INT.json)
* [`7db1384b047b106a88e0767a171fd373294bc429e2921c3a5eb3a154eb3f2863 ./artix7/tile_type_BRKH_CLB.json`](./artix7/tile_type_BRKH_CLB.json)
* [`68e723c013899559164e2d263eadf3a37e0831cfe48756848958f2266e0f7af3 ./artix7/tile_type_BRKH_CLK.json`](./artix7/tile_type_BRKH_CLK.json)
* [`b70653a436820415dc00f8cfead944608b51c4c81a19e22077bb2cfd15ba2945 ./artix7/tile_type_BRKH_CMT.json`](./artix7/tile_type_BRKH_CMT.json)
* [`3ae1b790c11f7b2352d6b4bc116b103d9095a463c20593dc9072666b0998279e ./artix7/tile_type_BRKH_DSP_L.json`](./artix7/tile_type_BRKH_DSP_L.json)
* [`e6bda5554eb630e2d499ced9f437cdcf03b5d04d8b8922bd3a0261d693e10ac1 ./artix7/tile_type_BRKH_DSP_R.json`](./artix7/tile_type_BRKH_DSP_R.json)
* [`4e8527fcc4b2cfc4f56e07c470bdd16770a2917b1054efaf244115549471dd2d ./artix7/tile_type_BRKH_GTX.json`](./artix7/tile_type_BRKH_GTX.json)
* [`692353c7c69045023ec316a28c9ebb9d0c5bffe448053b49ab560b1251104e48 ./artix7/tile_type_BRKH_INT.json`](./artix7/tile_type_BRKH_INT.json)
* [`0db75fcd5482f6882ba2dad8d6905a6720ba123f62207fc1248b13b5351ef84b ./artix7/tile_type_BRKH_TERM_INT.json`](./artix7/tile_type_BRKH_TERM_INT.json)
* [`c7d4179bb2ee3cbe84134395b035a5a380ea4cb872c3b603886903ae290918f8 ./artix7/tile_type_B_TERM_INT.json`](./artix7/tile_type_B_TERM_INT.json)
* [`c62ecc3b04de188050b8cc0d0239294915bbf1c08f5f840e44b4e36cfa8206d3 ./artix7/tile_type_CFG_CENTER_BOT.json`](./artix7/tile_type_CFG_CENTER_BOT.json)
* [`7ad3733b8b2acaceec349fa2dc82cda1451cb3ccbdddf4145aaf99146faf3f91 ./artix7/tile_type_CFG_CENTER_MID.json`](./artix7/tile_type_CFG_CENTER_MID.json)
* [`88a6dc6071e4e5ba712acd3c1b87f9fac4ee11bcc4adfc1540a87a8b912ed96a ./artix7/tile_type_CFG_CENTER_TOP.json`](./artix7/tile_type_CFG_CENTER_TOP.json)
* [`3dc931d3d3c1b416201a77c9ae24ddc4c3e6b5542f969d05e31453301874be44 ./artix7/tile_type_CLBLL_L.json`](./artix7/tile_type_CLBLL_L.json)
* [`4ce0644191f3576c18c8ef0b748b1161a7e2b1685f5f8cdfb7357dd1b1a1e0be ./artix7/tile_type_CLBLL_R.json`](./artix7/tile_type_CLBLL_R.json)
* [`43635bed6f425a5014f224ea1c8cf79b71e77a75201c2b3b2d010731aa04366e ./artix7/tile_type_CLBLM_L.json`](./artix7/tile_type_CLBLM_L.json)
* [`d1bb7931139e2122dad06ab1a9b5bd38fc94e1215030ba88a9630dd7f6439ce5 ./artix7/tile_type_CLBLM_R.json`](./artix7/tile_type_CLBLM_R.json)
* [`ff795e0ce7fd5411d581ea080530f93cc3eaff304cb5d3abba61ee15a4e63d31 ./artix7/tile_type_CLK_BUFG_BOT_R.json`](./artix7/tile_type_CLK_BUFG_BOT_R.json)
* [`d6eb7190dec7b173db34979729b1051312aad5bb768e2f48db147499de4f4bdc ./artix7/tile_type_CLK_BUFG_REBUF.json`](./artix7/tile_type_CLK_BUFG_REBUF.json)
* [`e70253892aaf28cbd15c26ea6882121267fd205524e383e2368c9bf1ea40ba45 ./artix7/tile_type_CLK_BUFG_TOP_R.json`](./artix7/tile_type_CLK_BUFG_TOP_R.json)
* [`53c5abb08ea6155d5e04365c1c61475d39972ab1aadfcd2164c3e6b16adae9a1 ./artix7/tile_type_CLK_FEED.json`](./artix7/tile_type_CLK_FEED.json)
* [`0473ca7e14c9ebaa721a5f8b9a8cea0557dfe9c1049b34ea49e5c95364043f8c ./artix7/tile_type_CLK_HROW_BOT_R.json`](./artix7/tile_type_CLK_HROW_BOT_R.json)
* [`2cafe25a81ef45d27de3da007ab8d1210a931fb9162a7bcba64b31d0061c6d8c ./artix7/tile_type_CLK_HROW_TOP_R.json`](./artix7/tile_type_CLK_HROW_TOP_R.json)
* [`ac497f9fe63fd1861cbcf5c246ae040f88dd1928b8ef4c26a8f1b8390b80de3c ./artix7/tile_type_CLK_MTBF2.json`](./artix7/tile_type_CLK_MTBF2.json)
* [`99f6b806b0052ccb51eea9ad7ed16eceeadf0121b7024e9708831b39b4e45c83 ./artix7/tile_type_CLK_PMV2.json`](./artix7/tile_type_CLK_PMV2.json)
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* [`61a3b4046747c43e348336d26308ffadde05ff912fe223d0580cb177ad998df9 ./artix7/tile_type_CLK_PMVIOB.json`](./artix7/tile_type_CLK_PMVIOB.json)
* [`084ad856f296c2789da3da7e1c1e1d73e5f6a6492e94cb501c5ad240f51da5c6 ./artix7/tile_type_CLK_PMV.json`](./artix7/tile_type_CLK_PMV.json)
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* [`f189edadd53ac962b40bfd3bb590afb002988c9ab2e2dc4d40e3e46bcd20d19b ./artix7/tile_type_HCLK_DSP_R.json`](./artix7/tile_type_HCLK_DSP_R.json)
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* [`b907b961ecf05df2bad676048dda29df7849428e11295c13dacf9295047c944f ./artix7/tile_type_HCLK_FIFO_L.json`](./artix7/tile_type_HCLK_FIFO_L.json)
* [`af83da793077a964cd35ec8c41f368d6524e89f54afbf1638cd9934dc101c3c3 ./artix7/tile_type_HCLK_GTX.json`](./artix7/tile_type_HCLK_GTX.json)
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* [`e54cb4db56c4a16f65ad1b0668ca4b5e534fe16bfc9eb9be3acf023bb6512d9a ./artix7/tile_type_HCLK_IOI3.json`](./artix7/tile_type_HCLK_IOI3.json)
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* [`81334d3a3c651cf9855d53d306fdb6bfa97c11f2c79965b12b4dcc229a5515b5 ./artix7/tile_type_HCLK_TERM_GTX.json`](./artix7/tile_type_HCLK_TERM_GTX.json)
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* [`fb599f521e49420293df721bdc0229a9311e1af1bac57beeb7014450eac7b83e ./artix7/tile_type_HCLK_VBRK.json`](./artix7/tile_type_HCLK_VBRK.json)
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* [`0ff88dcc12f1174afbb9762d5f9a51c94b1f48e9fce7a2e270612f49a778fdd7 ./artix7/tile_type_HCLK_R.json`](./artix7/tile_type_HCLK_R.json)
* [`35d4e6f1829f4f8caa20144b93747f7413e2c3b2ed98b0bf10af41158bf81f46 ./artix7/tile_type_HCLK_TERM_GTX.json`](./artix7/tile_type_HCLK_TERM_GTX.json)
* [`c7f8b5def602269f1897e40d1c3ac9b0b12c5b7a544bd3f309e710154719c321 ./artix7/tile_type_HCLK_TERM.json`](./artix7/tile_type_HCLK_TERM.json)
* [`33d48102d07627a90a0d45cde55180cd54a41c4221d8000a3086116b5e163076 ./artix7/tile_type_HCLK_VBRK.json`](./artix7/tile_type_HCLK_VBRK.json)
* [`ad0f50a03faa49e02dbc39600861e3c353a490e22f1334f8ab774bc1bd3ad4c0 ./artix7/tile_type_HCLK_VFRAME.json`](./artix7/tile_type_HCLK_VFRAME.json)
* [`cc895f8d7eb437df6282b7c1eca5ceb157fbac7a95b1fd1c93fa65621cd112ca ./artix7/tile_type_INT_FEEDTHRU_1.json`](./artix7/tile_type_INT_FEEDTHRU_1.json)
* [`12ad58aa01c4a2399ebf2b49c334c06188341ddd3aee0d7f79f44228a74ae94c ./artix7/tile_type_INT_FEEDTHRU_2.json`](./artix7/tile_type_INT_FEEDTHRU_2.json)
* [`c0921f4040358b3ccc5205e54c788448d751c0c130dfadcf23a843f4508503d0 ./artix7/tile_type_INT_INTERFACE_L.json`](./artix7/tile_type_INT_INTERFACE_L.json)
* [`86dc9518591ed0dd2e2c61e9b2d50e6da3ee4d2d684472f7429001bcbcbda2bb ./artix7/tile_type_INT_INTERFACE_R.json`](./artix7/tile_type_INT_INTERFACE_R.json)
* [`3dcb7f202b74d980159e2de40257d5098e6f900477d06297f80990b0e9155751 ./artix7/tile_type_INT_L.json`](./artix7/tile_type_INT_L.json)
* [`b4e4f309fe6917bb52b4661a53e9ea8bd6a192cd6cb65bb4bd9cca898d16cf55 ./artix7/tile_type_INT_R.json`](./artix7/tile_type_INT_R.json)
* [`9dab8290edf106109e221c7e759ae45d3050b8d5e9574f7bf5058361e3ae4e2a ./artix7/tile_type_IO_INT_INTERFACE_L.json`](./artix7/tile_type_IO_INT_INTERFACE_L.json)
* [`87f6ae714d73ec34eaae4f4d3299c5048b29b9ecdc9b9a025101af7c8ea4bd38 ./artix7/tile_type_IO_INT_INTERFACE_R.json`](./artix7/tile_type_IO_INT_INTERFACE_R.json)
* [`b2f0206eea59366caf11ac3431a8677fb31def9541a465f8215fce9e31a4cdf2 ./artix7/tile_type_LIOB33.json`](./artix7/tile_type_LIOB33.json)
* [`6a4b98bd6ba5778c8f01e0d809f605e549f225a040f0a679b8e1b4bc5760c3f6 ./artix7/tile_type_LIOB33_SING.json`](./artix7/tile_type_LIOB33_SING.json)
* [`a9afa4ac21293b465e15ec1cf3957882a42bf79a00880c34e5e2922cc213b670 ./artix7/tile_type_LIOI3.json`](./artix7/tile_type_LIOI3.json)
* [`1989a5d335af8e857dfdbcdfa3d1ebae142f467f115b1534ba4279d6f8289c04 ./artix7/tile_type_LIOI3_SING.json`](./artix7/tile_type_LIOI3_SING.json)
* [`b6e2459db179551ddb5667c88aace86b5b1ebc15d25e9ed16e5f3a1a89eb8b7c ./artix7/tile_type_LIOI3_TBYTESRC.json`](./artix7/tile_type_LIOI3_TBYTESRC.json)
* [`8479bc74592125bb6f90c9c0006ebf0a8cc95c81800dd7ba7149c4c80d91d101 ./artix7/tile_type_LIOI3_TBYTETERM.json`](./artix7/tile_type_LIOI3_TBYTETERM.json)
* [`10376bfc02f7c4e7510c81a3e8aa24aca76eeab6c036ed25e9a1165da7b6dec9 ./artix7/tile_type_L_TERM_INT.json`](./artix7/tile_type_L_TERM_INT.json)
* [`0bac0a1dab6df6c11cf9b4a91272d32c25fd0ab52d5ec7318eceed7efafedf94 ./artix7/tile_type_MONITOR_BOT.json`](./artix7/tile_type_MONITOR_BOT.json)
* [`2cd0b749aad9258f7bee31812865ac916833a2d70a5bafd4cbee93aedf046bff ./artix7/tile_type_MONITOR_MID.json`](./artix7/tile_type_MONITOR_MID.json)
* [`9a3ff3040e1641921d333a3572425429a26594385d2712b76aef329e31bb9111 ./artix7/tile_type_MONITOR_TOP.json`](./artix7/tile_type_MONITOR_TOP.json)
* [`cc31a014f02a5118f0b055e9ef23cab3f6e594b2bfecde17286d7a597217ce2b ./artix7/tile_type_NULL.json`](./artix7/tile_type_NULL.json)
* [`f41f1a2e33f92a90e14b1f3ef2f73a370cc9beece5708ae39348a8a29b4129f2 ./artix7/tile_type_PCIE_BOT.json`](./artix7/tile_type_PCIE_BOT.json)
* [`51d5eaf8ebe162275f3c1fbbe0b29c04a87ce2b2568ba2b8a7613d3ce7409d63 ./artix7/tile_type_PCIE_INT_INTERFACE_L.json`](./artix7/tile_type_PCIE_INT_INTERFACE_L.json)
* [`498ee4fe83ed42161359e341123128a12c300c73b257b538603c549307088f0c ./artix7/tile_type_PCIE_INT_INTERFACE_R.json`](./artix7/tile_type_PCIE_INT_INTERFACE_R.json)
* [`06bda788813b1db788f628323d6b8ca59171dc7e64fb63af9ffa01a012867e7c ./artix7/tile_type_PCIE_NULL.json`](./artix7/tile_type_PCIE_NULL.json)
* [`d78c4e54abf9825b87f078b8ba873a2a557fb10da98a2eea7655da41eb5f78d5 ./artix7/tile_type_PCIE_TOP.json`](./artix7/tile_type_PCIE_TOP.json)
* [`7c0d7c33e3202c5f7dba96ad45f1fc2fc3908ceaac81a567e2fe3e0523ebb288 ./artix7/tile_type_RIOB33.json`](./artix7/tile_type_RIOB33.json)
* [`cf4f1facf67039f411e2a1ea6ad6cedf78fdb38aad748b50cfc229e814361f47 ./artix7/tile_type_RIOB33_SING.json`](./artix7/tile_type_RIOB33_SING.json)
* [`e74e663259e2ea679e77899b5344759c30a68e01f5a51af1ca491ad28d33e302 ./artix7/tile_type_RIOI3.json`](./artix7/tile_type_RIOI3.json)
* [`3ad139c28fe8f7251fb921ca178d4ca56ea6e0ed9a3aad7f41a31b32aac8358c ./artix7/tile_type_RIOI3_SING.json`](./artix7/tile_type_RIOI3_SING.json)
* [`a301f932092e5475755a8dd15e0eb5e505d698d54b8bd04516ffff970d0ebc44 ./artix7/tile_type_RIOI3_TBYTESRC.json`](./artix7/tile_type_RIOI3_TBYTESRC.json)
* [`622609c9fa4398e276da3c0153e2dbc2a681d1c0f9268039aad416b85cbd217e ./artix7/tile_type_RIOI3_TBYTETERM.json`](./artix7/tile_type_RIOI3_TBYTETERM.json)
* [`25e056ead534be2890f05d39c946f1db3e0e946575c9e263e67c58491be6c1a3 ./artix7/tile_type_R_TERM_INT_GTX.json`](./artix7/tile_type_R_TERM_INT_GTX.json)
* [`52e4abec4c0fa0b0fb41f12b10490a0876ae2ab537223eb5421fdd8881fdf7ec ./artix7/tile_type_R_TERM_INT.json`](./artix7/tile_type_R_TERM_INT.json)
* [`0716e74334b122441a5181a3520071fabed24c8d2b9ffe9516a211757dd9be98 ./artix7/tile_type_TERM_CMT.json`](./artix7/tile_type_TERM_CMT.json)
* [`2de0186436eaff3618b63a1b4da63cb2433b252f64b0d39114abf85a8d5f9440 ./artix7/tile_type_T_TERM_INT.json`](./artix7/tile_type_T_TERM_INT.json)
* [`af19906dbd78dd5c685994cfec1858eccbc324063fd8f4a60c208deecb615419 ./artix7/tile_type_VBRK_EXT.json`](./artix7/tile_type_VBRK_EXT.json)
* [`b97c56f95ae1334f6bd2b7f8cb5782b0f6e335c8c34260555ff31dd0a165bb47 ./artix7/tile_type_VBRK.json`](./artix7/tile_type_VBRK.json)
* [`b24c32758a7c21185e2b9689b4ac65f8f00e43e8ec46aac79a8233b3d3fd36c6 ./artix7/tile_type_VFRAME.json`](./artix7/tile_type_VFRAME.json)
* [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d ./artix7/xc7a35tcpg236-1.yaml`](./artix7/xc7a35tcpg236-1.yaml)
* [`41c360b1e2f7e08b9051f1160a34954ce4c05a445a07f226f1f4059caf1fa1d3 ./artix7/xc7a50tfgg484-1.yaml`](./artix7/xc7a50tfgg484-1.yaml)
@ -279,7 +280,7 @@ Results have checksums;
### Settings
Created using following [settings.sh (sha256: 2daf6a69dd6d20df7b1273ff43c5c340abe36f8229d297646865edcfd91eff18)](https://github.com/SymbiFlow/prjxray/blob/feb1a2ca7b137befa1e4e1fe65ab1f70f2b8fcfe/database/kintex7/settings.sh)
Created using following [settings.sh (sha256: 2daf6a69dd6d20df7b1273ff43c5c340abe36f8229d297646865edcfd91eff18)](https://github.com/SymbiFlow/prjxray/blob/7f2735dd4b5c9c695642b377515194af8909bf4d/database/kintex7/settings.sh)
```shell
export XRAY_DATABASE="kintex7"
export XRAY_PART="xc7k70tfbg676-2"

1
artix7/segbits_clbll_l.db
View File

@ -700,6 +700,7 @@ CLBLL_L.SLICEL_X1.D5FF.MUX.B 31_54
CLBLL_L.SLICEL_X1.D5FF.ZINI 31_52
CLBLL_L.SLICEL_X1.D5FF.ZRST 00_56
CLBLL_L.SLICEL_X1.D5FFMUX.IN_A 31_55
CLBLL_L.SLICEL_X1.D5FFMUX.IN_B !22_63 !23_63 !24_63 25_63 31_54
CLBLL_L.SLICEL_X1.D5FFMUX.IN_B 31_54
CLBLL_L.SLICEL_X1.DFF.DMUX.CY !31_60 !31_61 30_58 31_62
CLBLL_L.SLICEL_X1.DFF.DMUX.DX !30_58 !31_60 !31_62 31_61

1
artix7/segbits_clbll_r.db
View File

@ -700,6 +700,7 @@ CLBLL_R.SLICEL_X1.D5FF.MUX.B 31_54
CLBLL_R.SLICEL_X1.D5FF.ZINI 31_52
CLBLL_R.SLICEL_X1.D5FF.ZRST 00_56
CLBLL_R.SLICEL_X1.D5FFMUX.IN_A 31_55
CLBLL_R.SLICEL_X1.D5FFMUX.IN_B !22_63 !23_63 !24_63 25_63 31_54
CLBLL_R.SLICEL_X1.D5FFMUX.IN_B 31_54
CLBLL_R.SLICEL_X1.DFF.DMUX.CY !31_60 !31_61 30_58 31_62
CLBLL_R.SLICEL_X1.DFF.DMUX.DX !30_58 !31_60 !31_62 31_61

1
artix7/segbits_clblm_l.db
View File

@ -294,6 +294,7 @@ CLBLM_L.SLICEL_X1.D5FF.MUX.B 31_54
CLBLM_L.SLICEL_X1.D5FF.ZINI 31_52
CLBLM_L.SLICEL_X1.D5FF.ZRST 00_56
CLBLM_L.SLICEL_X1.D5FFMUX.IN_A 31_55
CLBLM_L.SLICEL_X1.D5FFMUX.IN_B !22_63 !23_63 !24_63 25_63 31_54
CLBLM_L.SLICEL_X1.D5FFMUX.IN_B 31_54
CLBLM_L.SLICEL_X1.DFF.DMUX.CY !31_60 !31_61 30_58 31_62
CLBLM_L.SLICEL_X1.DFF.DMUX.DX !30_58 !31_60 !31_62 31_61

1
artix7/segbits_clblm_r.db
View File

@ -294,6 +294,7 @@ CLBLM_R.SLICEL_X1.D5FF.MUX.B 31_54
CLBLM_R.SLICEL_X1.D5FF.ZINI 31_52
CLBLM_R.SLICEL_X1.D5FF.ZRST 00_56
CLBLM_R.SLICEL_X1.D5FFMUX.IN_A 31_55
CLBLM_R.SLICEL_X1.D5FFMUX.IN_B !22_63 !23_63 !24_63 25_63 31_54
CLBLM_R.SLICEL_X1.D5FFMUX.IN_B 31_54
CLBLM_R.SLICEL_X1.DFF.DMUX.CY !31_60 !31_61 30_58 31_62
CLBLM_R.SLICEL_X1.DFF.DMUX.DX !30_58 !31_60 !31_62 31_61

2
artix7/settings.sh
View File

@ -4,7 +4,7 @@ export XRAY_ROI="SLICE_X12Y100:SLICE_X27Y149"
export XRAY_ROI_FRAMES="0x00000000:0xffffffff"
# Leave some CLBs to the left to allow easy ROI entering
export XRAY_ROI="SLICE_X8Y100:SLICE_X27Y149 RAMB18_X0Y20:RAMB18_X0Y59 RAMB36_X0Y10:RAMB36_X0Y29 DSP48_X0Y59:DSP48_X0Y20"
export XRAY_ROI="SLICE_X8Y100:SLICE_X27Y149 RAMB18_X0Y40:RAMB18_X0Y59 RAMB36_X0Y20:RAMB36_X0Y29 DSP48_X0Y40:DSP48_X0Y59"
export XRAY_ROI_GRID_X1="18"
export XRAY_ROI_GRID_X2="47"
export XRAY_ROI_GRID_Y1="0"

26
artix7/site_type_BSCAN.json
View File

@ -1,8 +1,6 @@
{
"type": "BSCAN",
"site_pips": {},
"site_pins": {
"RUNTEST": {
"RESET": {
"direction": "OUT"
},
"TMS": {
@ -11,29 +9,31 @@
"TDO": {
"direction": "IN"
},
"CAPTURE": {
"direction": "OUT"
},
"RESET": {
"SEL": {
"direction": "OUT"
},
"TDI": {
"direction": "OUT"
},
"RUNTEST": {
"direction": "OUT"
},
"CAPTURE": {
"direction": "OUT"
},
"DRCK": {
"direction": "OUT"
},
"UPDATE": {
"TCK": {
"direction": "OUT"
},
"SHIFT": {
"direction": "OUT"
},
"SEL": {
"direction": "OUT"
},
"TCK": {
"UPDATE": {
"direction": "OUT"
}
}
},
"type": "BSCAN",
"site_pips": {}
}

92
artix7/site_type_BUFGCTRL.json
View File

@ -1,8 +1,37 @@
{
"site_pins": {
"CE1": {
"direction": "IN"
},
"CE0": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"IGNORE1": {
"direction": "IN"
},
"I0": {
"direction": "IN"
},
"I1": {
"direction": "IN"
},
"S1": {
"direction": "IN"
},
"S0": {
"direction": "IN"
},
"IGNORE0": {
"direction": "IN"
}
},
"type": "BUFGCTRL",
"site_pips": {
"IGNORE0INV:IGNORE0": {
"from_pin": "IGNORE0",
"CE0INV:CE0": {
"from_pin": "CE0",
"to_pin": "OUT"
},
"S0INV:S0": {
@ -17,66 +46,37 @@
"from_pin": "S0_B",
"to_pin": "OUT"
},
"IGNORE1INV:IGNORE1": {
"from_pin": "IGNORE1",
"to_pin": "OUT"
},
"IGNORE0INV:IGNORE0_B": {
"from_pin": "IGNORE0_B",
"to_pin": "OUT"
},
"CE0INV:CE0": {
"from_pin": "CE0",
"to_pin": "OUT"
},
"S1INV:S1_B": {
"from_pin": "S1_B",
"to_pin": "OUT"
},
"CE1INV:CE1_B": {
"from_pin": "CE1_B",
"to_pin": "OUT"
},
"CE1INV:CE1": {
"from_pin": "CE1",
"to_pin": "OUT"
},
"S1INV:S1": {
"from_pin": "S1",
"IGNORE0INV:IGNORE0": {
"from_pin": "IGNORE0",
"to_pin": "OUT"
},
"IGNORE1INV:IGNORE1": {
"from_pin": "IGNORE1",
"S1INV:S1_B": {
"from_pin": "S1_B",
"to_pin": "OUT"
},
"S1INV:S1": {
"from_pin": "S1",
"to_pin": "OUT"
},
"IGNORE1INV:IGNORE1_B": {
"from_pin": "IGNORE1_B",
"to_pin": "OUT"
}
},
"site_pins": {
"CE0": {
"direction": "IN"
},
"CE1": {
"direction": "IN"
},
"I0": {
"direction": "IN"
},
"I1": {
"direction": "IN"
},
"IGNORE0": {
"direction": "IN"
},
"S1": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"IGNORE1": {
"direction": "IN"
},
"S0": {
"direction": "IN"
"CE1INV:CE1_B": {
"from_pin": "CE1_B",
"to_pin": "OUT"
}
}
}

26
artix7/site_type_BUFHCE.json
View File

@ -1,24 +1,24 @@
{
"type": "BUFHCE",
"site_pips": {
"CEINV:CE": {
"from_pin": "CE",
"to_pin": "OUT"
},
"CEINV:CE_B": {
"from_pin": "CE_B",
"to_pin": "OUT"
}
},
"site_pins": {
"I": {
"CE": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"CE": {
"I": {
"direction": "IN"
}
},
"type": "BUFHCE",
"site_pips": {
"CEINV:CE_B": {
"from_pin": "CE_B",
"to_pin": "OUT"
},
"CEINV:CE": {
"from_pin": "CE",
"to_pin": "OUT"
}
}
}

12
artix7/site_type_BUFIO.json
View File

@ -1,12 +1,12 @@
{
"type": "BUFIO",
"site_pips": {},
"site_pins": {
"I": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"I": {
"direction": "IN"
}
}
},
"type": "BUFIO",
"site_pips": {}
}

26
artix7/site_type_BUFMRCE.json
View File

@ -1,24 +1,24 @@
{
"type": "BUFMRCE",
"site_pips": {
"CEINV:CE": {
"from_pin": "CE",
"to_pin": "OUT"
},
"CEINV:CE_B": {
"from_pin": "CE_B",
"to_pin": "OUT"
}
},
"site_pins": {
"I": {
"CE": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"CE": {
"I": {
"direction": "IN"
}
},
"type": "BUFMRCE",
"site_pips": {
"CEINV:CE_B": {
"from_pin": "CE_B",
"to_pin": "OUT"
},
"CEINV:CE": {
"from_pin": "CE",
"to_pin": "OUT"
}
}
}

16
artix7/site_type_BUFR.json
View File

@ -1,18 +1,18 @@
{
"type": "BUFR",
"site_pips": {},
"site_pins": {
"I": {
"CE": {
"direction": "IN"
},
"CLR": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"CLR": {
"direction": "IN"
},
"CE": {
"I": {
"direction": "IN"
}
}
},
"type": "BUFR",
"site_pips": {}
}

6
artix7/site_type_CAPTURE.json
View File

@ -1,6 +1,4 @@
{
"type": "CAPTURE",
"site_pips": {},
"site_pins": {
"CLK": {
"direction": "IN"
@ -8,5 +6,7 @@
"CAP": {
"direction": "IN"
}
}
},
"type": "CAPTURE",
"site_pips": {}
}

12
artix7/site_type_DCIRESET.json
View File

@ -1,12 +1,12 @@
{
"type": "DCIRESET",
"site_pips": {},
"site_pins": {
"RST": {
"direction": "IN"
},
"LOCKED": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
}
}
},
"type": "DCIRESET",
"site_pips": {}
}

14
artix7/site_type_DNA_PORT.json
View File

@ -1,21 +1,21 @@
{
"type": "DNA_PORT",
"site_pips": {},
"site_pins": {
"CLK": {
"direction": "IN"
},
"READ": {
"direction": "IN"
},
"DOUT": {
"direction": "OUT"
},
"SHIFT": {
"direction": "IN"
},
"DIN": {
"direction": "IN"
},
"READ": {
"SHIFT": {
"direction": "IN"
}
}
},
"type": "DNA_PORT",
"site_pips": {}
}

2742
artix7/site_type_DSP48E1.json
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File diff suppressed because it is too large Load Diff

154
artix7/site_type_EFUSE_USR.json
View File

@ -1,102 +1,102 @@
{
"type": "EFUSE_USR",
"site_pips": {},
"site_pins": {
"EFUSEUSR19": {
"direction": "OUT"
},
"EFUSEUSR12": {
"direction": "OUT"
},
"EFUSEUSR11": {
"direction": "OUT"
},
"EFUSEUSR15": {
"direction": "OUT"
},
"EFUSEUSR5": {
"direction": "OUT"
},
"EFUSEUSR21": {
"direction": "OUT"
},
"EFUSEUSR1": {
"direction": "OUT"
},
"EFUSEUSR18": {
"direction": "OUT"
},
"EFUSEUSR22": {
"direction": "OUT"
},
"EFUSEUSR28": {
"direction": "OUT"
},
"EFUSEUSR27": {
"direction": "OUT"
},
"EFUSEUSR20": {
"direction": "OUT"
},
"EFUSEUSR24": {
"direction": "OUT"
},
"EFUSEUSR30": {
"direction": "OUT"
},
"EFUSEUSR7": {
"direction": "OUT"
},
"EFUSEUSR16": {
"direction": "OUT"
},
"EFUSEUSR8": {
"direction": "OUT"
},
"EFUSEUSR3": {
"direction": "OUT"
},
"EFUSEUSR31": {
"direction": "OUT"
},
"EFUSEUSR25": {
"direction": "OUT"
},
"EFUSEUSR2": {
"direction": "OUT"
},
"EFUSEUSR6": {
"direction": "OUT"
},
"EFUSEUSR0": {
"direction": "OUT"
},
"EFUSEUSR13": {
"direction": "OUT"
},
"EFUSEUSR14": {
"direction": "OUT"
},
"EFUSEUSR26": {
"direction": "OUT"
},
"EFUSEUSR23": {
"direction": "OUT"
},
"EFUSEUSR10": {
"EFUSEUSR7": {
"direction": "OUT"
},
"EFUSEUSR4": {
"EFUSEUSR19": {
"direction": "OUT"
},
"EFUSEUSR21": {
"direction": "OUT"
},
"EFUSEUSR9": {
"direction": "OUT"
},
"EFUSEUSR8": {
"direction": "OUT"
},
"EFUSEUSR29": {
"direction": "OUT"
},
"EFUSEUSR27": {
"direction": "OUT"
},
"EFUSEUSR13": {
"direction": "OUT"
},
"EFUSEUSR3": {
"direction": "OUT"
},
"EFUSEUSR31": {
"direction": "OUT"
},
"EFUSEUSR2": {
"direction": "OUT"
},
"EFUSEUSR20": {
"direction": "OUT"
},
"EFUSEUSR16": {
"direction": "OUT"
},
"EFUSEUSR1": {
"direction": "OUT"
},
"EFUSEUSR14": {
"direction": "OUT"
},
"EFUSEUSR17": {
"direction": "OUT"
},
"EFUSEUSR6": {
"direction": "OUT"
},
"EFUSEUSR28": {
"direction": "OUT"
},
"EFUSEUSR25": {
"direction": "OUT"
},
"EFUSEUSR4": {
"direction": "OUT"
},
"EFUSEUSR15": {
"direction": "OUT"
},
"EFUSEUSR30": {
"direction": "OUT"
},
"EFUSEUSR22": {
"direction": "OUT"
},
"EFUSEUSR10": {
"direction": "OUT"
},
"EFUSEUSR12": {
"direction": "OUT"
},
"EFUSEUSR24": {
"direction": "OUT"
},
"EFUSEUSR0": {
"direction": "OUT"
},
"EFUSEUSR11": {
"direction": "OUT"
},
"EFUSEUSR18": {
"direction": "OUT"
}
}
},
"type": "EFUSE_USR",
"site_pips": {}
}

894
artix7/site_type_FIFO18E1.json
View File

@ -1,317 +1,87 @@
{
"type": "FIFO18E1",
"site_pips": {
"RSTREGINV:RSTREG_B": {
"from_pin": "RSTREG_B",
"to_pin": "OUT"
},
"WRCLKINV:WRCLK_B": {
"from_pin": "WRCLK_B",
"to_pin": "OUT"
},
"RDENINV:RDEN": {
"from_pin": "RDEN",
"to_pin": "OUT"
},
"RDRCLKINV:RDRCLK": {
"from_pin": "RDRCLK",
"to_pin": "OUT"
},
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
},
"RDRCLKINV:RDRCLK_B": {
"from_pin": "RDRCLK_B",
"to_pin": "OUT"
},
"WRENINV:WREN": {
"from_pin": "WREN",
"to_pin": "OUT"
},
"RDCLKINV:RDCLK_B": {
"from_pin": "RDCLK_B",
"to_pin": "OUT"
},
"RDCLKINV:RDCLK": {
"from_pin": "RDCLK",
"to_pin": "OUT"
},
"RDENINV:RDEN_B": {
"from_pin": "RDEN_B",
"to_pin": "OUT"
},
"WRENINV:WREN_B": {
"from_pin": "WREN_B",
"to_pin": "OUT"
},
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
},
"WRCLKINV:WRCLK": {
"from_pin": "WRCLK",
"to_pin": "OUT"
},
"RSTREGINV:RSTREG": {
"from_pin": "RSTREG",
"to_pin": "OUT"
}
},
"site_pins": {
"DO14": {
"RDCOUNT4": {
"direction": "OUT"
},
"DO0": {
"direction": "OUT"
},
"WRERR": {
"direction": "OUT"
},
"RDERR": {
"direction": "OUT"
},
"WRCOUNT9": {
"direction": "OUT"
},
"WRCOUNT3": {
"direction": "OUT"
},
"DO23": {
"direction": "OUT"
},
"DIBDI5": {
"DIADI4": {
"direction": "IN"
},
"ADDRBWRADDR5": {
"direction": "IN"
},
"WEA1": {
"direction": "IN"
},
"DIPADIP0": {
"direction": "IN"
},
"DO21": {
"direction": "OUT"
},
"DIBDI3": {
"direction": "IN"
},
"ADDRBWRADDR13": {
"direction": "IN"
},
"WRCOUNT2": {
"direction": "OUT"
},
"WRCOUNT8": {
"direction": "OUT"
},
"RDCOUNT8": {
"direction": "OUT"
},
"DO29": {
"direction": "OUT"
},
"DIBDI7": {
"direction": "IN"
},
"DIBDI11": {
"direction": "IN"
},
"WRCOUNT5": {
"direction": "OUT"
},
"DOP1": {
"direction": "OUT"
},
"RSTREGB": {
"direction": "IN"
},
"REGCEB": {
"direction": "IN"
},
"ADDRBTIEHIGH0": {
"direction": "IN"
},
"DO26": {
"direction": "OUT"
},
"RDCOUNT7": {
"direction": "OUT"
},
"RDCOUNT1": {
"direction": "OUT"
},
"DO8": {
"direction": "OUT"
},
"DOP2": {
"direction": "OUT"
},
"WEBWE7": {
"direction": "IN"
},
"DO28": {
"DO25": {
"direction": "OUT"
},
"DIADI0": {
"direction": "IN"
},
"DIBDI2": {
"DIADI1": {
"direction": "IN"
},
"RDCOUNT0": {
"DO17": {
"direction": "OUT"
},
"DO19": {
"direction": "OUT"
},
"FULL": {
"direction": "OUT"
},
"RDCOUNT4": {
"direction": "OUT"
},
"ADDRARDADDR6": {
"ADDRARDADDR7": {
"direction": "IN"
},
"DIBDI12": {
"direction": "IN"
},
"DIBDI4": {
"direction": "IN"
},
"RDCOUNT10": {
"direction": "OUT"
},
"ADDRARDADDR13": {
"direction": "IN"
},
"WRCOUNT10": {
"direction": "OUT"
},
"DIBDI8": {
"direction": "IN"
},
"ADDRBWRADDR1": {
"direction": "IN"
},
"DIPBDIP0": {
"direction": "IN"
},
"ADDRBWRADDR12": {
"direction": "IN"
},
"ADDRATIEHIGH0": {
"direction": "IN"
},
"WREN": {
"direction": "IN"
},
"RDRCLK": {
"ADDRARDADDR11": {
"direction": "IN"
},
"REGCE": {
"direction": "IN"
},
"DIADI5": {
"WEBWE7": {
"direction": "IN"
},
"DO24": {
"DO23": {
"direction": "OUT"
},
"DO11": {
"ADDRBWRADDR3": {
"direction": "IN"
},
"WEA0": {
"direction": "IN"
},
"DIBDI0": {
"direction": "IN"
},
"RDCOUNT9": {
"direction": "OUT"
},
"DO25": {
"ADDRARDADDR3": {
"direction": "IN"
},
"DIBDI10": {
"direction": "IN"
},
"EMPTY": {
"direction": "OUT"
},
"WRCOUNT11": {
"direction": "OUT"
},
"DO6": {
"direction": "OUT"
},
"ADDRBTIEHIGH1": {
"direction": "IN"
},
"DIPBDIP1": {
"direction": "IN"
},
"DO4": {
"direction": "OUT"
},
"WRCOUNT4": {
"direction": "OUT"
},
"DIADI13": {
"direction": "IN"
},
"DIADI11": {
"direction": "IN"
},
"DIADI15": {
"direction": "IN"
},
"WRCOUNT7": {
"direction": "OUT"
},
"RDCOUNT2": {
"direction": "OUT"
},
"DO18": {
"direction": "OUT"
},
"DO5": {
"direction": "OUT"
},
"DO7": {
"direction": "OUT"
},
"WEA0": {
"ADDRARDADDR8": {
"direction": "IN"
},
"ADDRARDADDR5": {
"direction": "IN"
},
"WRCOUNT1": {
"direction": "OUT"
},
"ADDRBWRADDR0": {
"direction": "IN"
},
"DIADI1": {
"ADDRBTIEHIGH1": {
"direction": "IN"
},
"DIADI14": {
"ADDRARDADDR4": {
"direction": "IN"
},
"ADDRBWRADDR4": {
"direction": "IN"
},
"ADDRBWRADDR2": {
"DIPADIP0": {
"direction": "IN"
},
"WRCOUNT0": {
"direction": "OUT"
},
"DIBDI6": {
"direction": "IN"
},
"DO2": {
"direction": "OUT"
},
"WEBWE6": {
"direction": "IN"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"ADDRARDADDR4": {
"direction": "IN"
},
"ADDRBWRADDR6": {
"direction": "IN"
},
"ADDRARDADDR2": {
"DIADI6": {
"direction": "IN"
},
"DIADI7": {
@ -320,218 +90,448 @@
"DIADI12": {
"direction": "IN"
},
"ADDRARDADDR7": {
"direction": "IN"
},
"ADDRBWRADDR9": {
"direction": "IN"
},
"WRCOUNT11": {
"WRCOUNT5": {
"direction": "OUT"
},
"WEBWE3": {
"ADDRBWRADDR4": {
"direction": "IN"
},
"DO16": {
"direction": "OUT"
},
"DOP0": {
"direction": "OUT"
},
"RDCOUNT6": {
"direction": "OUT"
},
"ADDRARDADDR11": {
"direction": "IN"
},
"DO17": {
"direction": "OUT"
},
"DIBDI10": {
"direction": "IN"
},
"DO30": {
"direction": "OUT"
},
"RSTREG": {
"direction": "IN"
},
"ADDRBWRADDR8": {
"direction": "IN"
},
"WEBWE5": {
"direction": "IN"
},
"RDEN": {
"direction": "IN"
},
"DIADI6": {
"direction": "IN"
},
"DIBDI14": {
"direction": "IN"
},
"DO31": {
"direction": "OUT"
},
"DIBDI9": {
"direction": "IN"
},
"WRCOUNT6": {
"direction": "OUT"
},
"DO13": {
"direction": "OUT"
},
"DIBDI13": {
"direction": "IN"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
"DO27": {
"direction": "OUT"
},
"WEA2": {
"direction": "IN"
},
"ADDRARDADDR10": {
"direction": "IN"
},
"WRCLK": {
"direction": "IN"
},
"DIPADIP1": {
"direction": "IN"
},
"ADDRBWRADDR11": {
"direction": "IN"
},
"DOP3": {
"direction": "OUT"
},
"ADDRARDADDR9": {
"direction": "IN"
},
"ADDRBWRADDR10": {
"direction": "IN"
},
"WEA3": {
"direction": "IN"
},
"ADDRBWRADDR3": {
"direction": "IN"
},
"EMPTY": {
"direction": "OUT"
},
"ADDRARDADDR8": {
"direction": "IN"
},
"DIADI3": {
"direction": "IN"
},
"DO10": {
"direction": "OUT"
},
"ADDRBWRADDR7": {
"direction": "IN"
},
"WEBWE4": {
"direction": "IN"
},
"RDCOUNT11": {
"direction": "OUT"
},
"WEBWE1": {
"direction": "IN"
},
"RDCOUNT5": {
"direction": "OUT"
},
"DO12": {
"direction": "OUT"
},
"DO1": {
"direction": "OUT"
},
"RDCOUNT3": {
"direction": "OUT"
},
"RDCLK": {
"direction": "IN"
},
"DIADI2": {
"direction": "IN"
},
"ADDRARDADDR1": {
"direction": "IN"
},
"DIADI10": {
"direction": "IN"
},
"RST": {
"direction": "IN"
},
"DO15": {
"direction": "OUT"
},
"ADDRARDADDR3": {
"direction": "IN"
},
"DO22": {
"direction": "OUT"
},
"DIBDI0": {
"direction": "IN"
},
"DIBDI15": {
"direction": "IN"
},
"RSTRAMB": {
"direction": "IN"
},
"DO20": {
"direction": "OUT"
},
"ADDRARDADDR12": {
"direction": "IN"
},
"DIADI9": {
"direction": "IN"
},
"RDCOUNT9": {
"direction": "OUT"
},
"DIADI4": {
"REGCLKB": {
"direction": "IN"
},
"ADDRATIEHIGH1": {
"direction": "IN"
},
"WEBWE0": {
"ADDRBWRADDR5": {
"direction": "IN"
},
"DIBDI1": {
"direction": "IN"
},
"DO9": {
"RSTRAMB": {
"direction": "IN"
},
"ADDRBWRADDR7": {
"direction": "IN"
},
"DIBDI7": {
"direction": "IN"
},
"FULL": {
"direction": "OUT"
},
"REGCLKB": {
"ADDRBWRADDR6": {
"direction": "IN"
},
"WEBWE0": {
"direction": "IN"
},
"ADDRBWRADDR13": {
"direction": "IN"
},
"RST": {
"direction": "IN"
},
"DOP2": {
"direction": "OUT"
},
"WEA2": {
"direction": "IN"
},
"DIBDI14": {
"direction": "IN"
},
"DIBDI6": {
"direction": "IN"
},
"ADDRBWRADDR1": {
"direction": "IN"
},
"DIPBDIP0": {
"direction": "IN"
},
"WEBWE2": {
"direction": "IN"
},
"RDERR": {
"direction": "OUT"
},
"ADDRARDADDR1": {
"direction": "IN"
},
"DIADI11": {
"direction": "IN"
},
"DIPBDIP1": {
"direction": "IN"
},
"ADDRBWRADDR2": {
"direction": "IN"
},
"ADDRARDADDR13": {
"direction": "IN"
},
"ADDRATIEHIGH0": {
"direction": "IN"
},
"DO0": {
"direction": "OUT"
},
"ADDRBWRADDR11": {
"direction": "IN"
},
"DO12": {
"direction": "OUT"
},
"DO2": {
"direction": "OUT"
},
"WEBWE3": {
"direction": "IN"
},
"DIBDI8": {
"direction": "IN"
},
"ADDRBWRADDR8": {
"direction": "IN"
},
"DIBDI3": {
"direction": "IN"
},
"DO9": {
"direction": "OUT"
},
"RDCOUNT1": {
"direction": "OUT"
},
"RDCOUNT6": {
"direction": "OUT"
},
"ADDRARDADDR0": {
"direction": "IN"
},
"ADDRARDADDR5": {
"direction": "IN"
},
"DIBDI11": {
"direction": "IN"
},
"WRCOUNT3": {
"direction": "OUT"
},
"DO16": {
"direction": "OUT"
},
"RSTREGB": {
"direction": "IN"
},
"RDCOUNT0": {
"direction": "OUT"
},
"DO8": {
"direction": "OUT"
},
"DIADI8": {
"direction": "IN"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"WEA3": {
"direction": "IN"
},
"WEBWE5": {
"direction": "IN"
},
"DO18": {
"direction": "OUT"
},
"ADDRBWRADDR9": {
"direction": "IN"
},
"WEBWE6": {
"direction": "IN"
},
"WRCOUNT6": {
"direction": "OUT"
},
"RDCOUNT11": {
"direction": "OUT"
},
"DO24": {
"direction": "OUT"
},
"DO20": {
"direction": "OUT"
},
"RDRCLK": {
"direction": "IN"
},
"ADDRARDADDR9": {
"direction": "IN"
},
"DOP0": {
"direction": "OUT"
},
"DIADI2": {
"direction": "IN"
},
"DO19": {
"direction": "OUT"
},
"DIPADIP1": {
"direction": "IN"
},
"RDCOUNT8": {
"direction": "OUT"
},
"DO3": {
"direction": "OUT"
},
"DOP1": {
"direction": "OUT"
},
"ADDRBWRADDR12": {
"direction": "IN"
},
"DO14": {
"direction": "OUT"
},
"DIADI10": {
"direction": "IN"
},
"DIBDI4": {
"direction": "IN"
},
"DO4": {
"direction": "OUT"
},
"WRCOUNT10": {
"direction": "OUT"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
"DIADI13": {
"direction": "IN"
},
"DIADI14": {
"direction": "IN"
},
"ADDRBTIEHIGH0": {
"direction": "IN"
},
"DIBDI2": {
"direction": "IN"
},
"ADDRARDADDR2": {
"direction": "IN"
},
"DO31": {
"direction": "OUT"
},
"WRCOUNT2": {
"direction": "OUT"
},
"DIADI15": {
"direction": "IN"
},
"RDCLK": {
"direction": "IN"
},
"DO22": {
"direction": "OUT"
},
"REGCEB": {
"direction": "IN"
},
"WRCOUNT1": {
"direction": "OUT"
},
"DO15": {
"direction": "OUT"
},
"DO29": {
"direction": "OUT"
},
"DO11": {
"direction": "OUT"
},
"DIADI5": {
"direction": "IN"
},
"DIADI3": {
"direction": "IN"
},
"RSTREG": {
"direction": "IN"
},
"DO7": {
"direction": "OUT"
},
"DIBDI12": {
"direction": "IN"
},
"WRERR": {
"direction": "OUT"
},
"WEBWE4": {
"direction": "IN"
},
"WEBWE1": {
"direction": "IN"
},
"DO10": {
"direction": "OUT"
},
"RDEN": {
"direction": "IN"
},
"WREN": {
"direction": "IN"
},
"DO26": {
"direction": "OUT"
},
"RDCOUNT7": {
"direction": "OUT"
},
"ADDRBWRADDR10": {
"direction": "IN"
},
"RDCOUNT3": {
"direction": "OUT"
},
"WRCOUNT7": {
"direction": "OUT"
},
"ADDRARDADDR6": {
"direction": "IN"
},
"WEA1": {
"direction": "IN"
},
"WRCOUNT9": {
"direction": "OUT"
},
"WRCOUNT4": {
"direction": "OUT"
},
"DIBDI13": {
"direction": "IN"
},
"DO27": {
"direction": "OUT"
},
"DIBDI15": {
"direction": "IN"
},
"DO30": {
"direction": "OUT"
},
"DIADI9": {
"direction": "IN"
},
"DIBDI5": {
"direction": "IN"
},
"DO13": {
"direction": "OUT"
},
"ADDRARDADDR12": {
"direction": "IN"
},
"ADDRARDADDR10": {
"direction": "IN"
},
"RDCOUNT5": {
"direction": "OUT"
},
"WRCOUNT8": {
"direction": "OUT"
},
"DIBDI9": {
"direction": "IN"
},
"WRCLK": {
"direction": "IN"
},
"DO1": {
"direction": "OUT"
},
"RDCOUNT2": {
"direction": "OUT"
},
"DO28": {
"direction": "OUT"
},
"RDCOUNT10": {
"direction": "OUT"
},
"DOP3": {
"direction": "OUT"
},
"DO21": {
"direction": "OUT"
}
},
"type": "FIFO18E1",
"site_pips": {
"RDENINV:RDEN_B": {
"from_pin": "RDEN_B",
"to_pin": "OUT"
},
"WRENINV:WREN_B": {
"from_pin": "WREN_B",
"to_pin": "OUT"
},
"WRCLKINV:WRCLK_B": {
"from_pin": "WRCLK_B",
"to_pin": "OUT"
},
"RSTREGINV:RSTREG": {
"from_pin": "RSTREG",
"to_pin": "OUT"
},
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
},
"RDCLKINV:RDCLK": {
"from_pin": "RDCLK",
"to_pin": "OUT"
},
"WRCLKINV:WRCLK": {
"from_pin": "WRCLK",
"to_pin": "OUT"
},
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
},
"WRENINV:WREN": {
"from_pin": "WREN",
"to_pin": "OUT"
},
"RDRCLKINV:RDRCLK": {
"from_pin": "RDRCLK",
"to_pin": "OUT"
},
"RDENINV:RDEN": {
"from_pin": "RDEN",
"to_pin": "OUT"
},
"RDRCLKINV:RDRCLK_B": {
"from_pin": "RDRCLK_B",
"to_pin": "OUT"
},
"RSTREGINV:RSTREG_B": {
"from_pin": "RSTREG_B",
"to_pin": "OUT"
},
"RDCLKINV:RDCLK_B": {
"from_pin": "RDCLK_B",
"to_pin": "OUT"
}
}
}

276
artix7/site_type_FRAME_ECC.json
View File

@ -1,171 +1,171 @@
{
"type": "FRAME_ECC",
"site_pips": {},
"site_pins": {
"FAR20": {
"direction": "OUT"
},
"FAR22": {
"direction": "OUT"
},
"FAR13": {
"direction": "OUT"
},
"FAR25": {
"direction": "OUT"
},
"SYNDROME0": {
"direction": "OUT"
},
"FAR24": {
"direction": "OUT"
},
"FAR1": {
"direction": "OUT"
},
"CRCERROR": {
"direction": "OUT"
},
"SYNBIT4": {
"direction": "OUT"
},
"FAR2": {
"direction": "OUT"
},
"SYNDROME3": {
"direction": "OUT"
},
"FAR8": {
"direction": "OUT"
},
"SYNBIT0": {
"direction": "OUT"
},
"SYNBIT1": {
"direction": "OUT"
},
"FAR17": {
"direction": "OUT"
},
"SYNDROME9": {
"direction": "OUT"
},
"FAR0": {
"SYNWORD1": {
"direction": "OUT"
},
"ECCERRORSINGLE": {
"direction": "OUT"
},
"FAR15": {
"direction": "OUT"
},
"FAR6": {
"direction": "OUT"
},
"SYNDROMEVALID": {
"direction": "OUT"
},
"FAR10": {
"direction": "OUT"
},
"FAR16": {
"direction": "OUT"
},
"SYNBIT2": {
"direction": "OUT"
},
"SYNWORD0": {
"direction": "OUT"
},
"SYNWORD6": {
"direction": "OUT"
},
"FAR4": {
"direction": "OUT"
},
"SYNWORD2": {
"direction": "OUT"
},
"FAR12": {
"direction": "OUT"
},
"FAR3": {
"direction": "OUT"
},
"SYNDROME6": {
"direction": "OUT"
},
"SYNDROME10": {
"direction": "OUT"
},
"FAR23": {
"direction": "OUT"
},
"FAR19": {
"direction": "OUT"
},
"FAR11": {
"direction": "OUT"
},
"SYNBIT3": {
"direction": "OUT"
},
"SYNDROME1": {
"direction": "OUT"
},
"FAR9": {
"direction": "OUT"
},
"FAR7": {
"direction": "OUT"
},
"FAR18": {
"direction": "OUT"
},
"SYNDROME4": {
"direction": "OUT"
},
"SYNDROME2": {
"direction": "OUT"
},
"SYNDROME11": {
"direction": "OUT"
},
"SYNWORD1": {
"direction": "OUT"
},
"SYNDROME12": {
"direction": "OUT"
},
"SYNDROME8": {
"direction": "OUT"
},
"SYNWORD3": {
"direction": "OUT"
},
"FAR5": {
"FAR14": {
"direction": "OUT"
},
"SYNDROME7": {
"FAR22": {
"direction": "OUT"
},
"FAR12": {
"direction": "OUT"
},
"ECCERROR": {
"direction": "OUT"
},
"SYNDROME5": {
"FAR1": {
"direction": "OUT"
},
"SYNWORD5": {
"FAR10": {
"direction": "OUT"
},
"FAR14": {
"FAR19": {
"direction": "OUT"
},
"SYNBIT2": {
"direction": "OUT"
},
"FAR13": {
"direction": "OUT"
},
"SYNDROME2": {
"direction": "OUT"
},
"SYNDROME4": {
"direction": "OUT"
},
"SYNDROME11": {
"direction": "OUT"
},
"FAR21": {
"direction": "OUT"
},
"FAR5": {
"direction": "OUT"
},
"FAR3": {
"direction": "OUT"
},
"FAR20": {
"direction": "OUT"
},
"SYNDROME0": {
"direction": "OUT"
},
"FAR18": {
"direction": "OUT"
},
"SYNDROME3": {
"direction": "OUT"
},
"FAR15": {
"direction": "OUT"
},
"FAR8": {
"direction": "OUT"
},
"SYNDROME1": {
"direction": "OUT"
},
"SYNBIT4": {
"direction": "OUT"
},
"SYNDROME9": {
"direction": "OUT"
},
"CRCERROR": {
"direction": "OUT"
},
"FAR17": {
"direction": "OUT"
},
"SYNBIT3": {
"direction": "OUT"
},
"SYNWORD4": {
"direction": "OUT"
},
"FAR25": {
"direction": "OUT"
},
"FAR0": {
"direction": "OUT"
},
"FAR16": {
"direction": "OUT"
},
"SYNWORD6": {
"direction": "OUT"
},
"SYNDROME12": {
"direction": "OUT"
},
"SYNWORD5": {
"direction": "OUT"
},
"FAR4": {
"direction": "OUT"
},
"SYNDROME5": {
"direction": "OUT"
},
"SYNWORD2": {
"direction": "OUT"
},
"FAR2": {
"direction": "OUT"
},
"SYNWORD0": {
"direction": "OUT"
},
"FAR9": {
"direction": "OUT"
},
"FAR11": {
"direction": "OUT"
},
"SYNDROME8": {
"direction": "OUT"
},
"SYNDROME7": {
"direction": "OUT"
},
"FAR23": {
"direction": "OUT"
},
"SYNDROME6": {
"direction": "OUT"
},
"FAR7": {
"direction": "OUT"
},
"FAR24": {
"direction": "OUT"
},
"SYNBIT1": {
"direction": "OUT"
},
"SYNDROMEVALID": {
"direction": "OUT"
},
"SYNBIT0": {
"direction": "OUT"
},
"FAR6": {
"direction": "OUT"
}
}
},
"type": "FRAME_ECC",
"site_pips": {}
}

3648
artix7/site_type_GTPE2_CHANNEL.json
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866
artix7/site_type_GTPE2_COMMON.json
View File

@ -1,542 +1,542 @@
{
"type": "GTPE2_COMMON",
"site_pips": {
"PLL0LOCKDETCLKINV:PLL0LOCKDETCLK_B": {
"from_pin": "PLL0LOCKDETCLK_B",
"to_pin": "OUT"
},
"PMASCANCLK0INV:PMASCANCLK0_B": {
"from_pin": "PMASCANCLK0_B",
"to_pin": "OUT"
},
"DRPCLKINV:DRPCLK": {
"from_pin": "DRPCLK",
"to_pin": "OUT"
},
"PMASCANCLK0INV:PMASCANCLK0": {
"from_pin": "PMASCANCLK0",
"to_pin": "OUT"
},
"GTGREFCLK0INV:GTGREFCLK0_B": {
"from_pin": "GTGREFCLK0_B",
"to_pin": "OUT"
},
"GTGREFCLK1INV:GTGREFCLK1": {
"from_pin": "GTGREFCLK1",
"to_pin": "OUT"
},
"PLL1LOCKDETCLKINV:PLL1LOCKDETCLK": {
"from_pin": "PLL1LOCKDETCLK",
"to_pin": "OUT"
},
"PLLCLKSPAREINV:PLLCLKSPARE": {
"from_pin": "PLLCLKSPARE",
"to_pin": "OUT"
},
"GTGREFCLK1INV:GTGREFCLK1_B": {
"from_pin": "GTGREFCLK1_B",
"to_pin": "OUT"
},
"PMASCANCLK1INV:PMASCANCLK1": {
"from_pin": "PMASCANCLK1",
"to_pin": "OUT"
},
"GTGREFCLK0INV:GTGREFCLK0": {
"from_pin": "GTGREFCLK0",
"to_pin": "OUT"
},
"PMASCANCLK1INV:PMASCANCLK1_B": {
"from_pin": "PMASCANCLK1_B",
"to_pin": "OUT"
},
"PLLCLKSPAREINV:PLLCLKSPARE_B": {
"from_pin": "PLLCLKSPARE_B",
"to_pin": "OUT"
},
"DRPCLKINV:DRPCLK_B": {
"from_pin": "DRPCLK_B",
"to_pin": "OUT"
},
"PLL0LOCKDETCLKINV:PLL0LOCKDETCLK": {
"from_pin": "PLL0LOCKDETCLK",
"to_pin": "OUT"
},
"PLL1LOCKDETCLKINV:PLL1LOCKDETCLK_B": {
"from_pin": "PLL1LOCKDETCLK_B",
"to_pin": "OUT"
}
},
"site_pins": {
"BGMONITORENB": {
"direction": "IN"
},
"PLL1REFCLKSEL1": {
"direction": "IN"
},
"PLL0REFCLKSEL1": {
"direction": "IN"
},
"PMARSVD0": {
"direction": "IN"
},
"DRPDO3": {
"PLL0OUTCLK": {
"direction": "OUT"
},
"BGRCALOVRD4": {
"DRPDI5": {
"direction": "IN"
},
"PLLRSVD11": {
"direction": "IN"
},
"PLL1LOCKDETCLK": {
"direction": "IN"
},
"PLL0REFCLKSEL2": {
"direction": "IN"
},
"PMARSVD5": {
"direction": "IN"
},
"DRPEN": {
"direction": "IN"
},
"PLL1FBCLKLOST": {
"direction": "OUT"
},
"PMARSVDOUT10": {
"direction": "OUT"
},
"PMARSVDOUT9": {
"direction": "OUT"
},
"BGRCALOVRD0": {
"direction": "IN"
},
"DRPADDR0": {
"direction": "IN"
},
"DRPADDR4": {
"direction": "IN"
},
"DRPDO4": {
"direction": "OUT"
},
"PLLRSVD13": {
"direction": "IN"
},
"PLLRSVD115": {
"direction": "IN"
},
"PLLRSVD23": {
"direction": "IN"
},
"PMARSVD7": {
"direction": "IN"
},
"DMONITOROUT3": {
"direction": "OUT"
},
"PLL0LOCK": {
"direction": "OUT"
},
"PLLRSVD19": {
"direction": "IN"
},
"DRPADDR7": {
"PLLRSVD20": {
"direction": "IN"
},
"DMONITOROUT0": {
"direction": "OUT"
},
"DRPWE": {
"PLL1REFCLKSEL1": {
"direction": "IN"
},
"DMONITOROUT7": {
"DRPDI0": {
"direction": "IN"
},
"PLL0FBCLKLOST": {
"direction": "OUT"
},
"PLLRSVD111": {
"GTWESTREFCLK0": {
"direction": "IN"
},
"DRPCLK": {
"PMASCANIN3": {
"direction": "IN"
},
"DRPDO8": {
"direction": "OUT"
},
"DRPRDY": {
"direction": "OUT"
},
"PMARSVD2": {
"DRPDI3": {
"direction": "IN"
},
"PLLRSVD114": {
"direction": "IN"
},
"PMARSVD1": {
"PMASCANCLK0": {
"direction": "IN"
},
"PLLRSVD113": {
"direction": "IN"
},
"PMARSVDOUT12": {
"direction": "OUT"
},
"PMARSVD1": {
"direction": "IN"
},
"PLLRSVD16": {
"direction": "IN"
},
"PLL0REFCLKSEL2": {
"direction": "IN"
},
"PMARSVDOUT10": {
"direction": "OUT"
},
"BGMONITORENB": {
"direction": "IN"
},
"PLLRSVD111": {
"direction": "IN"
},
"PLLRSVD10": {
"direction": "IN"
},
"BGRCALOVRD3": {
"direction": "IN"
},
"DRPADDR6": {
"direction": "IN"
},
"PLLCLKSPARE": {
"direction": "IN"
},
"REFCLKOUTMONITOR0": {
"direction": "OUT"
},
"DRPDI4": {
"direction": "IN"
},
"RCALENB": {
"PMARSVD0": {
"direction": "IN"
},
"PLL0PD": {
"DRPDI7": {
"direction": "IN"
},
"DRPDI10": {
"DRPDI6": {
"direction": "IN"
},
"GTREFCLK1": {
"direction": "IN"
},
"PLLRSVD19": {
"direction": "IN"
},
"DMONITOROUT6": {
"direction": "OUT"
},
"PMARSVDOUT1": {
"direction": "OUT"
},
"DMONITOROUT2": {
"direction": "OUT"
},
"DRPDI11": {
"direction": "IN"
},
"DRPDI12": {
"direction": "IN"
},
"PLL0REFCLKSEL0": {
"direction": "IN"
},
"PMARSVD7": {
"direction": "IN"
},
"PMASCANIN1": {
"direction": "IN"
},
"PMARSVDOUT4": {
"direction": "OUT"
},
"PMARSVDOUT5": {
"direction": "OUT"
},
"DRPADDR4": {
"direction": "IN"
},
"PLLRSVD24": {
"direction": "IN"
},
"DRPDO7": {
"direction": "OUT"
},
"DRPDI8": {
"direction": "IN"
},
"BGRCALOVRDENB": {
"direction": "IN"
},
"DMONITOROUT1": {
"direction": "OUT"
},
"DRPDI13": {
"direction": "IN"
},
"PLLRSVD15": {
"direction": "IN"
},
"PLLRSVD17": {
"direction": "IN"
},
"PLL1REFCLKLOST": {
"direction": "OUT"
},
"PLL1RESET": {
"direction": "IN"
},
"DMONITOROUT7": {
"direction": "OUT"
},
"PLLRSVD114": {
"direction": "IN"
},
"DRPDO3": {
"direction": "OUT"
},
"PMARSVDOUT7": {
"direction": "OUT"
},
"PLL0REFCLKLOST": {
"direction": "OUT"
},
"PLLRSVD22": {
"direction": "IN"
},
"PLL1OUTCLK": {
"direction": "OUT"
},
"PLLRSVD21": {
"direction": "IN"
},
"PLL1LOCKEN": {
"direction": "IN"
},
"PMASCANOUT0": {
"direction": "OUT"
},
"PLL0REFCLKSEL0": {
"direction": "IN"
},
"PLL1REFCLKLOST": {
"DRPDO8": {
"direction": "OUT"
},
"GTEASTREFCLK1": {
"direction": "IN"
},
"DRPDI6": {
"DRPDO11": {
"direction": "OUT"
},
"PLL1FBCLKLOST": {
"direction": "OUT"
},
"BGRCALOVRD2": {
"direction": "IN"
},
"PMASCANENB": {
"DRPRDY": {
"direction": "OUT"
},
"DRPDO1": {
"direction": "OUT"
},
"PMASCANCLK1": {
"direction": "IN"
},
"PLL0LOCKEN": {
"REFCLKOUTMONITOR1": {
"direction": "OUT"
},
"PLL1REFCLKSEL0": {
"direction": "IN"
},
"DRPDI9": {
"direction": "IN"
},
"PMARSVDOUT15": {
"direction": "OUT"
},
"PMARSVDOUT0": {
"direction": "OUT"
},
"PMARSVDOUT3": {
"direction": "OUT"
},
"PLL1LOCKDETCLK": {
"direction": "IN"
},
"PLL1LOCK": {
"direction": "OUT"
},
"DRPDO9": {
"direction": "OUT"
},
"DRPDO14": {
"direction": "OUT"
},
"PMARSVDOUT2": {
"direction": "OUT"
},
"PMARSVDOUT14": {
"direction": "OUT"
},
"GTREFCLK0": {
"direction": "IN"
},
"PLL1LOCKEN": {
"direction": "IN"
},
"DRPDO10": {
"direction": "OUT"
},
"GTGREFCLK0": {
"direction": "IN"
},
"PLLRSVD23": {
"direction": "IN"
},
"DRPDO4": {
"direction": "OUT"
},
"PMARSVDOUT11": {
"direction": "OUT"
},
"PLLRSVD11": {
"direction": "IN"
},
"PMARSVDOUT9": {
"direction": "OUT"
},
"DMONITOROUT3": {
"direction": "OUT"
},
"RCALENB": {
"direction": "IN"
},
"PMASCANOUT0": {
"direction": "OUT"
},
"BGRCALOVRD4": {
"direction": "IN"
},
"DRPDO5": {
"direction": "OUT"
},
"PLLRSVD14": {
"direction": "IN"
},
"DRPCLK": {
"direction": "IN"
},
"PMARSVD5": {
"direction": "IN"
},
"PMARSVD6": {
"direction": "IN"
},
"DRPEN": {
"direction": "IN"
},
"DRPADDR0": {
"direction": "IN"
},
"DRPADDR7": {
"direction": "IN"
},
"PMASCANIN2": {
"direction": "IN"
},
"PMARSVDOUT13": {
"direction": "OUT"
},
"DMONITOROUT5": {
"direction": "OUT"
},
"QDPMASCANRSTEN": {
"direction": "IN"
},
"DMONITOROUT4": {
"direction": "OUT"
},
"PMASCANOUT1": {
"direction": "OUT"
},
"DRPADDR5": {
"direction": "IN"
},
"DRPADDR1": {
"direction": "IN"
},
"PLL0LOCK": {
"direction": "OUT"
},
"BGRCALOVRD1": {
"direction": "IN"
},
"PMASCANIN0": {
"direction": "IN"
},
"PMARSVD3": {
"direction": "IN"
},
"DRPWE": {
"direction": "IN"
},
"PLL1REFCLKSEL2": {
"direction": "IN"
},
"BGBYPASSB": {
"direction": "IN"
},
"PMASCANOUT2": {
"PMARSVDOUT6": {
"direction": "OUT"
},
"DRPDO7": {
"direction": "OUT"
},
"GTGREFCLK1": {
"GTEASTREFCLK0": {
"direction": "IN"
},
"DRPDO12": {
"direction": "OUT"
},
"PLL0REFCLKLOST": {
"direction": "OUT"
},
"PLL1OUTREFCLK": {
"direction": "OUT"
},
"PLLRSVD112": {
"DRPDI1": {
"direction": "IN"
},
"BGRCALOVRDENB": {
"QDPMASCANMODEB": {
"direction": "IN"
},
"PLLCLKSPARE": {
"PLLRSVD21": {
"direction": "IN"
},
"DRPDO2": {
"direction": "OUT"
},
"DRPDO12": {
"direction": "OUT"
},
"PMASCANOUT4": {
"direction": "OUT"
},
"PMASCANCLK0": {
"PMASCANENB": {
"direction": "IN"
},
"PLLRSVD110": {
"direction": "IN"
},
"DRPDO11": {
"PLL0OUTREFCLK": {
"direction": "OUT"
},
"BGPDB": {
"direction": "IN"
},
"GTGREFCLK1": {
"direction": "IN"
},
"PLLRSVD115": {
"direction": "IN"
},
"DRPDI2": {
"direction": "IN"
},
"BGRCALOVRD0": {
"direction": "IN"
},
"DRPADDR2": {
"direction": "IN"
},
"DRPDI10": {
"direction": "IN"
},
"PLL0REFCLKSEL1": {
"direction": "IN"
},
"PMARSVD4": {
"direction": "IN"
},
"PLLRSVD12": {
"direction": "IN"
},
"DRPDI14": {
"direction": "IN"
},
"DRPDO13": {
"direction": "OUT"
},
"DRPDI2": {
"direction": "IN"
},
"PMARSVDOUT14": {
"direction": "OUT"
},
"GTWESTREFCLK1": {
"direction": "IN"
},
"PMARSVDOUT3": {
"direction": "OUT"
},
"PMARSVDOUT11": {
"direction": "OUT"
},
"BGRCALOVRD2": {
"direction": "IN"
},
"DRPADDR3": {
"direction": "IN"
},
"PMASCANOUT3": {
"direction": "OUT"
},
"PLLRSVD15": {
"direction": "IN"
},
"DRPDO9": {
"direction": "OUT"
},
"DRPADDR6": {
"direction": "IN"
},
"QDPMASCANMODEB": {
"direction": "IN"
},
"PMARSVD6": {
"direction": "IN"
},
"PMASCANIN3": {
"direction": "IN"
},
"PMASCANIN0": {
"direction": "IN"
},
"GTGREFCLK0": {
"direction": "IN"
},
"PLLRSVD17": {
"direction": "IN"
},
"DRPDI3": {
"direction": "IN"
},
"PLL1PD": {
"direction": "IN"
},
"GTREFCLK0": {
"direction": "IN"
},
"PLL0FBCLKLOST": {
"direction": "OUT"
},
"PLL1RESET": {
"direction": "IN"
},
"PLLRSVD14": {
"direction": "IN"
},
"DMONITOROUT5": {
"direction": "OUT"
},
"PLLRSVD16": {
"direction": "IN"
},
"PLLRSVD10": {
"direction": "IN"
},
"QDPMASCANRSTEN": {
"direction": "IN"
},
"PMASCANIN4": {
"direction": "IN"
},
"PMARSVDOUT2": {
"direction": "OUT"
},
"PMASCANCLK1": {
"direction": "IN"
},
"DRPDI15": {
"direction": "IN"
},
"DMONITOROUT1": {
"direction": "OUT"
},
"PLLRSVD24": {
"direction": "IN"
},
"DMONITOROUT4": {
"direction": "OUT"
},
"DRPDI7": {
"direction": "IN"
},
"GTREFCLK1": {
"direction": "IN"
},
"PMARSVDOUT5": {
"direction": "OUT"
},
"PMARSVDOUT4": {
"direction": "OUT"
},
"DRPDO0": {
"direction": "OUT"
},
"PLL0OUTCLK": {
"direction": "OUT"
"PLL0PD": {
"direction": "IN"
},
"DMONITOROUT2": {
"direction": "OUT"
"PMARSVD2": {
"direction": "IN"
},
"PLL0LOCKDETCLK": {
"direction": "IN"
},
"DMONITOROUT6": {
"direction": "OUT"
},
"DRPDO5": {
"direction": "OUT"
},
"PMARSVDOUT15": {
"direction": "OUT"
},
"DRPDI0": {
"direction": "IN"
},
"DRPDI13": {
"direction": "IN"
},
"DRPDO14": {
"direction": "OUT"
},
"BGRCALOVRD3": {
"direction": "IN"
},
"PLL1REFCLKSEL2": {
"direction": "IN"
},
"DRPDI12": {
"direction": "IN"
},
"GTEASTREFCLK0": {
"direction": "IN"
},
"PMARSVDOUT1": {
"direction": "OUT"
},
"PMARSVDOUT12": {
"direction": "OUT"
},
"DRPDI9": {
"direction": "IN"
},
"PLL0RESET": {
"direction": "IN"
},
"DRPDO1": {
"direction": "OUT"
},
"REFCLKOUTMONITOR0": {
"direction": "OUT"
},
"PMARSVDOUT6": {
"direction": "OUT"
},
"BGPDB": {
"direction": "IN"
},
"DRPDO2": {
"direction": "OUT"
},
"DRPDI5": {
"direction": "IN"
},
"DRPDO10": {
"direction": "OUT"
},
"BGRCALOVRD1": {
"direction": "IN"
},
"REFCLKOUTMONITOR1": {
"direction": "OUT"
},
"DRPDI11": {
"direction": "IN"
},
"DRPDI8": {
"direction": "IN"
},
"PLLRSVD18": {
"direction": "IN"
},
"DRPDI1": {
"direction": "IN"
},
"PLL1REFCLKSEL0": {
"direction": "IN"
},
"PMASCANIN2": {
"direction": "IN"
},
"DRPDO6": {
"direction": "OUT"
},
"PMARSVDOUT7": {
"direction": "OUT"
},
"PLL0OUTREFCLK": {
"direction": "OUT"
},
"DRPADDR1": {
"direction": "IN"
},
"PMASCANOUT1": {
"direction": "OUT"
},
"DRPDO15": {
"direction": "OUT"
},
"PMARSVD3": {
"direction": "IN"
},
"PMASCANIN1": {
"direction": "IN"
},
"PMARSVD4": {
"direction": "IN"
},
"GTWESTREFCLK0": {
"direction": "IN"
},
"DRPADDR2": {
"direction": "IN"
},
"PLL1LOCK": {
"direction": "OUT"
},
"PMARSVDOUT0": {
"PMASCANOUT3": {
"direction": "OUT"
},
"PMARSVDOUT8": {
"direction": "OUT"
},
"PLLRSVD20": {
"DRPDO15": {
"direction": "OUT"
},
"GTWESTREFCLK1": {
"direction": "IN"
},
"PMARSVDOUT13": {
"DRPDI15": {
"direction": "IN"
},
"PLL0LOCKEN": {
"direction": "IN"
},
"DRPADDR3": {
"direction": "IN"
},
"PMASCANOUT2": {
"direction": "OUT"
},
"PLLRSVD13": {
"direction": "IN"
},
"DRPDO6": {
"direction": "OUT"
},
"DRPDO13": {
"direction": "OUT"
},
"PLLRSVD112": {
"direction": "IN"
},
"PLLRSVD110": {
"direction": "IN"
},
"PLL0RESET": {
"direction": "IN"
},
"PLLRSVD18": {
"direction": "IN"
}
},
"type": "GTPE2_COMMON",
"site_pips": {
"PMASCANCLK0INV:PMASCANCLK0_B": {
"from_pin": "PMASCANCLK0_B",
"to_pin": "OUT"
},
"PLL0LOCKDETCLKINV:PLL0LOCKDETCLK_B": {
"from_pin": "PLL0LOCKDETCLK_B",
"to_pin": "OUT"
},
"PMASCANCLK0INV:PMASCANCLK0": {
"from_pin": "PMASCANCLK0",
"to_pin": "OUT"
},
"GTGREFCLK1INV:GTGREFCLK1_B": {
"from_pin": "GTGREFCLK1_B",
"to_pin": "OUT"
},
"PLL1LOCKDETCLKINV:PLL1LOCKDETCLK_B": {
"from_pin": "PLL1LOCKDETCLK_B",
"to_pin": "OUT"
},
"PLLCLKSPAREINV:PLLCLKSPARE_B": {
"from_pin": "PLLCLKSPARE_B",
"to_pin": "OUT"
},
"DRPCLKINV:DRPCLK": {
"from_pin": "DRPCLK",
"to_pin": "OUT"
},
"PMASCANCLK1INV:PMASCANCLK1": {
"from_pin": "PMASCANCLK1",
"to_pin": "OUT"
},
"DRPCLKINV:DRPCLK_B": {
"from_pin": "DRPCLK_B",
"to_pin": "OUT"
},
"PLL1LOCKDETCLKINV:PLL1LOCKDETCLK": {
"from_pin": "PLL1LOCKDETCLK",
"to_pin": "OUT"
},
"GTGREFCLK0INV:GTGREFCLK0_B": {
"from_pin": "GTGREFCLK0_B",
"to_pin": "OUT"
},
"PLLCLKSPAREINV:PLLCLKSPARE": {
"from_pin": "PLLCLKSPARE",
"to_pin": "OUT"
},
"GTGREFCLK1INV:GTGREFCLK1": {
"from_pin": "GTGREFCLK1",
"to_pin": "OUT"
},
"PLL0LOCKDETCLKINV:PLL0LOCKDETCLK": {
"from_pin": "PLL0LOCKDETCLK",
"to_pin": "OUT"
},
"PMASCANCLK1INV:PMASCANCLK1_B": {
"from_pin": "PMASCANCLK1_B",
"to_pin": "OUT"
},
"GTGREFCLK0INV:GTGREFCLK0": {
"from_pin": "GTGREFCLK0",
"to_pin": "OUT"
}
}
}

36
artix7/site_type_IBUFDS_GTE2.json
View File

@ -1,33 +1,33 @@
{
"type": "IBUFDS_GTE2",
"site_pips": {
"CLKTESTSIGINV:CLKTESTSIG_B": {
"from_pin": "CLKTESTSIG_B",
"to_pin": "OUT"
},
"CLKTESTSIGINV:CLKTESTSIG": {
"from_pin": "CLKTESTSIG",
"to_pin": "OUT"
}
},
"site_pins": {
"O": {
"direction": "OUT"
},
"CEB": {
"direction": "IN"
},
"I": {
"direction": "IN"
},
"ODIV2": {
"direction": "OUT"
},
"CLKTESTSIG": {
"direction": "IN"
},
"CEB": {
"direction": "IN"
},
"IB": {
"direction": "IN"
},
"O": {
"ODIV2": {
"direction": "OUT"
}
},
"type": "IBUFDS_GTE2",
"site_pips": {
"CLKTESTSIGINV:CLKTESTSIG": {
"from_pin": "CLKTESTSIG",
"to_pin": "OUT"
},
"CLKTESTSIGINV:CLKTESTSIG_B": {
"from_pin": "CLKTESTSIG_B",
"to_pin": "OUT"
}
}
}

332
artix7/site_type_ICAP.json
View File

@ -1,207 +1,207 @@
{
"type": "ICAP",
"site_pips": {},
"site_pins": {
"I4": {
"direction": "IN"
},
"O16": {
"direction": "OUT"
},
"O12": {
"direction": "OUT"
},
"O7": {
"direction": "OUT"
},
"I14": {
"direction": "IN"
},
"I13": {
"direction": "IN"
},
"O3": {
"direction": "OUT"
},
"I26": {
"direction": "IN"
},
"O10": {
"direction": "OUT"
},
"I30": {
"direction": "IN"
},
"I7": {
"direction": "IN"
},
"O13": {
"direction": "OUT"
},
"O27": {
"direction": "OUT"
},
"I5": {
"direction": "IN"
},
"I22": {
"direction": "IN"
},
"O2": {
"direction": "OUT"
},
"I16": {
"direction": "IN"
},
"O21": {
"direction": "OUT"
},
"I31": {
"direction": "IN"
},
"I11": {
"direction": "IN"
},
"I15": {
"direction": "IN"
},
"O26": {
"direction": "OUT"
},
"O24": {
"direction": "OUT"
},
"I29": {
"direction": "IN"
},
"O5": {
"direction": "OUT"
},
"O28": {
"direction": "OUT"
},
"I12": {
"direction": "IN"
},
"I17": {
"direction": "IN"
},
"O1": {
"direction": "OUT"
},
"O23": {
"direction": "OUT"
},
"O6": {
"direction": "OUT"
},
"O29": {
"direction": "OUT"
},
"I9": {
"direction": "IN"
},
"I24": {
"direction": "IN"
},
"O19": {
"direction": "OUT"
},
"I27": {
"I1": {
"direction": "IN"
},
"O31": {
"direction": "OUT"
},
"I25": {
"I6": {
"direction": "IN"
},
"O7": {
"direction": "OUT"
},
"I17": {
"direction": "IN"
},
"O25": {
"direction": "OUT"
},
"CLK": {
"direction": "IN"
},
"I5": {
"direction": "IN"
},
"I21": {
"direction": "IN"
},
"I26": {
"direction": "IN"
},
"I4": {
"direction": "IN"
},
"O4": {
"direction": "OUT"
},
"I30": {
"direction": "IN"
},
"I9": {
"direction": "IN"
},
"O1": {
"direction": "OUT"
},
"I16": {
"direction": "IN"
},
"I18": {
"direction": "IN"
},
"I7": {
"direction": "IN"
},
"O27": {
"direction": "OUT"
},
"O17": {
"direction": "OUT"
},
"I6": {
"I8": {
"direction": "IN"
},
"I3": {
"direction": "IN"
},
"O0": {
"direction": "OUT"
},
"I23": {
"direction": "IN"
},
"O20": {
"direction": "OUT"
},
"I19": {
"direction": "IN"
},
"O11": {
"direction": "OUT"
},
"O18": {
"direction": "OUT"
},
"O25": {
"direction": "OUT"
},
"O14": {
"direction": "OUT"
"I23": {
"direction": "IN"
},
"I28": {
"direction": "IN"
},
"I8": {
"direction": "IN"
},
"O15": {
"direction": "OUT"
},
"I2": {
"direction": "IN"
},
"CLK": {
"direction": "IN"
},
"CSIB": {
"direction": "IN"
},
"O30": {
"direction": "OUT"
},
"O9": {
"direction": "OUT"
},
"O4": {
"direction": "OUT"
},
"I0": {
"direction": "IN"
},
"I18": {
"direction": "IN"
},
"I10": {
"direction": "IN"
},
"I20": {
"direction": "IN"
},
"RDWRB": {
"direction": "IN"
},
"O22": {
"O2": {
"direction": "OUT"
},
"O18": {
"direction": "OUT"
},
"I2": {
"direction": "IN"
},
"O0": {
"direction": "OUT"
},
"I13": {
"direction": "IN"
},
"I31": {
"direction": "IN"
},
"O8": {
"direction": "OUT"
},
"I1": {
"I10": {
"direction": "IN"
},
"I0": {
"direction": "IN"
},
"O19": {
"direction": "OUT"
},
"O13": {
"direction": "OUT"
},
"O24": {
"direction": "OUT"
},
"O23": {
"direction": "OUT"
},
"I15": {
"direction": "IN"
},
"O20": {
"direction": "OUT"
},
"I27": {
"direction": "IN"
},
"O9": {
"direction": "OUT"
},
"I29": {
"direction": "IN"
},
"O12": {
"direction": "OUT"
},
"O14": {
"direction": "OUT"
},
"I24": {
"direction": "IN"
},
"O6": {
"direction": "OUT"
},
"O22": {
"direction": "OUT"
},
"O5": {
"direction": "OUT"
},
"I22": {
"direction": "IN"
},
"O28": {
"direction": "OUT"
},
"O21": {
"direction": "OUT"
},
"O29": {
"direction": "OUT"
},
"I20": {
"direction": "IN"
},
"I12": {
"direction": "IN"
},
"O15": {
"direction": "OUT"
},
"O26": {
"direction": "OUT"
},
"I14": {
"direction": "IN"
},
"O16": {
"direction": "OUT"
},
"O30": {
"direction": "OUT"
},
"O3": {
"direction": "OUT"
},
"CSIB": {
"direction": "IN"
},
"I25": {
"direction": "IN"
},
"I11": {
"direction": "IN"
},
"I3": {
"direction": "IN"
}
}
},
"type": "ICAP",
"site_pips": {}
}

30
artix7/site_type_IDELAYCTRL.json
View File

@ -1,27 +1,27 @@
{
"type": "IDELAYCTRL",
"site_pips": {},
"site_pins": {
"RST": {
"direction": "IN"
},
"OUTN1": {
"direction": "OUT"
},
"RDY": {
"direction": "OUT"
},
"UPPULSEOUT": {
"direction": "OUT"
},
"DNPULSEOUT": {
"direction": "OUT"
},
"OUTN65": {
"direction": "OUT"
},
"OUTN1": {
"direction": "OUT"
},
"DNPULSEOUT": {
"direction": "OUT"
},
"RDY": {
"direction": "OUT"
},
"REFCLK": {
"direction": "IN"
},
"RST": {
"direction": "IN"
}
}
},
"type": "IDELAYCTRL",
"site_pips": {}
}

158
artix7/site_type_IDELAYE2.json
View File

@ -1,100 +1,100 @@
{
"site_pins": {
"CE": {
"direction": "IN"
},
"CNTVALUEIN3": {
"direction": "IN"
},
"CINVCTRL": {
"direction": "IN"
},
"LD": {
"direction": "IN"
},
"DATAOUT": {
"direction": "OUT"
},
"IFDLY0": {
"direction": "IN"
},
"REGRST": {
"direction": "IN"
},
"IFDLY1": {
"direction": "IN"
},
"CNTVALUEOUT0": {
"direction": "OUT"
},
"IDATAIN": {
"direction": "IN"
},
"CNTVALUEIN0": {
"direction": "IN"
},
"INC": {
"direction": "IN"
},
"CNTVALUEOUT1": {
"direction": "OUT"
},
"CNTVALUEOUT3": {
"direction": "OUT"
},
"C": {
"direction": "IN"
},
"IFDLY2": {
"direction": "IN"
},
"DATAIN": {
"direction": "IN"
},
"LDPIPEEN": {
"direction": "IN"
},
"CNTVALUEIN1": {
"direction": "IN"
},
"CNTVALUEIN4": {
"direction": "IN"
},
"CNTVALUEIN2": {
"direction": "IN"
},
"CNTVALUEOUT2": {
"direction": "OUT"
},
"CNTVALUEOUT4": {
"direction": "OUT"
}
},
"type": "IDELAYE2",
"site_pips": {
"DATAININV:DATAIN": {
"from_pin": "DATAIN",
"to_pin": "OUT"
},
"CINV:C": {
"from_pin": "C",
"DATAININV:DATAIN_B": {
"from_pin": "DATAIN_B",
"to_pin": "OUT"
},
"IDATAININV:IDATAIN_B": {
"from_pin": "IDATAIN_B",
"to_pin": "OUT"
},
"DATAININV:DATAIN": {
"from_pin": "DATAIN",
"to_pin": "OUT"
},
"IDATAININV:IDATAIN": {
"from_pin": "IDATAIN",
"to_pin": "OUT"
},
"DATAININV:DATAIN_B": {
"from_pin": "DATAIN_B",
"CINV:C": {
"from_pin": "C",
"to_pin": "OUT"
},
"CINV:C_B": {
"from_pin": "C_B",
"to_pin": "OUT"
}
},
"site_pins": {
"C": {
"direction": "IN"
},
"IFDLY0": {
"direction": "IN"
},
"DATAOUT": {
"direction": "OUT"
},
"CNTVALUEOUT4": {
"direction": "OUT"
},
"LDPIPEEN": {
"direction": "IN"
},
"CNTVALUEOUT1": {
"direction": "OUT"
},
"CNTVALUEOUT0": {
"direction": "OUT"
},
"CINVCTRL": {
"direction": "IN"
},
"REGRST": {
"direction": "IN"
},
"CNTVALUEIN1": {
"direction": "IN"
},
"DATAIN": {
"direction": "IN"
},
"IDATAIN": {
"direction": "IN"
},
"INC": {
"direction": "IN"
},
"LD": {
"direction": "IN"
},
"CNTVALUEIN3": {
"direction": "IN"
},
"CNTVALUEIN0": {
"direction": "IN"
},
"CNTVALUEIN4": {
"direction": "IN"
},
"CNTVALUEOUT2": {
"direction": "OUT"
},
"CNTVALUEIN2": {
"direction": "IN"
},
"CNTVALUEOUT3": {
"direction": "OUT"
},
"CE": {
"direction": "IN"
},
"IFDLY1": {
"direction": "IN"
},
"IFDLY2": {
"direction": "IN"
}
}
}

336
artix7/site_type_ILOGICE3.json
View File

@ -1,11 +1,150 @@
{
"site_pins": {
"REV": {
"direction": "IN"
},
"CLKDIVP": {
"direction": "IN"
},
"SHIFTIN2": {
"direction": "IN"
},
"OCLKB": {
"direction": "IN"
},
"CE2": {
"direction": "IN"
},
"OCLK": {
"direction": "IN"
},
"D": {
"direction": "IN"
},
"DDLY": {
"direction": "IN"
},
"DYNCLKSEL": {
"direction": "IN"
},
"CLK": {
"direction": "IN"
},
"DYNCLKDIVSEL": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"Q1": {
"direction": "OUT"
},
"Q5": {
"direction": "OUT"
},
"SR": {
"direction": "IN"
},
"Q8": {
"direction": "OUT"
},
"CLKDIV": {
"direction": "IN"
},
"TFB": {
"direction": "IN"
},
"CE1": {
"direction": "IN"
},
"SHIFTOUT2": {
"direction": "OUT"
},
"Q3": {
"direction": "OUT"
},
"Q4": {
"direction": "OUT"
},
"SHIFTOUT1": {
"direction": "OUT"
},
"Q2": {
"direction": "OUT"
},
"CLKB": {
"direction": "IN"
},
"Q6": {
"direction": "OUT"
},
"DYNCLKDIVPSEL": {
"direction": "IN"
},
"Q7": {
"direction": "OUT"
},
"SHIFTIN1": {
"direction": "IN"
},
"OFB": {
"direction": "IN"
},
"BITSLIP": {
"direction": "IN"
}
},
"type": "ILOGICE3",
"site_pips": {
"IDELMUXE3:1": {
"IDELMUXE3:2": {
"from_pin": "2",
"to_pin": "OUT"
},
"IFFDELMUXE3:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"D2OBYP_SEL:GND": {
"ZHOLD_IFF_INV:D_B": {
"from_pin": "D_B",
"to_pin": "OUT"
},
"D2OFFBYP_SEL:T": {
"from_pin": "T",
"to_pin": "OUT"
},
"IFFDELMUXE3:2": {
"from_pin": "2",
"to_pin": "OUT"
},
"ZHOLD_FABRIC_INV:D_B": {
"from_pin": "D_B",
"to_pin": "OUT"
},
"IFFDELMUXE3:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"IFFMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"ZHOLD_IFF_INV:D": {
"from_pin": "D",
"to_pin": "OUT"
},
"CLKBINV:CLKB": {
"from_pin": "CLKB",
"to_pin": "OUT"
},
"ZHOLD_FABRIC_INV:D": {
"from_pin": "D",
"to_pin": "OUT"
},
"D2OFFBYP_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
@ -13,196 +152,57 @@
"from_pin": "T",
"to_pin": "OUT"
},
"ZHOLD_FABRIC_INV:D_B": {
"from_pin": "D_B",
"to_pin": "OUT"
},
"ZHOLD_IFF_INV:D": {
"from_pin": "D",
"to_pin": "OUT"
},
"CLKBINV:CLKB_B": {
"from_pin": "CLKB_B",
"to_pin": "OUT"
},
"IMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"D2OFFBYP_SEL:T": {
"from_pin": "T",
"to_pin": "OUT"
},
"CLKINV:CLK_B": {
"from_pin": "CLK_B",
"to_pin": "OUT"
},
"IDELMUXE3:2": {
"from_pin": "2",
"to_pin": "OUT"
},
"REVUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IFFMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IFFDELMUXE3:2": {
"from_pin": "2",
"to_pin": "OUT"
},
"ZHOLD_IFF_INV:D_B": {
"from_pin": "D_B",
"to_pin": "OUT"
},
"ZHOLD_FABRIC_INV:D": {
"from_pin": "D",
"to_pin": "OUT"
},
"DINV:D": {
"from_pin": "D",
"to_pin": "OUT"
},
"IFFDELMUXE3:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IDELMUXE3:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"CE1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"DINV:D_B": {
"from_pin": "D_B",
"to_pin": "OUT"
},
"CLKINV:CLK": {
"from_pin": "CLK",
"to_pin": "OUT"
},
"SRUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IFFMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"CLKBINV:CLKB": {
"from_pin": "CLKB",
"to_pin": "OUT"
},
"D2OFFBYP_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"IMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IFFDELMUXE3:1": {
"CLKBINV:CLKB_B": {
"from_pin": "CLKB_B",
"to_pin": "OUT"
},
"DINV:D": {
"from_pin": "D",
"to_pin": "OUT"
},
"IDELMUXE3:1": {
"from_pin": "1",
"to_pin": "OUT"
}
},
"site_pins": {
"SR": {
"direction": "IN"
},
"Q8": {
"direction": "OUT"
"SRUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"DYNCLKSEL": {
"direction": "IN"
"D2OBYP_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"DYNCLKDIVSEL": {
"direction": "IN"
"CLKINV:CLK_B": {
"from_pin": "CLK_B",
"to_pin": "OUT"
},
"CE2": {
"direction": "IN"
"CLKINV:CLK": {
"from_pin": "CLK",
"to_pin": "OUT"
},
"DYNCLKDIVPSEL": {
"direction": "IN"
"CE1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"Q2": {
"direction": "OUT"
},
"SHIFTIN1": {
"direction": "IN"
},
"TFB": {
"direction": "IN"
},
"SHIFTOUT1": {
"direction": "OUT"
},
"OCLK": {
"direction": "IN"
},
"CE1": {
"direction": "IN"
},
"Q7": {
"direction": "OUT"
},
"Q1": {
"direction": "OUT"
},
"Q4": {
"direction": "OUT"
},
"OFB": {
"direction": "IN"
},
"CLKDIV": {
"direction": "IN"
},
"DDLY": {
"direction": "IN"
},
"Q3": {
"direction": "OUT"
},
"SHIFTOUT2": {
"direction": "OUT"
},
"CLKDIVP": {
"direction": "IN"
},
"CLK": {
"direction": "IN"
},
"SHIFTIN2": {
"direction": "IN"
},
"CLKB": {
"direction": "IN"
},
"OCLKB": {
"direction": "IN"
},
"REV": {
"direction": "IN"
},
"Q5": {
"direction": "OUT"
},
"BITSLIP": {
"direction": "IN"
},
"Q6": {
"direction": "OUT"
},
"O": {
"direction": "OUT"
},
"D": {
"direction": "IN"
"IDELMUXE3:0": {
"from_pin": "0",
"to_pin": "OUT"
}
}
}

792
artix7/site_type_IN_FIFO.json
View File

@ -1,453 +1,453 @@
{
"type": "IN_FIFO",
"site_pips": {},
"site_pins": {
"Q03": {
"direction": "OUT"
},
"Q25": {
"direction": "OUT"
},
"D40": {
"direction": "IN"
},
"TESTWRITEDISB": {
"direction": "IN"
},
"D83": {
"direction": "IN"
},
"Q20": {
"direction": "OUT"
},
"Q02": {
"direction": "OUT"
},
"WRCLK": {
"direction": "IN"
},
"D72": {
"direction": "IN"
},
"Q81": {
"direction": "OUT"
},
"FULL": {
"direction": "OUT"
},
"Q15": {
"direction": "OUT"
},
"D21": {
"direction": "IN"
},
"Q54": {
"direction": "OUT"
},
"Q22": {
"direction": "OUT"
},
"Q41": {
"direction": "OUT"
},
"Q16": {
"direction": "OUT"
},
"Q40": {
"direction": "OUT"
},
"Q97": {
"direction": "OUT"
},
"Q77": {
"direction": "OUT"
},
"RESET": {
"direction": "IN"
},
"Q56": {
"direction": "OUT"
},
"Q83": {
"direction": "OUT"
},
"Q14": {
"direction": "OUT"
},
"Q32": {
"direction": "OUT"
},
"D03": {
"direction": "IN"
},
"Q26": {
"direction": "OUT"
},
"Q80": {
"direction": "OUT"
},
"D22": {
"direction": "IN"
},
"Q93": {
"direction": "OUT"
},
"Q43": {
"direction": "OUT"
},
"Q71": {
"direction": "OUT"
},
"Q92": {
"direction": "OUT"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
"D62": {
"direction": "IN"
},
"D54": {
"direction": "IN"
},
"Q27": {
"direction": "OUT"
},
"D90": {
"direction": "IN"
},
"Q13": {
"direction": "OUT"
},
"D65": {
"direction": "IN"
},
"Q04": {
"direction": "OUT"
},
"SCANOUT1": {
"direction": "OUT"
},
"Q95": {
"direction": "OUT"
},
"Q66": {
"direction": "OUT"
},
"D11": {
"direction": "IN"
},
"Q17": {
"direction": "OUT"
},
"D63": {
"direction": "IN"
},
"D82": {
"direction": "IN"
},
"D43": {
"direction": "IN"
},
"D80": {
"direction": "IN"
},
"Q84": {
"direction": "OUT"
},
"Q63": {
"direction": "OUT"
},
"D41": {
"direction": "IN"
},
"D55": {
"direction": "IN"
},
"Q74": {
"Q57": {
"direction": "OUT"
},
"Q90": {
"direction": "OUT"
},
"D92": {
"direction": "IN"
},
"D73": {
"direction": "IN"
},
"Q46": {
"direction": "OUT"
},
"D67": {
"direction": "IN"
},
"Q96": {
"direction": "OUT"
},
"D02": {
"direction": "IN"
},
"Q94": {
"direction": "OUT"
},
"Q73": {
"direction": "OUT"
},
"Q06": {
"direction": "OUT"
},
"Q65": {
"direction": "OUT"
},
"Q53": {
"direction": "OUT"
},
"Q11": {
"direction": "OUT"
},
"Q24": {
"direction": "OUT"
},
"D32": {
"direction": "IN"
},
"D53": {
"direction": "IN"
},
"SCANOUT2": {
"direction": "OUT"
},
"D30": {
"direction": "IN"
},
"D51": {
"direction": "IN"
},
"Q55": {
"direction": "OUT"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"Q62": {
"direction": "OUT"
},
"Q01": {
"direction": "OUT"
},
"Q34": {
"direction": "OUT"
},
"SCANIN2": {
"direction": "IN"
},
"Q57": {
"Q26": {
"direction": "OUT"
},
"Q75": {
"direction": "OUT"
},
"SCANOUT3": {
"Q15": {
"direction": "OUT"
},
"D64": {
"direction": "IN"
},
"Q67": {
"Q61": {
"direction": "OUT"
},
"Q21": {
"ALMOSTEMPTY": {
"direction": "OUT"
},
"D60": {
"direction": "IN"
},
"Q23": {
"direction": "OUT"
},
"Q85": {
"direction": "OUT"
},
"D33": {
"direction": "IN"
},
"Q91": {
"direction": "OUT"
},
"Q47": {
"direction": "OUT"
},
"Q86": {
"direction": "OUT"
},
"D66": {
"direction": "IN"
},
"TESTMODEB": {
"direction": "IN"
},
"D71": {
"direction": "IN"
},
"RDEN": {
"direction": "IN"
},
"Q44": {
"direction": "OUT"
},
"Q51": {
"direction": "OUT"
},
"D61": {
"direction": "IN"
},
"Q12": {
"direction": "OUT"
},
"D91": {
"direction": "IN"
},
"D20": {
"direction": "IN"
},
"SCANENB": {
"direction": "IN"
},
"D81": {
"direction": "IN"
},
"Q33": {
"direction": "OUT"
},
"Q60": {
"direction": "OUT"
},
"D00": {
"direction": "IN"
},
"D10": {
"direction": "IN"
},
"Q36": {
"direction": "OUT"
},
"Q64": {
"direction": "OUT"
},
"Q37": {
"direction": "OUT"
},
"Q52": {
"direction": "OUT"
},
"D70": {
"direction": "IN"
},
"Q72": {
"direction": "OUT"
},
"EMPTY": {
"direction": "OUT"
},
"D23": {
"direction": "IN"
},
"Q00": {
"direction": "OUT"
},
"D12": {
"direction": "IN"
},
"Q30": {
"direction": "OUT"
},
"D50": {
"direction": "IN"
},
"SCANOUT0": {
"direction": "OUT"
},
"D42": {
"direction": "IN"
},
"Q70": {
"direction": "OUT"
},
"Q10": {
"direction": "OUT"
},
"Q76": {
"direction": "OUT"
},
"RDCLK": {
"direction": "IN"
},
"D52": {
"direction": "IN"
},
"Q82": {
"Q34": {
"direction": "OUT"
},
"Q50": {
"direction": "OUT"
},
"Q05": {
"Q07": {
"direction": "OUT"
},
"Q42": {
"D22": {
"direction": "IN"
},
"Q95": {
"direction": "OUT"
},
"Q65": {
"direction": "OUT"
},
"Q93": {
"direction": "OUT"
},
"Q40": {
"direction": "OUT"
},
"EMPTY": {
"direction": "OUT"
},
"D13": {
"direction": "IN"
},
"Q31": {
"direction": "OUT"
},
"D31": {
"D54": {
"direction": "IN"
},
"D57": {
"D64": {
"direction": "IN"
},
"SCANIN0": {
"direction": "IN"
},
"SCANIN1": {
"direction": "IN"
},
"SCANIN3": {
"direction": "IN"
},
"TESTREADDISB": {
"direction": "IN"
},
"Q45": {
"Q66": {
"direction": "OUT"
},
"D01": {
"direction": "IN"
},
"Q07": {
"Q27": {
"direction": "OUT"
},
"Q35": {
"D65": {
"direction": "IN"
},
"D52": {
"direction": "IN"
},
"D41": {
"direction": "IN"
},
"Q43": {
"direction": "OUT"
},
"Q32": {
"direction": "OUT"
},
"Q20": {
"direction": "OUT"
},
"D93": {
"direction": "IN"
},
"WREN": {
"D51": {
"direction": "IN"
},
"Q61": {
"Q80": {
"direction": "OUT"
},
"Q56": {
"direction": "OUT"
},
"D92": {
"direction": "IN"
},
"Q11": {
"direction": "OUT"
},
"Q53": {
"direction": "OUT"
},
"D82": {
"direction": "IN"
},
"D00": {
"direction": "IN"
},
"SCANOUT0": {
"direction": "OUT"
},
"Q73": {
"direction": "OUT"
},
"TESTMODEB": {
"direction": "IN"
},
"RESET": {
"direction": "IN"
},
"Q25": {
"direction": "OUT"
},
"D81": {
"direction": "IN"
},
"FULL": {
"direction": "OUT"
},
"Q60": {
"direction": "OUT"
},
"D42": {
"direction": "IN"
},
"D20": {
"direction": "IN"
},
"Q47": {
"direction": "OUT"
},
"D80": {
"direction": "IN"
},
"D66": {
"direction": "IN"
},
"Q62": {
"direction": "OUT"
},
"Q14": {
"direction": "OUT"
},
"Q63": {
"direction": "OUT"
},
"D30": {
"direction": "IN"
},
"Q84": {
"direction": "OUT"
},
"Q76": {
"direction": "OUT"
},
"Q74": {
"direction": "OUT"
},
"Q16": {
"direction": "OUT"
},
"D55": {
"direction": "IN"
},
"Q77": {
"direction": "OUT"
},
"D62": {
"direction": "IN"
},
"Q55": {
"direction": "OUT"
},
"Q05": {
"direction": "OUT"
},
"RDCLK": {
"direction": "IN"
},
"Q46": {
"direction": "OUT"
},
"Q23": {
"direction": "OUT"
},
"Q82": {
"direction": "OUT"
},
"Q12": {
"direction": "OUT"
},
"Q30": {
"direction": "OUT"
},
"D32": {
"direction": "IN"
},
"D56": {
"direction": "IN"
},
"Q87": {
"direction": "OUT"
},
"D03": {
"direction": "IN"
},
"Q33": {
"direction": "OUT"
},
"Q42": {
"direction": "OUT"
},
"D60": {
"direction": "IN"
},
"D31": {
"direction": "IN"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"Q17": {
"direction": "OUT"
},
"Q44": {
"direction": "OUT"
},
"Q01": {
"direction": "OUT"
},
"SCANIN1": {
"direction": "IN"
},
"D71": {
"direction": "IN"
},
"Q36": {
"direction": "OUT"
},
"Q85": {
"direction": "OUT"
},
"Q97": {
"direction": "OUT"
},
"Q94": {
"direction": "OUT"
},
"D67": {
"direction": "IN"
},
"Q35": {
"direction": "OUT"
},
"D02": {
"direction": "IN"
},
"Q06": {
"direction": "OUT"
},
"Q24": {
"direction": "OUT"
},
"Q54": {
"direction": "OUT"
},
"D72": {
"direction": "IN"
},
"Q51": {
"direction": "OUT"
},
"Q03": {
"direction": "OUT"
},
"Q45": {
"direction": "OUT"
},
"Q92": {
"direction": "OUT"
},
"SCANOUT1": {
"direction": "OUT"
},
"Q67": {
"direction": "OUT"
},
"D50": {
"direction": "IN"
},
"Q86": {
"direction": "OUT"
},
"Q96": {
"direction": "OUT"
},
"D83": {
"direction": "IN"
},
"Q41": {
"direction": "OUT"
},
"SCANOUT3": {
"direction": "OUT"
},
"D23": {
"direction": "IN"
},
"D73": {
"direction": "IN"
},
"Q81": {
"direction": "OUT"
},
"Q21": {
"direction": "OUT"
},
"Q83": {
"direction": "OUT"
},
"D61": {
"direction": "IN"
},
"D21": {
"direction": "IN"
},
"Q00": {
"direction": "OUT"
},
"SCANOUT2": {
"direction": "OUT"
},
"D91": {
"direction": "IN"
},
"D10": {
"direction": "IN"
},
"D43": {
"direction": "IN"
},
"Q70": {
"direction": "OUT"
},
"D57": {
"direction": "IN"
},
"Q10": {
"direction": "OUT"
},
"TESTREADDISB": {
"direction": "IN"
},
"TESTWRITEDISB": {
"direction": "IN"
},
"Q52": {
"direction": "OUT"
},
"RDEN": {
"direction": "IN"
},
"WREN": {
"direction": "IN"
},
"Q02": {
"direction": "OUT"
},
"Q37": {
"direction": "OUT"
},
"Q71": {
"direction": "OUT"
},
"Q22": {
"direction": "OUT"
},
"D90": {
"direction": "IN"
},
"D40": {
"direction": "IN"
},
"Q31": {
"direction": "OUT"
},
"SCANIN0": {
"direction": "IN"
},
"D70": {
"direction": "IN"
},
"Q13": {
"direction": "OUT"
},
"SCANIN3": {
"direction": "IN"
},
"D12": {
"direction": "IN"
},
"Q64": {
"direction": "OUT"
},
"WRCLK": {
"direction": "IN"
},
"D53": {
"direction": "IN"
},
"D11": {
"direction": "IN"
},
"D33": {
"direction": "IN"
},
"SCANENB": {
"direction": "IN"
},
"Q04": {
"direction": "OUT"
},
"Q72": {
"direction": "OUT"
},
"SCANIN2": {
"direction": "IN"
},
"D63": {
"direction": "IN"
},
"Q91": {
"direction": "OUT"
}
}
},
"type": "IN_FIFO",
"site_pips": {}
}

126
artix7/site_type_IOB33.json
View File

@ -1,18 +1,67 @@
{
"site_pins": {
"KEEPER_INT_EN": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
},
"DIFFO_IN": {
"direction": "IN"
},
"PADOUT": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"INTERMDISABLE": {
"direction": "IN"
},
"O_IN": {
"direction": "IN"
},
"T": {
"direction": "IN"
},
"PU_INT_EN": {
"direction": "IN"
},
"DIFFO_OUT": {
"direction": "OUT"
},
"PD_INT_EN": {
"direction": "IN"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"I": {
"direction": "OUT"
},
"O_OUT": {
"direction": "OUT"
},
"DIFFI_IN": {
"direction": "IN"
}
},
"type": "IOB33",
"site_pips": {
"PADOUTUSED:0": {
"from_pin": "0",
"INTERMDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"OUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"DIFFI_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
@ -21,74 +70,25 @@
"from_pin": "GND",
"to_pin": "OUT"
},
"INTERMDISABLE_SEL:I": {
"IBUFDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"INTERMDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"TUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"PADOUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
}
},
"site_pins": {
"O_IN": {
"direction": "IN"
},
"I": {
"direction": "OUT"
},
"DIFFO_OUT": {
"direction": "OUT"
},
"PD_INT_EN": {
"direction": "IN"
},
"PADOUT": {
"direction": "OUT"
},
"DIFFO_IN": {
"direction": "IN"
},
"PU_INT_EN": {
"direction": "IN"
},
"T": {
"direction": "IN"
},
"O_OUT": {
"direction": "OUT"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"INTERMDISABLE": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"KEEPER_INT_EN": {
"direction": "IN"
},
"DIFFI_IN": {
"direction": "IN"
"INTERMDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
}
}
}

168
artix7/site_type_IOB33M.json
View File

@ -1,106 +1,106 @@
{
"type": "IOB33M",
"site_pips": {
"PADOUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"T_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"DIFFI_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"O_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"DIFFO_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"INTERMDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"IUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"INTERMDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
}
},
"site_pins": {
"KEEPER_INT_EN": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
},
"DIFFO_IN": {
"direction": "IN"
},
"PADOUT": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"INTERMDISABLE": {
"direction": "IN"
},
"O_IN": {
"direction": "IN"
},
"T": {
"direction": "IN"
},
"PU_INT_EN": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"PD_INT_EN": {
"direction": "IN"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"DIFFO_OUT": {
"direction": "OUT"
},
"I": {
"direction": "OUT"
},
"PADOUT": {
"direction": "OUT"
},
"DIFFO_IN": {
"direction": "IN"
},
"PU_INT_EN": {
"direction": "IN"
},
"T": {
"direction": "IN"
},
"O_OUT": {
"direction": "OUT"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"INTERMDISABLE": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"KEEPER_INT_EN": {
"direction": "IN"
},
"DIFFI_IN": {
"direction": "IN"
}
},
"type": "IOB33M",
"site_pips": {
"INTERMDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"DIFFI_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"DIFFO_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"O_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"PADOUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"INTERMDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
}
}
}

148
artix7/site_type_IOB33S.json
View File

@ -1,16 +1,77 @@
{
"site_pins": {
"KEEPER_INT_EN": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
},
"DIFFO_IN": {
"direction": "IN"
},
"PADOUT": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"INTERMDISABLE": {
"direction": "IN"
},
"O_IN": {
"direction": "IN"
},
"T": {
"direction": "IN"
},
"PU_INT_EN": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"PD_INT_EN": {
"direction": "IN"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"DIFFO_OUT": {
"direction": "OUT"
},
"I": {
"direction": "OUT"
},
"O_OUT": {
"direction": "OUT"
},
"DIFFI_IN": {
"direction": "IN"
}
},
"type": "IOB33S",
"site_pips": {
"TINMUX:0": {
"DIFFI_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUTMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"OINMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"PADOUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUTMUX:1": {
"from_pin": "1",
"DIFFO_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TINMUX:1": {
@ -25,27 +86,11 @@
"from_pin": "0",
"to_pin": "OUT"
},
"DIFFO_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUTMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:I": {
"INTERMDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"DIFFI_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OINMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"INTERMDISABLE_SEL:I": {
"IBUFDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
@ -53,62 +98,17 @@
"from_pin": "GND",
"to_pin": "OUT"
},
"TINMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUTMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
}
},
"site_pins": {
"O_IN": {
"direction": "IN"
},
"PD_INT_EN": {
"direction": "IN"
},
"DIFFO_OUT": {
"direction": "OUT"
},
"I": {
"direction": "OUT"
},
"PADOUT": {
"direction": "OUT"
},
"DIFFO_IN": {
"direction": "IN"
},
"PU_INT_EN": {
"direction": "IN"
},
"T": {
"direction": "IN"
},
"O_OUT": {
"direction": "OUT"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"INTERMDISABLE": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"KEEPER_INT_EN": {
"direction": "IN"
},
"DIFFI_IN": {
"direction": "IN"
}
}
}

6
artix7/site_type_IPAD.json
View File

@ -1,9 +1,9 @@
{
"type": "IPAD",
"site_pips": {},
"site_pins": {
"O": {
"direction": "OUT"
}
}
},
"type": "IPAD",
"site_pips": {}
}

1042
artix7/site_type_MMCME2_ADV.json
View File

File diff suppressed because it is too large Load Diff

322
artix7/site_type_OLOGICE3.json
View File

@ -1,131 +1,93 @@
{
"type": "OLOGICE3",
"site_pips": {
"O1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T1INV:T1_B": {
"from_pin": "T1_B",
"to_pin": "OUT"
},
"OFBUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OQUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TREVUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OMUX:OUTFF": {
"from_pin": "OUTFF",
"to_pin": "OUT"
},
"TMUX:T1": {
"from_pin": "T1",
"to_pin": "OUT"
},
"T1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TQUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OSRUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"CLKINV:CLK_B": {
"from_pin": "CLK_B",
"to_pin": "OUT"
},
"D1INV:D1_B": {
"from_pin": "D1_B",
"to_pin": "OUT"
},
"D1INV:D1": {
"from_pin": "D1",
"to_pin": "OUT"
},
"TSRUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T2INV:T2_B": {
"from_pin": "T2_B",
"to_pin": "OUT"
},
"OCEUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TFBUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OMUX:D1": {
"from_pin": "D1",
"to_pin": "OUT"
},
"D2INV:D2": {
"from_pin": "D2",
"to_pin": "OUT"
},
"T2INV:T2": {
"from_pin": "T2",
"to_pin": "OUT"
},
"CLKINV:CLK": {
"from_pin": "CLK",
"to_pin": "OUT"
},
"T1INV:T1": {
"from_pin": "T1",
"to_pin": "OUT"
},
"TMUX:TFF": {
"from_pin": "TFF",
"to_pin": "OUT"
},
"D2INV:D2_B": {
"from_pin": "D2_B",
"to_pin": "OUT"
},
"TCEUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OREVUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
}
},
"site_pins": {
"SR": {
"TCE": {
"direction": "IN"
},
"CLK": {
"T3": {
"direction": "IN"
},
"D8": {
"REV": {
"direction": "IN"
},
"CLKDIVF": {
"direction": "IN"
},
"T1": {
"direction": "IN"
},
"T4": {
"direction": "IN"
},
"SHIFTIN2": {
"direction": "IN"
},
"CLK": {
"direction": "IN"
},
"TBYTEIN": {
"direction": "IN"
},
"D5": {
"direction": "IN"
},
"D8": {
"direction": "IN"
},
"SR": {
"direction": "IN"
},
"CLKDIVB": {
"direction": "IN"
},
"TQ": {
"direction": "OUT"
},
"TFB": {
"direction": "OUT"
},
"T2": {
"direction": "IN"
},
"D7": {
"direction": "IN"
},
"D3": {
"direction": "IN"
},
"OFB": {
"direction": "OUT"
},
"D2": {
"direction": "IN"
},
"SHIFTOUT2": {
"direction": "OUT"
},
"IOCLKGLITCH": {
"direction": "OUT"
},
"TFB": {
"CLKDIVFB": {
"direction": "IN"
},
"TBYTEOUT": {
"direction": "OUT"
},
"D1": {
"direction": "IN"
},
"D4": {
"direction": "IN"
},
"D6": {
"direction": "IN"
},
"OCE": {
"direction": "IN"
},
"CLKB": {
"direction": "IN"
},
"OQ": {
"direction": "OUT"
},
"SHIFTOUT1": {
@ -134,77 +96,115 @@
"SHIFTIN1": {
"direction": "IN"
},
"SHIFTOUT2": {
"direction": "OUT"
},
"CLKDIVB": {
"direction": "IN"
},
"OFB": {
"direction": "OUT"
},
"OCE": {
"direction": "IN"
},
"CLKDIV": {
"direction": "IN"
}
},
"type": "OLOGICE3",
"site_pips": {
"T2INV:T2_B": {
"from_pin": "T2_B",
"to_pin": "OUT"
},
"TQ": {
"direction": "OUT"
"OMUX:D1": {
"from_pin": "D1",
"to_pin": "OUT"
},
"D4": {
"direction": "IN"
"OSRUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T2": {
"direction": "IN"
"T1INV:T1": {
"from_pin": "T1",
"to_pin": "OUT"
},
"TBYTEIN": {
"direction": "IN"
"T1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"D3": {
"direction": "IN"
"TMUX:TFF": {
"from_pin": "TFF",
"to_pin": "OUT"
},
"D2": {
"direction": "IN"
"OMUX:OUTFF": {
"from_pin": "OUTFF",
"to_pin": "OUT"
},
"TCE": {
"direction": "IN"
"D2INV:D2": {
"from_pin": "D2",
"to_pin": "OUT"
},
"SHIFTIN2": {
"direction": "IN"
"D2INV:D2_B": {
"from_pin": "D2_B",
"to_pin": "OUT"
},
"CLKB": {
"direction": "IN"
"OREVUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"REV": {
"direction": "IN"
"T1INV:T1_B": {
"from_pin": "T1_B",
"to_pin": "OUT"
},
"CLKDIVFB": {
"direction": "IN"
"TMUX:T1": {
"from_pin": "T1",
"to_pin": "OUT"
},
"TBYTEOUT": {
"direction": "OUT"
"TFBUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T1": {
"direction": "IN"
"OCEUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OQ": {
"direction": "OUT"
"TSRUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"D6": {
"direction": "IN"
"OQUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"D7": {
"direction": "IN"
"D1INV:D1_B": {
"from_pin": "D1_B",
"to_pin": "OUT"
},
"CLKDIVF": {
"direction": "IN"
"O1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T3": {
"direction": "IN"
"TCEUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"D1": {
"direction": "IN"
"OFBUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T2INV:T2": {
"from_pin": "T2",
"to_pin": "OUT"
},
"TQUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"CLKINV:CLK": {
"from_pin": "CLK",
"to_pin": "OUT"
},
"CLKINV:CLK_B": {
"from_pin": "CLK_B",
"to_pin": "OUT"
},
"TREVUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"D1INV:D1": {
"from_pin": "D1",
"to_pin": "OUT"
}
}
}

6
artix7/site_type_OPAD.json
View File

@ -1,9 +1,9 @@
{
"type": "OPAD",
"site_pips": {},
"site_pins": {
"I": {
"direction": "IN"
}
}
},
"type": "OPAD",
"site_pips": {}
}

786
artix7/site_type_OUT_FIFO.json
View File

@ -1,453 +1,453 @@
{
"type": "OUT_FIFO",
"site_pips": {},
"site_pins": {
"Q03": {
"Q57": {
"direction": "OUT"
},
"D40": {
"direction": "IN"
},
"TESTWRITEDISB": {
"direction": "IN"
},
"D16": {
"direction": "IN"
},
"D84": {
"direction": "IN"
},
"D96": {
"direction": "IN"
},
"Q20": {
"Q62": {
"direction": "OUT"
},
"Q02": {
"Q61": {
"direction": "OUT"
},
"D72": {
"direction": "IN"
},
"D54": {
"direction": "IN"
},
"Q81": {
"Q50": {
"direction": "OUT"
},
"FULL": {
"Q66": {
"direction": "OUT"
},
"D45": {
"D46": {
"direction": "IN"
},
"D21": {
"direction": "IN"
},
"Q54": {
"direction": "OUT"
},
"Q22": {
"direction": "OUT"
},
"Q41": {
"direction": "OUT"
},
"D66": {
"direction": "IN"
},
"D77": {
"direction": "IN"
},
"D74": {
"direction": "IN"
},
"D37": {
"direction": "IN"
},
"SCANOUT0": {
"direction": "OUT"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"D43": {
"direction": "IN"
},
"RESET": {
"direction": "IN"
},
"Q56": {
"direction": "OUT"
},
"Q83": {
"direction": "OUT"
},
"D86": {
"direction": "IN"
},
"Q32": {
"direction": "OUT"
},
"D03": {
"direction": "IN"
},
"Q80": {
"direction": "OUT"
},
"D22": {
"direction": "IN"
},
"Q93": {
"direction": "OUT"
},
"Q13": {
"direction": "OUT"
},
"D35": {
"direction": "IN"
},
"Q71": {
"direction": "OUT"
},
"Q92": {
"direction": "OUT"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
"D27": {
"direction": "IN"
},
"D15": {
"direction": "IN"
},
"D62": {
"direction": "IN"
},
"D81": {
"direction": "IN"
},
"Q51": {
"direction": "OUT"
},
"D90": {
"direction": "IN"
},
"EMPTY": {
"direction": "OUT"
},
"D94": {
"direction": "IN"
},
"D65": {
"direction": "IN"
},
"SCANOUT1": {
"direction": "OUT"
},
"D83": {
"direction": "IN"
},
"D44": {
"direction": "IN"
},
"D11": {
"direction": "IN"
},
"D63": {
"direction": "IN"
},
"D82": {
"direction": "IN"
},
"Q40": {
"direction": "OUT"
},
"D80": {
"direction": "IN"
},
"Q43": {
"direction": "OUT"
},
"D41": {
"direction": "IN"
},
"D55": {
"direction": "IN"
},
"Q90": {
"direction": "OUT"
},
"D13": {
"direction": "IN"
},
"D14": {
"direction": "IN"
},
"D73": {
"direction": "IN"
},
"D67": {
"direction": "IN"
},
"D36": {
"direction": "IN"
},
"D02": {
"direction": "IN"
},
"D20": {
"direction": "IN"
},
"WRCLK": {
"direction": "IN"
},
"Q65": {
"direction": "OUT"
},
"Q53": {
"D20": {
"direction": "IN"
},
"Q93": {
"direction": "OUT"
},
"D97": {
"direction": "IN"
},
"D32": {
"direction": "IN"
},
"D53": {
"direction": "IN"
},
"SCANOUT2": {
"Q40": {
"direction": "OUT"
},
"D30": {
"direction": "IN"
},
"Q11": {
"EMPTY": {
"direction": "OUT"
},
"Q55": {
"direction": "OUT"
},
"D17": {
"D13": {
"direction": "IN"
},
"Q62": {
"direction": "OUT"
},
"Q01": {
"direction": "OUT"
},
"D06": {
"direction": "IN"
},
"D07": {
"direction": "IN"
},
"SCANIN2": {
"direction": "IN"
},
"Q57": {
"direction": "OUT"
},
"SCANOUT3": {
"direction": "OUT"
},
"D25": {
"direction": "IN"
},
"Q67": {
"direction": "OUT"
},
"Q21": {
"direction": "OUT"
},
"D60": {
"direction": "IN"
},
"D51": {
"direction": "IN"
},
"Q91": {
"direction": "OUT"
},
"D76": {
"direction": "IN"
},
"TESTMODEB": {
"direction": "IN"
},
"SCANIN0": {
"direction": "IN"
},
"RDEN": {
"direction": "IN"
},
"D61": {
"direction": "IN"
},
"Q12": {
"direction": "OUT"
},
"D85": {
"direction": "IN"
},
"D05": {
"direction": "IN"
},
"Q63": {
"direction": "OUT"
},
"Q73": {
"direction": "OUT"
},
"SCANENB": {
"direction": "IN"
},
"D47": {
"direction": "IN"
},
"Q33": {
"direction": "OUT"
},
"Q60": {
"direction": "OUT"
},
"D57": {
"direction": "IN"
},
"D10": {
"direction": "IN"
},
"Q64": {
"direction": "OUT"
},
"Q52": {
"direction": "OUT"
},
"D70": {
"direction": "IN"
},
"Q72": {
"direction": "OUT"
},
"D23": {
"direction": "IN"
},
"Q00": {
"direction": "OUT"
},
"D12": {
"direction": "IN"
},
"D26": {
"direction": "IN"
},
"D75": {
"direction": "IN"
},
"Q30": {
"direction": "OUT"
},
"D50": {
"direction": "IN"
},
"D42": {
"direction": "IN"
},
"D46": {
"direction": "IN"
},
"Q70": {
"direction": "OUT"
},
"Q10": {
"direction": "OUT"
},
"D71": {
"direction": "IN"
},
"D04": {
"direction": "IN"
},
"RDCLK": {
"direction": "IN"
},
"D52": {
"direction": "IN"
},
"Q82": {
"direction": "OUT"
},
"D87": {
"direction": "IN"
},
"Q50": {
"direction": "OUT"
},
"D92": {
"direction": "IN"
},
"Q42": {
"direction": "OUT"
},
"SCANIN1": {
"direction": "IN"
},
"D33": {
"direction": "IN"
},
"Q31": {
"direction": "OUT"
},
"D31": {
"direction": "IN"
},
"D34": {
"D54": {
"direction": "IN"
},
"D64": {
"direction": "IN"
},
"D56": {
"direction": "IN"
},
"SCANIN3": {
"direction": "IN"
},
"Q23": {
"direction": "OUT"
},
"D24": {
"D95": {
"direction": "IN"
},
"D01": {
"direction": "IN"
},
"Q66": {
"Q13": {
"direction": "OUT"
},
"D00": {
"D52": {
"direction": "IN"
},
"D95": {
"Q83": {
"direction": "OUT"
},
"Q43": {
"direction": "OUT"
},
"D51": {
"direction": "IN"
},
"D36": {
"direction": "IN"
},
"Q20": {
"direction": "OUT"
},
"D93": {
"direction": "IN"
},
"WREN": {
"D35": {
"direction": "IN"
},
"Q61": {
"D37": {
"direction": "IN"
},
"Q80": {
"direction": "OUT"
},
"Q56": {
"direction": "OUT"
},
"D92": {
"direction": "IN"
},
"Q11": {
"direction": "OUT"
},
"D75": {
"direction": "IN"
},
"Q53": {
"direction": "OUT"
},
"D82": {
"direction": "IN"
},
"D62": {
"direction": "IN"
},
"SCANOUT0": {
"direction": "OUT"
},
"Q01": {
"direction": "OUT"
},
"Q73": {
"direction": "OUT"
},
"D24": {
"direction": "IN"
},
"D27": {
"direction": "IN"
},
"RESET": {
"direction": "IN"
},
"SCANOUT2": {
"direction": "OUT"
},
"D06": {
"direction": "IN"
},
"FULL": {
"direction": "OUT"
},
"Q60": {
"direction": "OUT"
},
"D42": {
"direction": "IN"
},
"D16": {
"direction": "IN"
},
"D80": {
"direction": "IN"
},
"D66": {
"direction": "IN"
},
"D00": {
"direction": "IN"
},
"D47": {
"direction": "IN"
},
"Q41": {
"direction": "OUT"
},
"D30": {
"direction": "IN"
},
"D55": {
"direction": "IN"
},
"Q63": {
"direction": "OUT"
},
"D61": {
"direction": "IN"
},
"TESTMODEB": {
"direction": "IN"
},
"D03": {
"direction": "IN"
},
"Q23": {
"direction": "OUT"
},
"Q82": {
"direction": "OUT"
},
"Q12": {
"direction": "OUT"
},
"Q30": {
"direction": "OUT"
},
"D05": {
"direction": "IN"
},
"D32": {
"direction": "IN"
},
"Q72": {
"direction": "OUT"
},
"D96": {
"direction": "IN"
},
"Q90": {
"direction": "OUT"
},
"Q55": {
"direction": "OUT"
},
"Q42": {
"direction": "OUT"
},
"D60": {
"direction": "IN"
},
"D14": {
"direction": "IN"
},
"D26": {
"direction": "IN"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"Q32": {
"direction": "OUT"
},
"SCANIN1": {
"direction": "IN"
},
"D71": {
"direction": "IN"
},
"D56": {
"direction": "IN"
},
"D67": {
"direction": "IN"
},
"D02": {
"direction": "IN"
},
"D07": {
"direction": "IN"
},
"SCANOUT1": {
"direction": "OUT"
},
"Q54": {
"direction": "OUT"
},
"D25": {
"direction": "IN"
},
"D72": {
"direction": "IN"
},
"Q51": {
"direction": "OUT"
},
"D44": {
"direction": "IN"
},
"SCANIN3": {
"direction": "IN"
},
"Q92": {
"direction": "OUT"
},
"Q33": {
"direction": "OUT"
},
"Q67": {
"direction": "OUT"
},
"D50": {
"direction": "IN"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
"D65": {
"direction": "IN"
},
"D17": {
"direction": "IN"
},
"D31": {
"direction": "IN"
},
"SCANOUT3": {
"direction": "OUT"
},
"D87": {
"direction": "IN"
},
"D23": {
"direction": "IN"
},
"D73": {
"direction": "IN"
},
"Q81": {
"direction": "OUT"
},
"Q21": {
"direction": "OUT"
},
"D91": {
"direction": "IN"
},
"RDCLK": {
"direction": "IN"
},
"D74": {
"direction": "IN"
},
"D21": {
"direction": "IN"
},
"Q00": {
"direction": "OUT"
},
"Q64": {
"direction": "OUT"
},
"D10": {
"direction": "IN"
},
"D43": {
"direction": "IN"
},
"Q70": {
"direction": "OUT"
},
"D57": {
"direction": "IN"
},
"D81": {
"direction": "IN"
},
"D15": {
"direction": "IN"
},
"D04": {
"direction": "IN"
},
"Q10": {
"direction": "OUT"
},
"Q03": {
"direction": "OUT"
},
"TESTREADDISB": {
"direction": "IN"
},
"D91": {
"TESTWRITEDISB": {
"direction": "IN"
},
"D85": {
"direction": "IN"
},
"Q52": {
"direction": "OUT"
},
"RDEN": {
"direction": "IN"
},
"WREN": {
"direction": "IN"
},
"Q02": {
"direction": "OUT"
},
"D97": {
"direction": "IN"
},
"D45": {
"direction": "IN"
},
"Q71": {
"direction": "OUT"
},
"D83": {
"direction": "IN"
},
"Q22": {
"direction": "OUT"
},
"D90": {
"direction": "IN"
},
"D40": {
"direction": "IN"
},
"Q31": {
"direction": "OUT"
},
"SCANIN0": {
"direction": "IN"
},
"D70": {
"direction": "IN"
},
"D94": {
"direction": "IN"
},
"D86": {
"direction": "IN"
},
"D12": {
"direction": "IN"
},
"D84": {
"direction": "IN"
},
"WRCLK": {
"direction": "IN"
},
"D53": {
"direction": "IN"
},
"D11": {
"direction": "IN"
},
"D33": {
"direction": "IN"
},
"SCANENB": {
"direction": "IN"
},
"D34": {
"direction": "IN"
},
"D77": {
"direction": "IN"
},
"D76": {
"direction": "IN"
},
"SCANIN2": {
"direction": "IN"
},
"D63": {
"direction": "IN"
},
"Q91": {
"direction": "OUT"
}
}
},
"type": "OUT_FIFO",
"site_pips": {}
}

12826
artix7/site_type_PCIE_2_1.json
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File diff suppressed because it is too large Load Diff

512
artix7/site_type_PHASER_IN_PHY.json
View File

@ -1,291 +1,291 @@
{
"type": "PHASER_IN_PHY",
"site_pips": {
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
},
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
}
},
"site_pins": {
"TESTIN6": {
"RANKSELPHY1": {
"direction": "IN"
},
"COUNTERLOADVAL3": {
"direction": "IN"
},
"COUNTERLOADEN": {
"direction": "IN"
},
"RANKSELPHY0": {
"direction": "IN"
},
"RCLK": {
"direction": "OUT"
},
"SELCALORSTG1": {
"direction": "IN"
},
"COUNTERLOADVAL4": {
"direction": "IN"
},
"ENCALIB1": {
"direction": "IN"
},
"STG1READ": {
"direction": "IN"
},
"STG1OVERFLOW": {
"direction": "OUT"
},
"COUNTERREADVAL2": {
"direction": "OUT"
},
"DIVIDERST": {
"direction": "IN"
},
"ENCALIBPHY0": {
"direction": "IN"
},
"STG1REGL5": {
"direction": "IN"
},
"COUNTERLOADVAL5": {
"direction": "IN"
},
"SCANCLK": {
"direction": "IN"
},
"STG1REGL6": {
"direction": "IN"
},
"SCANENB": {
"direction": "IN"
},
"ISERDESRST": {
"direction": "OUT"
},
"FREQREFCLK": {
"direction": "IN"
},
"BURSTPENDING": {
"direction": "IN"
},
"TESTOUT2": {
"direction": "OUT"
},
"ENSTG1": {
"direction": "IN"
},
"STG1REGL8": {
"direction": "IN"
},
"STG1REGR2": {
"direction": "OUT"
},
"COUNTERLOADVAL1": {
"direction": "IN"
},
"SCANIN": {
"direction": "IN"
},
"ENCALIB0": {
"direction": "IN"
},
"WRENABLE": {
"direction": "OUT"
},
"STG1REGR7": {
"direction": "OUT"
},
"STG1REGL0": {
"direction": "IN"
},
"TESTIN9": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"SCANOUT": {
"direction": "OUT"
},
"STG1REGL3": {
"direction": "IN"
},
"BURSTPENDINGPHY": {
"direction": "IN"
},
"TESTIN11": {
"direction": "IN"
},
"STG1REGL4": {
"direction": "IN"
},
"STG1REGR4": {
"direction": "OUT"
},
"TESTOUT1": {
"direction": "OUT"
},
"STG1REGL2": {
"direction": "IN"
},
"PHASEREFCLK": {
"direction": "IN"
},
"MEMREFCLK": {
"direction": "IN"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"TESTIN0": {
"direction": "IN"
},
"STG1REGL7": {
"direction": "IN"
},
"TESTIN8": {
"direction": "IN"
},
"COUNTERREADVAL5": {
"direction": "OUT"
},
"COUNTERREADVAL4": {
"direction": "OUT"
},
"TESTIN7": {
"direction": "IN"
},
"STG1REGR1": {
"direction": "OUT"
},
"TESTIN5": {
"direction": "IN"
},
"DQSFOUND": {
"direction": "OUT"
},
"FINEINC": {
"direction": "IN"
},
"TESTIN12": {
"direction": "IN"
},
"ENSTG1ADJUSTB": {
"direction": "IN"
},
"DQSOUTOFRANGE": {
"direction": "OUT"
},
"FINEENABLE": {
"direction": "IN"
},
"SYSCLK": {
"direction": "IN"
},
"COUNTERREADEN": {
"direction": "IN"
},
"COUNTERREADVAL3": {
"direction": "OUT"
},
"SCANMODEB": {
"direction": "IN"
},
"EDGEADV": {
"direction": "IN"
},
"FINEOVERFLOW": {
"direction": "OUT"
},
"STG1REGR0": {
"direction": "OUT"
},
"PHASELOCKED": {
"direction": "OUT"
},
"TESTOUT3": {
"direction": "OUT"
},
"SYNCIN": {
"direction": "IN"
},
"STG1LOAD": {
"direction": "IN"
},
"RSTDQSFIND": {
"direction": "IN"
},
"COUNTERREADVAL0": {
"direction": "OUT"
},
"ICLK": {
"direction": "OUT"
},
"TESTIN1": {
"direction": "IN"
},
"TESTOUT0": {
"direction": "OUT"
},
"STG1INCDEC": {
"direction": "IN"
},
"STG1REGR6": {
"direction": "OUT"
},
"RANKSEL0": {
"direction": "IN"
},
"STG1REGL1": {
"direction": "IN"
},
"COUNTERREADVAL1": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"STG1REGR8": {
"direction": "OUT"
},
"TESTIN10": {
"ICLKDIV": {
"direction": "OUT"
},
"DQSOUTOFRANGE": {
"direction": "OUT"
},
"SYSCLK": {
"direction": "IN"
},
"COUNTERLOADVAL2": {
"STG1REGL1": {
"direction": "IN"
},
"STG1REGR3": {
"TESTIN12": {
"direction": "IN"
},
"TESTOUT1": {
"direction": "OUT"
},
"COUNTERREADVAL5": {
"direction": "OUT"
},
"STG1REGR5": {
"direction": "OUT"
},
"RANKSELPHY1": {
"STG1REGL8": {
"direction": "IN"
},
"STG1REGL7": {
"direction": "IN"
},
"STG1REGL0": {
"direction": "IN"
},
"STG1REGR7": {
"direction": "OUT"
},
"TESTIN7": {
"direction": "IN"
},
"COUNTERREADVAL2": {
"direction": "OUT"
},
"STG1REGR1": {
"direction": "OUT"
},
"STG1REGR6": {
"direction": "OUT"
},
"STG1REGL4": {
"direction": "IN"
},
"COUNTERREADVAL1": {
"direction": "OUT"
},
"STG1REGR3": {
"direction": "OUT"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"WRENABLE": {
"direction": "OUT"
},
"TESTOUT0": {
"direction": "OUT"
},
"FINEOVERFLOW": {
"direction": "OUT"
},
"MEMREFCLK": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"STG1REGR4": {
"direction": "OUT"
},
"STG1READ": {
"direction": "IN"
},
"FINEENABLE": {
"direction": "IN"
},
"ENCALIB0": {
"direction": "IN"
},
"RANKSEL0": {
"direction": "IN"
},
"FREQREFCLK": {
"direction": "IN"
},
"TESTIN1": {
"direction": "IN"
},
"BURSTPENDING": {
"direction": "IN"
},
"STG1REGR0": {
"direction": "OUT"
},
"STG1REGL3": {
"direction": "IN"
},
"ENSTG1": {
"direction": "IN"
},
"BURSTPENDINGPHY": {
"direction": "IN"
},
"DQSFOUND": {
"direction": "OUT"
},
"RSTDQSFIND": {
"direction": "IN"
},
"STG1REGR2": {
"direction": "OUT"
},
"COUNTERREADVAL0": {
"direction": "OUT"
},
"TESTOUT3": {
"direction": "OUT"
},
"EDGEADV": {
"direction": "IN"
},
"SCANMODEB": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
},
"COUNTERLOADEN": {
"direction": "IN"
},
"COUNTERLOADVAL5": {
"direction": "IN"
},
"RCLK": {
"direction": "OUT"
},
"STG1LOAD": {
"direction": "IN"
},
"STG1OVERFLOW": {
"direction": "OUT"
},
"TESTIN9": {
"direction": "IN"
},
"STG1REGL6": {
"direction": "IN"
},
"ENCALIB1": {
"direction": "IN"
},
"ISERDESRST": {
"direction": "OUT"
},
"FINEINC": {
"direction": "IN"
},
"STG1REGL5": {
"direction": "IN"
},
"SCANIN": {
"direction": "IN"
},
"SCANOUT": {
"direction": "OUT"
},
"RANKSEL1": {
"direction": "IN"
},
"ICLKDIV": {
"direction": "OUT"
"RANKSELPHY0": {
"direction": "IN"
},
"ENCALIBPHY1": {
"PHASEREFCLK": {
"direction": "IN"
},
"COUNTERLOADVAL0": {
"direction": "IN"
},
"SCANCLK": {
"direction": "IN"
},
"TESTIN10": {
"direction": "IN"
},
"ENCALIBPHY1": {
"direction": "IN"
},
"SELCALORSTG1": {
"direction": "IN"
},
"COUNTERREADVAL3": {
"direction": "OUT"
},
"TESTIN6": {
"direction": "IN"
},
"COUNTERLOADVAL2": {
"direction": "IN"
},
"COUNTERREADEN": {
"direction": "IN"
},
"SYNCIN": {
"direction": "IN"
},
"STG1INCDEC": {
"direction": "IN"
},
"TESTOUT2": {
"direction": "OUT"
},
"COUNTERREADVAL4": {
"direction": "OUT"
},
"TESTIN0": {
"direction": "IN"
},
"PHASELOCKED": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"COUNTERLOADVAL1": {
"direction": "IN"
},
"ENCALIBPHY0": {
"direction": "IN"
},
"ICLK": {
"direction": "OUT"
},
"STG1REGL2": {
"direction": "IN"
},
"SCANENB": {
"direction": "IN"
},
"DIVIDERST": {
"direction": "IN"
},
"TESTIN11": {
"direction": "IN"
},
"TESTIN8": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"ENSTG1ADJUSTB": {
"direction": "IN"
}
},
"type": "PHASER_IN_PHY",
"site_pips": {
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
},
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
}
}
}

320
artix7/site_type_PHASER_OUT_PHY.json
View File

@ -1,38 +1,48 @@
{
"type": "PHASER_OUT_PHY",
"site_pips": {
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
},
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
}
},
"site_pins": {
"COUNTERREADVAL5": {
"BURSTPENDINGPHY": {
"direction": "IN"
},
"COUNTERLOADVAL8": {
"direction": "IN"
},
"COARSEOVERFLOW": {
"direction": "OUT"
},
"COUNTERREADVAL4": {
"OCLK": {
"direction": "OUT"
},
"TESTIN7": {
"COUNTERLOADVAL4": {
"direction": "IN"
},
"DIVIDERST": {
"SYSCLK": {
"direction": "IN"
},
"TESTIN5": {
"COUNTERREADVAL0": {
"direction": "OUT"
},
"CTSBUS0": {
"direction": "OUT"
},
"TESTIN9": {
"direction": "IN"
},
"TESTIN6": {
"COUNTERLOADVAL6": {
"direction": "IN"
},
"COUNTERLOADVAL3": {
"TESTOUT3": {
"direction": "OUT"
},
"EDGEADV": {
"direction": "IN"
},
"COUNTERLOADEN": {
"TESTIN14": {
"direction": "IN"
},
"TESTIN15": {
"direction": "IN"
},
"COARSEINC": {
"direction": "IN"
},
"FINEINC": {
@ -41,196 +51,175 @@
"TESTIN12": {
"direction": "IN"
},
"EDGEADV": {
"direction": "IN"
"TESTOUT1": {
"direction": "OUT"
},
"RDENABLE": {
"direction": "OUT"
},
"COUNTERREADVAL1": {
"direction": "OUT"
},
"COUNTERREADVAL8": {
"direction": "OUT"
},
"FINEENABLE": {
"TESTIN5": {
"direction": "IN"
},
"SELFINEOCLKDELAY": {
"direction": "IN"
},
"COUNTERREADEN": {
"direction": "IN"
},
"COUNTERLOADVAL4": {
"direction": "IN"
},
"PHASEREFCLK": {
"direction": "IN"
},
"ENCALIB1": {
"direction": "IN"
},
"COUNTERREADVAL3": {
"direction": "OUT"
},
"DQSBUS1": {
"direction": "OUT"
},
"DTSBUS1": {
"direction": "OUT"
},
"SCANMODEB": {
"direction": "IN"
},
"COUNTERREADVAL2": {
"direction": "OUT"
},
"COARSEENABLE": {
"direction": "IN"
},
"ENCALIBPHY0": {
"direction": "IN"
},
"COUNTERLOADVAL5": {
"direction": "IN"
},
"SCANENB": {
"direction": "IN"
},
"SCANCLK": {
"direction": "IN"
},
"TESTIN15": {
"direction": "IN"
},
"COARSEOVERFLOW": {
"direction": "OUT"
},
"FINEOVERFLOW": {
"direction": "OUT"
},
"TESTOUT3": {
"direction": "OUT"
},
"COUNTERREADVAL7": {
"direction": "OUT"
},
"FREQREFCLK": {
"direction": "IN"
},
"BURSTPENDING": {
"direction": "IN"
},
"TESTOUT2": {
"direction": "OUT"
},
"CTSBUS0": {
"direction": "OUT"
},
"SYNCIN": {
"direction": "IN"
},
"COUNTERREADVAL0": {
"direction": "OUT"
},
"TESTIN10": {
"direction": "IN"
},
"COUNTERLOADVAL1": {
"COUNTERLOADEN": {
"direction": "IN"
},
"TESTIN1": {
"direction": "IN"
},
"SCANIN": {
"COUNTERLOADVAL5": {
"direction": "IN"
},
"OCLK": {
"direction": "OUT"
},
"OSERDESRST": {
"direction": "OUT"
},
"COUNTERLOADVAL8": {
"COARSEENABLE": {
"direction": "IN"
},
"TESTIN9": {
"SYNCIN": {
"direction": "IN"
},
"TESTIN2": {
"ENCALIBPHY0": {
"direction": "IN"
},
"OCLKDIV": {
"direction": "OUT"
},
"SCANOUT": {
"direction": "OUT"
"TESTIN7": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"ENCALIB1": {
"direction": "IN"
},
"COUNTERREADVAL7": {
"direction": "OUT"
},
"SCANCLK": {
"direction": "IN"
},
"FINEENABLE": {
"direction": "IN"
},
"COUNTERLOADVAL3": {
"direction": "IN"
},
"SCANMODEB": {
"direction": "IN"
},
"DQSBUS0": {
"direction": "OUT"
},
"TESTIN11": {
"direction": "IN"
},
"BURSTPENDINGPHY": {
"direction": "IN"
},
"COUNTERLOADVAL6": {
"direction": "IN"
},
"RST": {
"direction": "IN"
},
"TESTIN0": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"TESTIN14": {
"direction": "IN"
},
"COUNTERLOADVAL0": {
"direction": "IN"
},
"TESTOUT1": {
"DQSBUS1": {
"direction": "OUT"
},
"TESTOUT0": {
"direction": "OUT"
},
"CTSBUS1": {
"SCANOUT": {
"direction": "OUT"
},
"OCLKDELAYED": {
"COUNTERREADVAL6": {
"direction": "OUT"
},
"SYSCLK": {
"SCANIN": {
"direction": "IN"
},
"COUNTERREADVAL2": {
"direction": "OUT"
},
"PHASEREFCLK": {
"direction": "IN"
},
"COUNTERLOADVAL0": {
"direction": "IN"
},
"COUNTERLOADVAL1": {
"direction": "IN"
},
"COUNTERLOADVAL2": {
"direction": "IN"
},
"COUNTERLOADVAL7": {
"SELFINEOCLKDELAY": {
"direction": "IN"
},
"MEMREFCLK": {
"COUNTERREADVAL8": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"ENCALIB0": {
"COUNTERREADVAL1": {
"direction": "OUT"
},
"TESTIN10": {
"direction": "IN"
},
"ENCALIBPHY1": {
"direction": "IN"
},
"OCLKDELAYED": {
"direction": "OUT"
},
"COUNTERREADVAL3": {
"direction": "OUT"
},
"TESTIN6": {
"direction": "IN"
},
"TESTIN4": {
"direction": "IN"
},
"COARSEINC": {
"TESTIN2": {
"direction": "IN"
},
"ENCALIBPHY1": {
"COUNTERREADEN": {
"direction": "IN"
},
"OSERDESRST": {
"direction": "OUT"
},
"OCLKDIV": {
"direction": "OUT"
},
"DTSBUS1": {
"direction": "OUT"
},
"FINEOVERFLOW": {
"direction": "OUT"
},
"MEMREFCLK": {
"direction": "IN"
},
"TESTOUT2": {
"direction": "OUT"
},
"COUNTERREADVAL4": {
"direction": "OUT"
},
"TESTIN3": {
"direction": "IN"
},
"TESTIN0": {
"direction": "IN"
},
"COUNTERLOADVAL7": {
"direction": "IN"
},
"ENCALIB0": {
"direction": "IN"
},
"FREQREFCLK": {
"direction": "IN"
},
"CTSBUS1": {
"direction": "OUT"
},
"COUNTERREADVAL5": {
"direction": "OUT"
},
"BURSTPENDING": {
"direction": "IN"
},
"DIVIDERST": {
"direction": "IN"
},
"SCANENB": {
"direction": "IN"
},
"DTSBUS0": {
@ -239,8 +228,19 @@
"TESTIN8": {
"direction": "IN"
},
"COUNTERREADVAL6": {
"direction": "OUT"
"TESTIN11": {
"direction": "IN"
}
},
"type": "PHASER_OUT_PHY",
"site_pips": {
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
},
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
}
}
}

150
artix7/site_type_PHASER_REF.json
View File

@ -1,89 +1,89 @@
{
"site_pins": {
"TESTOUT4": {
"direction": "OUT"
},
"CLKOUT": {
"direction": "OUT"
},
"TMUXOUT": {
"direction": "OUT"
},
"TESTIN3": {
"direction": "IN"
},
"RST": {
"direction": "IN"
},
"TESTOUT3": {
"direction": "OUT"
},
"PWRDWN": {
"direction": "IN"
},
"TESTIN6": {
"direction": "IN"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"TESTOUT5": {
"direction": "OUT"
},
"TESTOUT2": {
"direction": "OUT"
},
"TESTOUT6": {
"direction": "OUT"
},
"TESTIN0": {
"direction": "IN"
},
"LOCKED": {
"direction": "OUT"
},
"CLKIN": {
"direction": "IN"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTOUT1": {
"direction": "OUT"
},
"TESTIN1": {
"direction": "IN"
},
"TESTOUT0": {
"direction": "OUT"
},
"TESTIN7": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
}
},
"type": "PHASER_REF",
"site_pips": {
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
},
"PWRDWNINV:PWRDWN_B": {
"from_pin": "PWRDWN_B",
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
},
"PWRDWNINV:PWRDWN": {
"from_pin": "PWRDWN",
"to_pin": "OUT"
},
"RSTINV:RST": {
"from_pin": "RST",
"PWRDWNINV:PWRDWN_B": {
"from_pin": "PWRDWN_B",
"to_pin": "OUT"
}
},
"site_pins": {
"TESTOUT2": {
"direction": "OUT"
},
"TESTOUT0": {
"direction": "OUT"
},
"TESTIN5": {
"direction": "IN"
},
"TESTIN6": {
"direction": "IN"
},
"TESTIN1": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"LOCKED": {
"direction": "OUT"
},
"TMUXOUT": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"TESTIN0": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"TESTIN7": {
"direction": "IN"
},
"TESTOUT1": {
"direction": "OUT"
},
"TESTOUT6": {
"direction": "OUT"
},
"PWRDWN": {
"direction": "IN"
},
"TESTOUT4": {
"direction": "OUT"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTIN4": {
"direction": "IN"
},
"TESTOUT3": {
"direction": "OUT"
},
"CLKOUT": {
"direction": "OUT"
},
"CLKIN": {
"direction": "IN"
},
"TESTOUT5": {
"direction": "OUT"
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
}
}
}

488
artix7/site_type_PHY_CONTROL.json
View File

@ -1,260 +1,204 @@
{
"type": "PHY_CONTROL",
"site_pips": {},
"site_pins": {
"INBURSTPENDING2": {
"TESTOUTPUT6": {
"direction": "OUT"
},
"TESTINPUT9": {
"PHYCTLWD2": {
"direction": "IN"
},
"READCALIBENABLE": {
"direction": "IN"
},
"INBURSTPENDING2": {
"direction": "OUT"
},
"PHYCTLWD9": {
"direction": "IN"
},
"REFDLLLOCK": {
"TESTINPUT4": {
"direction": "IN"
},
"PHYCTLWD20": {
"PHYCTLWD6": {
"direction": "IN"
},
"PHYCTLWD18": {
"direction": "IN"
},
"TESTOUTPUT4": {
"TESTOUTPUT5": {
"direction": "OUT"
},
"INRANKD1": {
"PHYCTLWD28": {
"direction": "IN"
},
"TESTOUTPUT13": {
"direction": "OUT"
},
"TESTINPUT0": {
"direction": "IN"
},
"TESTINPUT12": {
"direction": "IN"
},
"AUXOUTPUT3": {
"direction": "OUT"
},
"TESTINPUT8": {
"direction": "IN"
},
"PCENABLECALIB0": {
"direction": "OUT"
},
"TESTSELECT1": {
"direction": "IN"
},
"TESTOUTPUT1": {
"direction": "OUT"
},
"RESET": {
"direction": "IN"
},
"PHYCTLWD11": {
"direction": "IN"
},
"PHYCTLREADY": {
"direction": "OUT"
},
"INRANKB0": {
"direction": "OUT"
},
"TESTINPUT5": {
"PHYCTLWD25": {
"direction": "IN"
},
"INRANKB1": {
"direction": "OUT"
},
"TESTSELECT2": {
"direction": "IN"
},
"SCANENABLEN": {
"direction": "IN"
},
"TESTINPUT11": {
"direction": "IN"
},
"PHYCTLMSTREMPTY": {
"direction": "IN"
},
"INRANKD0": {
"TESTOUTPUT10": {
"direction": "OUT"
},
"PHYCTLWD16": {
"direction": "IN"
},
"TESTINPUT13": {
"direction": "IN"
},
"PHYCTLWD4": {
"direction": "IN"
},
"PHYCTLWD8": {
"direction": "IN"
},
"PHYCTLWD26": {
"direction": "IN"
},
"PHYCTLWD1": {
"direction": "IN"
},
"PHYCTLFULL": {
"direction": "OUT"
},
"TESTOUTPUT5": {
"direction": "OUT"
},
"AUXOUTPUT0": {
"direction": "OUT"
},
"PHYCTLWD27": {
"direction": "IN"
},
"TESTOUTPUT0": {
"direction": "OUT"
},
"PHYCTLWD19": {
"direction": "IN"
},
"PHYCTLWD23": {
"direction": "IN"
},
"OUTBURSTPENDING3": {
"direction": "OUT"
},
"OUTBURSTPENDING0": {
"direction": "OUT"
},
"PHYCTLALMOSTFULL": {
"direction": "OUT"
},
"PHYCTLEMPTY": {
"direction": "OUT"
},
"PHYCTLWD30": {
"direction": "IN"
},
"PHYCTLWD12": {
"direction": "IN"
},
"TESTOUTPUT3": {
"direction": "OUT"
},
"MEMREFCLK": {
"direction": "IN"
},
"PHYCTLWD17": {
"direction": "IN"
},
"AUXOUTPUT2": {
"direction": "OUT"
},
"PHYCTLWD29": {
"direction": "IN"
},
"PCENABLECALIB1": {
"direction": "OUT"
},
"TESTOUTPUT6": {
"direction": "OUT"
},
"TESTINPUT2": {
"direction": "IN"
},
"INBURSTPENDING1": {
"direction": "OUT"
},
"TESTINPUT1": {
"direction": "IN"
},
"TESTOUTPUT11": {
"direction": "OUT"
},
"INBURSTPENDING3": {
"direction": "OUT"
},
"TESTOUTPUT8": {
"direction": "OUT"
},
"TESTINPUT6": {
"direction": "IN"
},
"TESTINPUT7": {
"direction": "IN"
},
"PHYCTLWD0": {
"direction": "IN"
},
"INBURSTPENDING0": {
"direction": "OUT"
},
"TESTINPUT14": {
"direction": "IN"
},
"PHYCTLWD21": {
"direction": "IN"
},
"PHYCTLWD25": {
"direction": "IN"
},
"TESTOUTPUT2": {
"direction": "OUT"
},
"PHYCTLWD6": {
"direction": "IN"
},
"INRANKA1": {
"direction": "OUT"
},
"TESTINPUT4": {
"direction": "IN"
},
"PHYCTLWD14": {
"direction": "IN"
},
"TESTOUTPUT15": {
"direction": "OUT"
},
"TESTINPUT3": {
"direction": "IN"
},
"PHYCTLWD31": {
"direction": "IN"
},
"TESTINPUT10": {
"direction": "IN"
},
"TESTOUTPUT7": {
"TESTOUTPUT4": {
"direction": "OUT"
},
"PHYCTLWD22": {
"direction": "IN"
},
"PHYCTLWD28": {
"TESTINPUT15": {
"direction": "IN"
},
"PHYCTLWD5": {
"direction": "IN"
},
"TESTOUTPUT0": {
"direction": "OUT"
},
"OUTBURSTPENDING2": {
"direction": "OUT"
},
"TESTOUTPUT1": {
"direction": "OUT"
},
"TESTINPUT1": {
"direction": "IN"
},
"INRANKA1": {
"direction": "OUT"
},
"PHYCTLWD3": {
"direction": "IN"
},
"TESTINPUT0": {
"direction": "IN"
},
"PHYCTLWD24": {
"direction": "IN"
},
"AUXOUTPUT0": {
"direction": "OUT"
},
"PHYCTLWD23": {
"direction": "IN"
},
"PHYCTLWD20": {
"direction": "IN"
},
"INBURSTPENDING0": {
"direction": "OUT"
},
"PHYCTLEMPTY": {
"direction": "OUT"
},
"SCANENABLEN": {
"direction": "IN"
},
"PHYCLK": {
"direction": "IN"
},
"PHYCTLWD4": {
"direction": "IN"
},
"OUTBURSTPENDING3": {
"direction": "OUT"
},
"TESTSELECT2": {
"direction": "IN"
},
"PHYCTLWD15": {
"direction": "IN"
},
"PHYCTLWD11": {
"direction": "IN"
},
"PHYCTLWD16": {
"direction": "IN"
},
"RESET": {
"direction": "IN"
},
"PHYCTLWD29": {
"direction": "IN"
},
"PHYCTLALMOSTFULL": {
"direction": "OUT"
},
"TESTOUTPUT11": {
"direction": "OUT"
},
"PHYCTLWD10": {
"direction": "IN"
},
"TESTINPUT6": {
"direction": "IN"
},
"PHYCTLWD14": {
"direction": "IN"
},
"MEMREFCLK": {
"direction": "IN"
},
"PHYCTLWD21": {
"direction": "IN"
},
"INBURSTPENDING1": {
"direction": "OUT"
},
"TESTOUTPUT7": {
"direction": "OUT"
},
"TESTOUTPUT15": {
"direction": "OUT"
},
"TESTINPUT11": {
"direction": "IN"
},
"PHYCTLWD31": {
"direction": "IN"
},
"INBURSTPENDING3": {
"direction": "OUT"
},
"AUXOUTPUT1": {
"direction": "OUT"
},
"PCENABLECALIB1": {
"direction": "OUT"
},
"PHYCTLWD0": {
"direction": "IN"
},
"WRITECALIBENABLE": {
"direction": "IN"
},
"TESTOUTPUT12": {
"direction": "OUT"
},
"INRANKB0": {
"direction": "OUT"
},
"TESTINPUT10": {
"direction": "IN"
},
"TESTINPUT8": {
"direction": "IN"
},
"REFDLLLOCK": {
"direction": "IN"
},
"TESTOUTPUT9": {
"direction": "OUT"
},
"PHYCTLWD7": {
"direction": "IN"
},
"TESTOUTPUT14": {
"direction": "OUT"
},
"WRITECALIBENABLE": {
"direction": "IN"
},
"PHYCTLWD3": {
"direction": "IN"
},
"PHYCTLWD10": {
"direction": "IN"
},
"OUTBURSTPENDING2": {
"direction": "OUT"
},
"TESTOUTPUT10": {
"direction": "OUT"
},
"AUXOUTPUT1": {
"OUTBURSTPENDING1": {
"direction": "OUT"
},
"INRANKA0": {
@ -263,56 +207,112 @@
"TESTSELECT0": {
"direction": "IN"
},
"READCALIBENABLE": {
"direction": "IN"
},
"INRANKC1": {
"direction": "OUT"
},
"TESTINPUT15": {
"direction": "IN"
},
"PHYCTLWD15": {
"direction": "IN"
},
"PHYCTLWD2": {
"direction": "IN"
},
"SYNCIN": {
"direction": "IN"
},
"TESTOUTPUT13": {
"direction": "OUT"
},
"PHYCTLWRENABLE": {
"PHYCTLWD13": {
"direction": "IN"
},
"PLLLOCK": {
"direction": "IN"
},
"PHYCTLWD7": {
"TESTINPUT5": {
"direction": "IN"
},
"TESTOUTPUT8": {
"direction": "OUT"
},
"PCENABLECALIB0": {
"direction": "OUT"
},
"PHYCTLWD27": {
"direction": "IN"
},
"TESTINPUT13": {
"direction": "IN"
},
"AUXOUTPUT3": {
"direction": "OUT"
},
"AUXOUTPUT2": {
"direction": "OUT"
},
"PHYCTLFULL": {
"direction": "OUT"
},
"PHYCTLWD19": {
"direction": "IN"
},
"PHYCTLWD1": {
"direction": "IN"
},
"PHYCTLWD26": {
"direction": "IN"
},
"INRANKD0": {
"direction": "OUT"
},
"PHYCTLWD30": {
"direction": "IN"
},
"TESTINPUT14": {
"direction": "IN"
},
"TESTOUTPUT3": {
"direction": "OUT"
},
"PHYCTLWD18": {
"direction": "IN"
},
"TESTOUTPUT2": {
"direction": "OUT"
},
"INRANKC0": {
"direction": "OUT"
},
"PHYCTLWD5": {
"PHYCTLWD8": {
"direction": "IN"
},
"PHYCLK": {
"TESTINPUT9": {
"direction": "IN"
},
"PHYCTLWD13": {
"SYNCIN": {
"direction": "IN"
},
"TESTOUTPUT9": {
"OUTBURSTPENDING0": {
"direction": "OUT"
},
"PHYCTLWD24": {
"PHYCTLWD17": {
"direction": "IN"
},
"OUTBURSTPENDING1": {
"TESTINPUT12": {
"direction": "IN"
},
"INRANKD1": {
"direction": "OUT"
},
"PHYCTLWD12": {
"direction": "IN"
},
"TESTINPUT3": {
"direction": "IN"
},
"PHYCTLMSTREMPTY": {
"direction": "IN"
},
"PHYCTLWRENABLE": {
"direction": "IN"
},
"TESTINPUT7": {
"direction": "IN"
},
"TESTSELECT1": {
"direction": "IN"
},
"TESTINPUT2": {
"direction": "IN"
}
}
},
"type": "PHY_CONTROL",
"site_pips": {}
}

944
artix7/site_type_PLLE2_ADV.json
View File

@ -1,6 +1,478 @@
{
"site_pins": {
"TESTIN17": {
"direction": "IN"
},
"TESTOUT28": {
"direction": "OUT"
},
"TESTOUT22": {
"direction": "OUT"
},
"TESTOUT46": {
"direction": "OUT"
},
"TESTOUT4": {
"direction": "OUT"
},
"CLKOUT2": {
"direction": "OUT"
},
"DADDR0": {
"direction": "IN"
},
"TESTOUT15": {
"direction": "OUT"
},
"DI3": {
"direction": "IN"
},
"TESTOUT27": {
"direction": "OUT"
},
"TESTIN25": {
"direction": "IN"
},
"DO0": {
"direction": "OUT"
},
"TESTOUT25": {
"direction": "OUT"
},
"DI8": {
"direction": "IN"
},
"CLKOUT0": {
"direction": "OUT"
},
"TESTIN28": {
"direction": "IN"
},
"TESTOUT6": {
"direction": "OUT"
},
"TESTOUT31": {
"direction": "OUT"
},
"DADDR2": {
"direction": "IN"
},
"TESTIN12": {
"direction": "IN"
},
"TESTOUT1": {
"direction": "OUT"
},
"TESTOUT12": {
"direction": "OUT"
},
"PWRDWN": {
"direction": "IN"
},
"DO5": {
"direction": "OUT"
},
"TESTIN26": {
"direction": "IN"
},
"DI6": {
"direction": "IN"
},
"TESTIN23": {
"direction": "IN"
},
"DCLK": {
"direction": "IN"
},
"TESTOUT23": {
"direction": "OUT"
},
"CLKINSEL": {
"direction": "IN"
},
"DADDR4": {
"direction": "IN"
},
"TESTIN14": {
"direction": "IN"
},
"TESTOUT9": {
"direction": "OUT"
},
"TESTOUT42": {
"direction": "OUT"
},
"TESTOUT32": {
"direction": "OUT"
},
"TESTOUT39": {
"direction": "OUT"
},
"DI10": {
"direction": "IN"
},
"TESTOUT5": {
"direction": "OUT"
},
"DI12": {
"direction": "IN"
},
"TESTOUT38": {
"direction": "OUT"
},
"DADDR1": {
"direction": "IN"
},
"TESTOUT53": {
"direction": "OUT"
},
"DI5": {
"direction": "IN"
},
"TESTOUT47": {
"direction": "OUT"
},
"CLKFBIN": {
"direction": "IN"
},
"TESTOUT26": {
"direction": "OUT"
},
"TESTIN31": {
"direction": "IN"
},
"DO2": {
"direction": "OUT"
},
"TMUXOUT": {
"direction": "OUT"
},
"TESTOUT30": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"TESTIN30": {
"direction": "IN"
},
"DRDY": {
"direction": "OUT"
},
"TESTIN16": {
"direction": "IN"
},
"DEN": {
"direction": "IN"
},
"TESTOUT52": {
"direction": "OUT"
},
"CLKOUT1": {
"direction": "OUT"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"TESTOUT37": {
"direction": "OUT"
},
"TESTOUT0": {
"direction": "OUT"
},
"TESTIN18": {
"direction": "IN"
},
"TESTOUT40": {
"direction": "OUT"
},
"TESTOUT57": {
"direction": "OUT"
},
"CLKOUT3": {
"direction": "OUT"
},
"TESTOUT33": {
"direction": "OUT"
},
"TESTOUT35": {
"direction": "OUT"
},
"TESTOUT20": {
"direction": "OUT"
},
"DO12": {
"direction": "OUT"
},
"TESTOUT59": {
"direction": "OUT"
},
"TESTIN1": {
"direction": "IN"
},
"TESTOUT44": {
"direction": "OUT"
},
"TESTIN22": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"DO9": {
"direction": "OUT"
},
"TESTOUT58": {
"direction": "OUT"
},
"TESTIN0": {
"direction": "IN"
},
"DO10": {
"direction": "OUT"
},
"TESTOUT17": {
"direction": "OUT"
},
"CLKIN2": {
"direction": "IN"
},
"CLKIN1": {
"direction": "IN"
},
"LOCKED": {
"direction": "OUT"
},
"DO8": {
"direction": "OUT"
},
"DI9": {
"direction": "IN"
},
"DO6": {
"direction": "OUT"
},
"TESTOUT51": {
"direction": "OUT"
},
"TESTOUT34": {
"direction": "OUT"
},
"TESTOUT55": {
"direction": "OUT"
},
"TESTIN29": {
"direction": "IN"
},
"DI13": {
"direction": "IN"
},
"DADDR6": {
"direction": "IN"
},
"DI1": {
"direction": "IN"
},
"TESTIN27": {
"direction": "IN"
},
"TESTOUT3": {
"direction": "OUT"
},
"TESTOUT61": {
"direction": "OUT"
},
"TESTIN15": {
"direction": "IN"
},
"CLKOUT5": {
"direction": "OUT"
},
"DO7": {
"direction": "OUT"
},
"TESTOUT18": {
"direction": "OUT"
},
"DI0": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
},
"TESTOUT43": {
"direction": "OUT"
},
"TESTIN21": {
"direction": "IN"
},
"DO3": {
"direction": "OUT"
},
"CLKOUT4": {
"direction": "OUT"
},
"DO14": {
"direction": "OUT"
},
"TESTIN9": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"DO4": {
"direction": "OUT"
},
"DO11": {
"direction": "OUT"
},
"TESTIN24": {
"direction": "IN"
},
"TESTOUT19": {
"direction": "OUT"
},
"TESTOUT13": {
"direction": "OUT"
},
"DI7": {
"direction": "IN"
},
"TESTIN7": {
"direction": "IN"
},
"TESTOUT10": {
"direction": "OUT"
},
"TESTOUT60": {
"direction": "OUT"
},
"TESTOUT8": {
"direction": "OUT"
},
"TESTOUT45": {
"direction": "OUT"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTOUT50": {
"direction": "OUT"
},
"DO15": {
"direction": "OUT"
},
"TESTOUT49": {
"direction": "OUT"
},
"TESTOUT21": {
"direction": "OUT"
},
"TESTIN19": {
"direction": "IN"
},
"DI15": {
"direction": "IN"
},
"TESTOUT29": {
"direction": "OUT"
},
"TESTOUT36": {
"direction": "OUT"
},
"TESTOUT24": {
"direction": "OUT"
},
"TESTOUT54": {
"direction": "OUT"
},
"TESTOUT63": {
"direction": "OUT"
},
"TESTIN10": {
"direction": "IN"
},
"TESTOUT14": {
"direction": "OUT"
},
"TESTOUT62": {
"direction": "OUT"
},
"TESTOUT11": {
"direction": "OUT"
},
"DI4": {
"direction": "IN"
},
"TESTOUT56": {
"direction": "OUT"
},
"TESTIN20": {
"direction": "IN"
},
"DI14": {
"direction": "IN"
},
"TESTOUT16": {
"direction": "OUT"
},
"TESTOUT2": {
"direction": "OUT"
},
"CLKFBOUT": {
"direction": "OUT"
},
"DO13": {
"direction": "OUT"
},
"TESTOUT41": {
"direction": "OUT"
},
"DADDR3": {
"direction": "IN"
},
"DWE": {
"direction": "IN"
},
"DI2": {
"direction": "IN"
},
"DADDR5": {
"direction": "IN"
},
"TESTOUT48": {
"direction": "OUT"
},
"DO1": {
"direction": "OUT"
},
"DI11": {
"direction": "IN"
},
"TESTIN6": {
"direction": "IN"
},
"TESTIN8": {
"direction": "IN"
},
"TESTIN11": {
"direction": "IN"
}
},
"type": "PLLE2_ADV",
"site_pips": {
"CLKINSELINV:CLKINSEL_B": {
"from_pin": "CLKINSEL_B",
"to_pin": "OUT"
},
"PWRDWNINV:PWRDWN": {
"from_pin": "PWRDWN",
"to_pin": "OUT"
},
"PWRDWNINV:PWRDWN_B": {
"from_pin": "PWRDWN_B",
"to_pin": "OUT"
@ -16,478 +488,6 @@
"CLKINSELINV:CLKINSEL": {
"from_pin": "CLKINSEL",
"to_pin": "OUT"
},
"CLKINSELINV:CLKINSEL_B": {
"from_pin": "CLKINSEL_B",
"to_pin": "OUT"
},
"PWRDWNINV:PWRDWN": {
"from_pin": "PWRDWN",
"to_pin": "OUT"
}
},
"site_pins": {
"DO14": {
"direction": "OUT"
},
"CLKOUT4": {
"direction": "OUT"
},
"TESTOUT37": {
"direction": "OUT"
},
"DO0": {
"direction": "OUT"
},
"TESTOUT35": {
"direction": "OUT"
},
"DO12": {
"direction": "OUT"
},
"DI12": {
"direction": "IN"
},
"TESTIN6": {
"direction": "IN"
},
"DO9": {
"direction": "OUT"
},
"DADDR3": {
"direction": "IN"
},
"DCLK": {
"direction": "IN"
},
"CLKOUT5": {
"direction": "OUT"
},
"TESTOUT28": {
"direction": "OUT"
},
"TESTIN27": {
"direction": "IN"
},
"DI6": {
"direction": "IN"
},
"TESTOUT14": {
"direction": "OUT"
},
"TESTIN22": {
"direction": "IN"
},
"TESTOUT63": {
"direction": "OUT"
},
"TESTIN7": {
"direction": "IN"
},
"DRDY": {
"direction": "OUT"
},
"TESTOUT23": {
"direction": "OUT"
},
"CLKFBIN": {
"direction": "IN"
},
"TESTOUT38": {
"direction": "OUT"
},
"TESTIN30": {
"direction": "IN"
},
"TESTIN20": {
"direction": "IN"
},
"TESTIN15": {
"direction": "IN"
},
"TESTOUT1": {
"direction": "OUT"
},
"TESTIN17": {
"direction": "IN"
},
"TESTOUT49": {
"direction": "OUT"
},
"DO8": {
"direction": "OUT"
},
"TESTOUT2": {
"direction": "OUT"
},
"TESTOUT51": {
"direction": "OUT"
},
"DO11": {
"direction": "OUT"
},
"DI0": {
"direction": "IN"
},
"TESTOUT13": {
"direction": "OUT"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTOUT11": {
"direction": "OUT"
},
"TESTOUT27": {
"direction": "OUT"
},
"TESTOUT43": {
"direction": "OUT"
},
"TESTOUT42": {
"direction": "OUT"
},
"DI1": {
"direction": "IN"
},
"DI8": {
"direction": "IN"
},
"TESTOUT17": {
"direction": "OUT"
},
"TESTIN9": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"TESTOUT55": {
"direction": "OUT"
},
"TESTIN11": {
"direction": "IN"
},
"DO7": {
"direction": "OUT"
},
"DO6": {
"direction": "OUT"
},
"TESTOUT3": {
"direction": "OUT"
},
"TESTOUT56": {
"direction": "OUT"
},
"TESTIN14": {
"direction": "IN"
},
"DO4": {
"direction": "OUT"
},
"TESTOUT50": {
"direction": "OUT"
},
"TESTOUT18": {
"direction": "OUT"
},
"TESTOUT0": {
"direction": "OUT"
},
"TESTOUT8": {
"direction": "OUT"
},
"DADDR2": {
"direction": "IN"
},
"TESTOUT45": {
"direction": "OUT"
},
"TESTIN4": {
"direction": "IN"
},
"TESTOUT15": {
"direction": "OUT"
},
"TESTOUT30": {
"direction": "OUT"
},
"TESTIN13": {
"direction": "IN"
},
"TESTIN0": {
"direction": "IN"
},
"DI4": {
"direction": "IN"
},
"TESTOUT5": {
"direction": "OUT"
},
"TESTOUT25": {
"direction": "OUT"
},
"DI14": {
"direction": "IN"
},
"CLKOUT1": {
"direction": "OUT"
},
"TESTIN29": {
"direction": "IN"
},
"DEN": {
"direction": "IN"
},
"DI10": {
"direction": "IN"
},
"DI13": {
"direction": "IN"
},
"DADDR4": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
},
"TESTOUT9": {
"direction": "OUT"
},
"TESTIN25": {
"direction": "IN"
},
"TESTOUT62": {
"direction": "OUT"
},
"TESTOUT22": {
"direction": "OUT"
},
"TESTIN12": {
"direction": "IN"
},
"DADDR0": {
"direction": "IN"
},
"DO2": {
"direction": "OUT"
},
"TESTOUT24": {
"direction": "OUT"
},
"TESTOUT34": {
"direction": "OUT"
},
"PWRDWN": {
"direction": "IN"
},
"DWE": {
"direction": "IN"
},
"DADDR5": {
"direction": "IN"
},
"TESTOUT40": {
"direction": "OUT"
},
"DI11": {
"direction": "IN"
},
"TESTIN18": {
"direction": "IN"
},
"TESTOUT47": {
"direction": "OUT"
},
"CLKIN2": {
"direction": "IN"
},
"TESTOUT36": {
"direction": "OUT"
},
"TESTIN24": {
"direction": "IN"
},
"TESTOUT60": {
"direction": "OUT"
},
"TESTOUT10": {
"direction": "OUT"
},
"TESTOUT31": {
"direction": "OUT"
},
"TESTOUT39": {
"direction": "OUT"
},
"TESTOUT59": {
"direction": "OUT"
},
"TESTOUT32": {
"direction": "OUT"
},
"TESTOUT33": {
"direction": "OUT"
},
"TESTOUT44": {
"direction": "OUT"
},
"DO13": {
"direction": "OUT"
},
"TESTOUT21": {
"direction": "OUT"
},
"TESTOUT57": {
"direction": "OUT"
},
"DADDR1": {
"direction": "IN"
},
"TESTIN21": {
"direction": "IN"
},
"DI9": {
"direction": "IN"
},
"DO5": {
"direction": "OUT"
},
"TESTOUT61": {
"direction": "OUT"
},
"TESTOUT16": {
"direction": "OUT"
},
"TESTOUT46": {
"direction": "OUT"
},
"TESTOUT54": {
"direction": "OUT"
},
"TESTOUT26": {
"direction": "OUT"
},
"DO10": {
"direction": "OUT"
},
"DI5": {
"direction": "IN"
},
"DI15": {
"direction": "IN"
},
"TESTOUT48": {
"direction": "OUT"
},
"TESTIN1": {
"direction": "IN"
},
"CLKIN1": {
"direction": "IN"
},
"TESTIN31": {
"direction": "IN"
},
"TESTOUT29": {
"direction": "OUT"
},
"CLKFBOUT": {
"direction": "OUT"
},
"DO1": {
"direction": "OUT"
},
"CLKOUT2": {
"direction": "OUT"
},
"TESTIN26": {
"direction": "IN"
},
"DADDR6": {
"direction": "IN"
},
"TESTIN19": {
"direction": "IN"
},
"LOCKED": {
"direction": "OUT"
},
"TESTOUT41": {
"direction": "OUT"
},
"TMUXOUT": {
"direction": "OUT"
},
"TESTOUT58": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"DO15": {
"direction": "OUT"
},
"TESTIN3": {
"direction": "IN"
},
"TESTIN23": {
"direction": "IN"
},
"TESTIN16": {
"direction": "IN"
},
"TESTOUT6": {
"direction": "OUT"
},
"CLKOUT3": {
"direction": "OUT"
},
"CLKINSEL": {
"direction": "IN"
},
"TESTIN8": {
"direction": "IN"
},
"DI3": {
"direction": "IN"
},
"TESTOUT12": {
"direction": "OUT"
},
"CLKOUT0": {
"direction": "OUT"
},
"TESTOUT4": {
"direction": "OUT"
},
"TESTOUT20": {
"direction": "OUT"
},
"TESTOUT19": {
"direction": "OUT"
},
"DI7": {
"direction": "IN"
},
"TESTOUT52": {
"direction": "OUT"
},
"TESTOUT53": {
"direction": "OUT"
},
"TESTIN10": {
"direction": "IN"
},
"DI2": {
"direction": "IN"
},
"TESTIN28": {
"direction": "IN"
},
"DO3": {
"direction": "OUT"
}
}
}

20
artix7/site_type_PMV2.json
View File

@ -1,14 +1,9 @@
{
"type": "PMV2",
"site_pips": {},
"site_pins": {
"ODIV2": {
"direction": "OUT"
},
"A1": {
"A0": {
"direction": "IN"
},
"A2": {
"EN": {
"direction": "IN"
},
"O": {
@ -17,11 +12,16 @@
"ODIV4": {
"direction": "OUT"
},
"EN": {
"A2": {
"direction": "IN"
},
"A0": {
"A1": {
"direction": "IN"
},
"ODIV2": {
"direction": "OUT"
}
}
},
"type": "PMV2",
"site_pips": {}
}

952
artix7/site_type_RAMB18E1.json
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File diff suppressed because it is too large Load Diff

2324
artix7/site_type_RAMBFIFO36E1.json
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File diff suppressed because it is too large Load Diff

1310
artix7/site_type_SLICEL.json
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File diff suppressed because it is too large Load Diff

1326
artix7/site_type_SLICEM.json
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File diff suppressed because it is too large Load Diff

52
artix7/site_type_STARTUP.json
View File

@ -1,45 +1,45 @@
{
"type": "STARTUP",
"site_pips": {},
"site_pins": {
"CFGCLK": {
"direction": "OUT"
},
"PREQ": {
"direction": "OUT"
},
"CLK": {
"direction": "IN"
},
"GTS": {
"direction": "IN"
},
"KEYCLEARB": {
"direction": "IN"
},
"USRCCLKO": {
"direction": "IN"
},
"USRCCLKTS": {
"direction": "IN"
},
"EOS": {
"direction": "OUT"
},
"GSR": {
"USRDONETS": {
"direction": "IN"
},
"PACK": {
"direction": "IN"
},
"USRDONETS": {
"GTS": {
"direction": "IN"
},
"CFGCLK": {
"direction": "OUT"
},
"CLK": {
"direction": "IN"
},
"GSR": {
"direction": "IN"
},
"USRDONEO": {
"direction": "IN"
},
"USRCCLKTS": {
"direction": "IN"
},
"USRCCLKO": {
"direction": "IN"
},
"KEYCLEARB": {
"direction": "IN"
},
"CFGMCLK": {
"direction": "OUT"
},
"USRDONEO": {
"direction": "IN"
}
}
},
"type": "STARTUP",
"site_pips": {}
}

6
artix7/site_type_TIEOFF.json
View File

@ -1,6 +1,4 @@
{
"type": "TIEOFF",
"site_pips": {},
"site_pins": {
"HARD1": {
"direction": "OUT"
@ -8,5 +6,7 @@
"HARD0": {
"direction": "OUT"
}
}
},
"type": "TIEOFF",
"site_pips": {}
}

174
artix7/site_type_USR_ACCESS.json
View File

@ -1,108 +1,108 @@
{
"type": "USR_ACCESS",
"site_pips": {},
"site_pins": {
"DATA12": {
"direction": "OUT"
},
"DATA27": {
"direction": "OUT"
},
"DATA30": {
"direction": "OUT"
},
"DATA11": {
"direction": "OUT"
},
"DATA3": {
"direction": "OUT"
},
"DATA21": {
"direction": "OUT"
},
"DATA22": {
"direction": "OUT"
},
"DATA18": {
"direction": "OUT"
},
"DATA20": {
"direction": "OUT"
},
"DATA7": {
"direction": "OUT"
},
"DATA13": {
"direction": "OUT"
},
"DATA29": {
"direction": "OUT"
},
"DATAVALID": {
"direction": "OUT"
},
"DATA19": {
"direction": "OUT"
},
"DATA23": {
"direction": "OUT"
},
"DATA15": {
"direction": "OUT"
},
"DATA28": {
"direction": "OUT"
},
"DATA5": {
"direction": "OUT"
},
"DATA31": {
"direction": "OUT"
},
"CFGCLK": {
"direction": "OUT"
},
"DATA26": {
"direction": "OUT"
},
"DATA10": {
"direction": "OUT"
},
"DATA6": {
"direction": "OUT"
},
"DATA25": {
"direction": "OUT"
},
"DATA8": {
"direction": "OUT"
},
"DATA2": {
"direction": "OUT"
},
"DATA14": {
"direction": "OUT"
},
"DATA4": {
"direction": "OUT"
},
"DATA16": {
"direction": "OUT"
},
"DATA1": {
"direction": "OUT"
},
"DATA26": {
"direction": "OUT"
},
"DATA7": {
"direction": "OUT"
},
"DATA2": {
"direction": "OUT"
},
"DATA12": {
"direction": "OUT"
},
"DATA11": {
"direction": "OUT"
},
"DATA19": {
"direction": "OUT"
},
"DATA0": {
"direction": "OUT"
},
"DATA17": {
"DATA15": {
"direction": "OUT"
},
"DATA9": {
"DATA31": {
"direction": "OUT"
},
"DATA28": {
"direction": "OUT"
},
"DATA10": {
"direction": "OUT"
},
"DATA24": {
"direction": "OUT"
},
"DATA1": {
"DATA3": {
"direction": "OUT"
},
"DATAVALID": {
"direction": "OUT"
},
"DATA17": {
"direction": "OUT"
},
"DATA25": {
"direction": "OUT"
},
"DATA13": {
"direction": "OUT"
},
"DATA27": {
"direction": "OUT"
},
"DATA9": {
"direction": "OUT"
},
"DATA29": {
"direction": "OUT"
},
"DATA18": {
"direction": "OUT"
},
"CFGCLK": {
"direction": "OUT"
},
"DATA6": {
"direction": "OUT"
},
"DATA23": {
"direction": "OUT"
},
"DATA8": {
"direction": "OUT"
},
"DATA22": {
"direction": "OUT"
},
"DATA21": {
"direction": "OUT"
},
"DATA14": {
"direction": "OUT"
},
"DATA30": {
"direction": "OUT"
},
"DATA4": {
"direction": "OUT"
},
"DATA20": {
"direction": "OUT"
}
}
},
"type": "USR_ACCESS",
"site_pips": {}
}

1204
artix7/site_type_XADC.json
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File diff suppressed because it is too large Load Diff

890
artix7/tile_type_BRAM_INT_INTERFACE_L.json
View File

@ -1,476 +1,476 @@
{
"wires": [
"INT_INTERFACE_BRAM_IMUX33",
"INT_INTERFACE_LOGIC_OUTS_L_B2",
"INT_INTERFACE_BYP5",
"INT_INTERFACE_BRAM_UTURN_IMUX24",
"INT_INTERFACE_BRAM_IMUX41",
"INT_INTERFACE_LOGIC_OUTS_L_B6",
"INT_INTERFACE_BRAM_IMUX4",
"INT_INTERFACE_NW4END2",
"INT_INTERFACE_NW4A1",
"INT_INTERFACE_BRAM_IMUX13",
"INT_INTERFACE_WW4B3",
"INT_INTERFACE_BYP4",
"INT_INTERFACE_BRAM_IMUX38",
"INT_INTERFACE_EE4B2",
"INT_INTERFACE_LOGIC_OUTS_L_B23",
"INT_INTERFACE_BRAM_UTURN_IMUX1",
"INT_INTERFACE_WW2END2",
"INT_INTERFACE_WL1END3",
"INT_INTERFACE_SE4C1",
"INT_INTERFACE_BRAM_UTURN_IMUX29",
"INT_INTERFACE_NW4END0",
"INT_INTERFACE_SE4C2",
"INT_INTERFACE_BRAM_IMUX7",
"INT_INTERFACE_LH10",
"INT_INTERFACE_NW4END1",
"INT_INTERFACE_LOGIC_OUTS_L_B1",
"INT_INTERFACE_BRAM_IMUX11",
"INT_INTERFACE_SW4A0",
"INT_INTERFACE_BRAM_IMUX21",
"INT_INTERFACE_BRAM_UTURN_IMUX34",
"INT_INTERFACE_LOGIC_OUTS_L_B22",
"INT_INTERFACE_LOGIC_OUTS_L_B5",
"INT_INTERFACE_EE4A1",
"INT_INTERFACE_EE2A1",
"INT_INTERFACE_LOGIC_OUTS_L19",
"INT_INTERFACE_BRAM_UTURN_IMUX35",
"INT_INTERFACE_LH1",
"INT_INTERFACE_BYP6",
"INT_INTERFACE_NE4BEG1",
"INT_INTERFACE_BRAM_IMUX6",
"INT_INTERFACE_BRAM_UTURN_IMUX25",
"INT_INTERFACE_FAN5",
"INT_INTERFACE_BRAM_UTURN_IMUX23",
"INT_INTERFACE_CLK0",
"INT_INTERFACE_LOGIC_OUTS_L22",
"INT_INTERFACE_BRAM_UTURN_IMUX44",
"INT_INTERFACE_BRAM_IMUX10",
"INT_INTERFACE_BYP3",
"INT_INTERFACE_NW2A1",
"INT_INTERFACE_EE2BEG1",
"INT_INTERFACE_EL1BEG2",
"INT_INTERFACE_LOGIC_OUTS_L4",
"INT_INTERFACE_BRAM_UTURN_IMUX30",
"INT_INTERFACE_LH6",
"INT_INTERFACE_SW4A3",
"INT_INTERFACE_BRAM_UTURN_IMUX41",
"INT_INTERFACE_SE4BEG1",
"INT_INTERFACE_BRAM_UTURN_IMUX4",
"INT_INTERFACE_LOGIC_OUTS_L_B18",
"INT_INTERFACE_BRAM_IMUX8",
"INT_INTERFACE_BRAM_UTURN_IMUX21",
"INT_INTERFACE_BRAM_IMUX14",
"INT_INTERFACE_LOGIC_OUTS_L13",
"INT_INTERFACE_NE4BEG2",
"INT_INTERFACE_BLOCK_OUTS_L_B2",
"INT_INTERFACE_BRAM_UTURN_IMUX6",
"INT_INTERFACE_BRAM_IMUX24",
"INT_INTERFACE_EE4C0",
"INT_INTERFACE_WW4A2",
"INT_INTERFACE_NE2A3",
"INT_INTERFACE_BRAM_IMUX22",
"INT_INTERFACE_LOGIC_OUTS_L1",
"INT_INTERFACE_BRAM_UTURN_IMUX20",
"INT_INTERFACE_EL1BEG3",
"INT_INTERFACE_NE2A0",
"INT_INTERFACE_EE4A3",
"INT_INTERFACE_NW2A2",
"INT_INTERFACE_FAN6",
"INT_INTERFACE_ER1BEG2",
"INT_INTERFACE_LOGIC_OUTS_L5",
"INT_INTERFACE_EE4C2",
"INT_INTERFACE_LOGIC_OUTS_L3",
"INT_INTERFACE_SW2A0",
"INT_INTERFACE_LOGIC_OUTS_L7",
"INT_INTERFACE_BRAM_IMUX19",
"INT_INTERFACE_LOGIC_OUTS_L0",
"INT_INTERFACE_NE4C3",
"INT_INTERFACE_LOGIC_OUTS_L_B7",
"INT_INTERFACE_WW2END1",
"INT_INTERFACE_MONITOR_N",
"INT_INTERFACE_LOGIC_OUTS_L_B9",
"INT_INTERFACE_BRAM_IMUX17",
"INT_INTERFACE_EE2A0",
"L_INT_INTER_DQS_IOTOPHASER",
"INT_INTERFACE_BRAM_UTURN_IMUX7",
"INT_INTERFACE_BRAM_UTURN_IMUX33",
"INT_INTERFACE_BRAM_IMUX26",
"INT_INTERFACE_LOGIC_OUTS_L_B15",
"INT_INTERFACE_BRAM_IMUX44",
"INT_INTERFACE_NW2A0",
"INT_INTERFACE_BRAM_IMUX39",
"INT_INTERFACE_EE4C3",
"INT_INTERFACE_LH4",
"INT_INTERFACE_BRAM_UTURN_IMUX31",
"INT_INTERFACE_WR1END2",
"INT_INTERFACE_FAN2",
"INT_INTERFACE_PHASER_TO_IO_OCLKDIV",
"INT_INTERFACE_LOGIC_OUTS_L21",
"INT_INTERFACE_BRAM_IMUX12",
"INT_INTERFACE_BRAM_UTURN_IMUX32",
"INT_INTERFACE_WW2A0",
"INT_INTERFACE_BRAM_IMUX28",
"INT_INTERFACE_NW4A0",
"INT_INTERFACE_SE4BEG2",
"INT_INTERFACE_BRAM_IMUX27",
"INT_INTERFACE_LOGIC_OUTS_L18",
"INT_INTERFACE_BRAM_UTURN_IMUX22",
"INT_INTERFACE_LOGIC_OUTS_L14",
"INT_INTERFACE_LOGIC_OUTS_L_B20",
"INT_INTERFACE_LOGIC_OUTS_L11",
"INT_INTERFACE_SW4END0",
"INT_INTERFACE_BRAM_UTURN_IMUX27",
"INT_INTERFACE_BRAM_UTURN_IMUX5",
"INT_INTERFACE_WW2A1",
"INT_INTERFACE_SW4END3",
"INT_INTERFACE_SE4C3",
"INT_INTERFACE_NE4C0",
"INT_INTERFACE_WL1END0",
"INT_INTERFACE_BYP1",
"INT_INTERFACE_BRAM_IMUX23",
"INT_INTERFACE_WR1END3",
"INT_INTERFACE_LOGIC_OUTS_L_B19",
"INT_INTERFACE_WW4C3",
"INT_INTERFACE_LH8",
"INT_INTERFACE_BRAM_UTURN_IMUX46",
"INT_INTERFACE_FAN1",
"INT_INTERFACE_LOGIC_OUTS_L23",
"INT_INTERFACE_EE4BEG0",
"INT_INTERFACE_CLK1",
"INT_INTERFACE_SE4BEG0",
"INT_INTERFACE_LOGIC_OUTS_L_B14",
"INT_INTERFACE_BRAM_UTURN_IMUX16",
"INT_INTERFACE_LOGIC_OUTS_L_B17",
"INT_INTERFACE_BRAM_IMUX46",
"INT_INTERFACE_BRAM_IMUX16",
"INT_INTERFACE_LOGIC_OUTS_L8",
"INT_INTERFACE_WW4END2",
"INT_INTERFACE_NE4BEG3",
"INT_INTERFACE_BRAM_UTURN_IMUX15",
"INT_INTERFACE_WW2A3",
"INT_INTERFACE_BRAM_UTURN_IMUX37",
"INT_INTERFACE_BRAM_IMUX42",
"INT_INTERFACE_LH7",
"INT_INTERFACE_ER1BEG3",
"INT_INTERFACE_SW2A3",
"INT_INTERFACE_LOGIC_OUTS_L20",
"INT_INTERFACE_SW2A2",
"INT_INTERFACE_BRAM_UTURN_IMUX3",
"INT_INTERFACE_BRAM_IMUX18",
"INT_INTERFACE_LH5",
"INT_INTERFACE_SW4END2",
"INT_INTERFACE_PHASER_TO_IO_OCLK",
"INT_INTERFACE_FAN3",
"INT_INTERFACE_NW4A2",
"INT_INTERFACE_BRAM_UTURN_IMUX28",
"INT_INTERFACE_SW4A1",
"INT_INTERFACE_BRAM_IMUX35",
"INT_INTERFACE_EE4BEG3",
"INT_INTERFACE_BRAM_IMUX20",
"INT_INTERFACE_LOGIC_OUTS_L_B4",
"INT_INTERFACE_LOGIC_OUTS_L2",
"INT_INTERFACE_SE2A1",
"INT_INTERFACE_WL1END1",
"INT_INTERFACE_BYP2",
"INT_INTERFACE_NE4C2",
"INT_INTERFACE_BRAM_IMUX30",
"INT_INTERFACE_BRAM_UTURN_IMUX38",
"INT_INTERFACE_BRAM_IMUX32",
"INT_INTERFACE_WR1END1",
"INT_INTERFACE_EE2BEG2",
"INT_INTERFACE_NW4A3",
"INT_INTERFACE_MONITOR_P",
"INT_INTERFACE_EE4B0",
"INT_INTERFACE_WR1END0",
"INT_INTERFACE_BRAM_IMUX5",
"INT_INTERFACE_BRAM_UTURN_IMUX36",
"INT_INTERFACE_CTRL1",
"INT_INTERFACE_BRAM_IMUX36",
"INT_INTERFACE_EL1BEG0",
"INT_INTERFACE_NE2A2",
"INT_INTERFACE_BRAM_IMUX9",
"INT_INTERFACE_LOGIC_OUTS_L10",
"INT_INTERFACE_EE2BEG3",
"INT_INTERFACE_WW4A3",
"INT_INTERFACE_NW2A3",
"INT_INTERFACE_EE2BEG0",
"INT_INTERFACE_CTRL0",
"INT_INTERFACE_ER1BEG0",
"INT_INTERFACE_LOGIC_OUTS_L_B13",
"INT_INTERFACE_WW2END3",
"INT_INTERFACE_LH2",
"INT_INTERFACE_BRAM_UTURN_IMUX18",
"INT_INTERFACE_BRAM_UTURN_IMUX11",
"INT_INTERFACE_BRAM_UTURN_IMUX19",
"INT_INTERFACE_WW4END0",
"INT_INTERFACE_SE4BEG3",
"INT_INTERFACE_BRAM_UTURN_IMUX10",
"INT_INTERFACE_WW4B1",
"INT_INTERFACE_EE4A2",
"INT_INTERFACE_SE2A2",
"INT_INTERFACE_BRAM_UTURN_IMUX12",
"INT_INTERFACE_BRAM_UTURN_IMUX39",
"INT_INTERFACE_WW4C0",
"INT_INTERFACE_BRAM_IMUX2",
"INT_INTERFACE_EE4C1",
"INT_INTERFACE_NE4BEG0",
"INT_INTERFACE_BRAM_IMUX45",
"INT_INTERFACE_PHASER_TO_IO_OCLK1X_90",
"INT_INTERFACE_EL1BEG1",
"INT_INTERFACE_BRAM_UTURN_IMUX42",
"INT_INTERFACE_BYP7",
"INT_INTERFACE_BRAM_IMUX40",
"INT_INTERFACE_LH12",
"INT_INTERFACE_BRAM_IMUX0",
"INT_INTERFACE_LH9",
"INT_INTERFACE_BRAM_UTURN_IMUX47",
"INT_INTERFACE_LOGIC_OUTS_L_B10",
"INT_INTERFACE_LOGIC_OUTS_L6",
"INT_INTERFACE_LOGIC_OUTS_L_B12",
"INT_INTERFACE_SW2A1",
"INT_INTERFACE_BLOCK_OUTS_L_B0",
"INT_INTERFACE_NW4END3",
"INT_INTERFACE_BRAM_UTURN_IMUX43",
"INT_INTERFACE_PHASER_TO_IO_ICLKDIV",
"INT_INTERFACE_BRAM_IMUX1",
"INT_INTERFACE_BRAM_UTURN_IMUX40",
"INT_INTERFACE_NE4C1",
"INT_INTERFACE_WW4END1",
"INT_INTERFACE_WL1END2",
"INT_INTERFACE_WW4C2",
"INT_INTERFACE_LOGIC_OUTS_L12",
"INT_INTERFACE_LOGIC_OUTS_L_B21",
"INT_INTERFACE_LOGIC_OUTS_L_B0",
"INT_INTERFACE_BRAM_IMUX31",
"INT_INTERFACE_BRAM_IMUX15",
"INT_INTERFACE_LOGIC_OUTS_L_B3",
"INT_INTERFACE_WW2A2",
"INT_INTERFACE_WW4END3",
"INT_INTERFACE_LH11",
"INT_INTERFACE_BRAM_UTURN_IMUX17",
"INT_INTERFACE_SE2A3",
"INT_INTERFACE_LOGIC_OUTS_L_B16",
"INT_INTERFACE_WW4C1",
"INT_INTERFACE_LOGIC_OUTS_L_B11",
"INT_INTERFACE_SE2A0",
"INT_INTERFACE_EE2A3",
"INT_INTERFACE_EE4BEG1",
"INT_INTERFACE_SW4A2",
"INT_INTERFACE_BRAM_IMUX3",
"INT_INTERFACE_EE4B3",
"INT_INTERFACE_BRAM_IMUX34",
"INT_INTERFACE_SE4C0",
"INT_INTERFACE_LOGIC_OUTS_L15",
"INT_INTERFACE_BRAM_UTURN_IMUX13",
"INT_INTERFACE_BLOCK_OUTS_L_B1",
"INT_INTERFACE_BRAM_IMUX47",
"INT_INTERFACE_EE2A2",
"INT_INTERFACE_BRAM_UTURN_IMUX0",
"INT_INTERFACE_LOGIC_OUTS_L_B8",
"INT_INTERFACE_EE4A0",
"INT_INTERFACE_BRAM_UTURN_IMUX45",
"INT_INTERFACE_EE4BEG2",
"INT_INTERFACE_FAN7",
"INT_INTERFACE_BRAM_UTURN_IMUX9",
"INT_INTERFACE_WW4B2",
"INT_INTERFACE_NE2A1",
"INT_INTERFACE_PHASER_TO_IO_ICLK",
"INT_INTERFACE_LOGIC_OUTS_L16",
"INT_INTERFACE_WW4B0",
"INT_INTERFACE_BYP0",
"INT_INTERFACE_EE4B1",
"INT_INTERFACE_BRAM_IMUX29",
"INT_INTERFACE_BRAM_IMUX25",
"INT_INTERFACE_BRAM_UTURN_IMUX14",
"INT_INTERFACE_FAN4",
"INT_INTERFACE_BRAM_UTURN_IMUX26",
"INT_INTERFACE_FAN0",
"INT_INTERFACE_BLOCK_OUTS_L_B3",
"INT_INTERFACE_ER1BEG1",
"INT_INTERFACE_BRAM_UTURN_IMUX8",
"INT_INTERFACE_BRAM_IMUX43",
"INT_INTERFACE_LOGIC_OUTS_L17",
"INT_INTERFACE_BRAM_IMUX37",
"INT_INTERFACE_SW4END1",
"INT_INTERFACE_WW2END0",
"INT_INTERFACE_LH3",
"INT_INTERFACE_WW4A1",
"INT_INTERFACE_WW4A0",
"INT_INTERFACE_BRAM_UTURN_IMUX2",
"INT_INTERFACE_LOGIC_OUTS_L9"
],
"sites": [],
"pips": {
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B22->>INT_INTERFACE_LOGIC_OUTS_L22": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L22",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B22",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B16->>INT_INTERFACE_LOGIC_OUTS_L16": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L16",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B16",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B8->>INT_INTERFACE_LOGIC_OUTS_L8": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L8",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B8",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B11->>INT_INTERFACE_LOGIC_OUTS_L11": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L11",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B11",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B2->>INT_INTERFACE_LOGIC_OUTS_L2": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L2",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B2",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B12->>INT_INTERFACE_LOGIC_OUTS_L12": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L12",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B12",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B20->>INT_INTERFACE_LOGIC_OUTS_L20": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L20",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B20",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B23->>INT_INTERFACE_LOGIC_OUTS_L23": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L23",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B23",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B21->>INT_INTERFACE_LOGIC_OUTS_L21": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L21",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B21",
"can_invert": "0"
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B1->>INT_INTERFACE_LOGIC_OUTS_L1": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L1",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B1",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B0->>INT_INTERFACE_LOGIC_OUTS_L0": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L0",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B0",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B17->>INT_INTERFACE_LOGIC_OUTS_L17": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L17",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B17",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B15->>INT_INTERFACE_LOGIC_OUTS_L15": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L15",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B15",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B5->>INT_INTERFACE_LOGIC_OUTS_L5": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L5",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B5",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B4->>INT_INTERFACE_LOGIC_OUTS_L4": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L4",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B4",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B7->>INT_INTERFACE_LOGIC_OUTS_L7": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L7",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B7",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B13->>INT_INTERFACE_LOGIC_OUTS_L13": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L13",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B13",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B14->>INT_INTERFACE_LOGIC_OUTS_L14": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L14",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B14",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B18->>INT_INTERFACE_LOGIC_OUTS_L18": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L18",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B18",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B3->>INT_INTERFACE_LOGIC_OUTS_L3": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L3",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B3",
"can_invert": "0"
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B6->>INT_INTERFACE_LOGIC_OUTS_L6": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L6",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B6",
"can_invert": "0"
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B21->>INT_INTERFACE_LOGIC_OUTS_L21": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L21",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B21",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B9->>INT_INTERFACE_LOGIC_OUTS_L9": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L9",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B9",
"can_invert": "0"
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B10->>INT_INTERFACE_LOGIC_OUTS_L10": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L10",
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B12->>INT_INTERFACE_LOGIC_OUTS_L12": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L12",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B10",
"can_invert": "0"
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B12",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B3->>INT_INTERFACE_LOGIC_OUTS_L3": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L3",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B3",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B22->>INT_INTERFACE_LOGIC_OUTS_L22": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L22",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B22",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B18->>INT_INTERFACE_LOGIC_OUTS_L18": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L18",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B18",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B19->>INT_INTERFACE_LOGIC_OUTS_L19": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L19",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B19",
"can_invert": "0"
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B13->>INT_INTERFACE_LOGIC_OUTS_L13": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L13",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B13",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B0->>INT_INTERFACE_LOGIC_OUTS_L0": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L0",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B0",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B8->>INT_INTERFACE_LOGIC_OUTS_L8": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L8",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B8",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B23->>INT_INTERFACE_LOGIC_OUTS_L23": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L23",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B23",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B5->>INT_INTERFACE_LOGIC_OUTS_L5": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L5",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B5",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B4->>INT_INTERFACE_LOGIC_OUTS_L4": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L4",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B4",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B7->>INT_INTERFACE_LOGIC_OUTS_L7": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L7",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B7",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B16->>INT_INTERFACE_LOGIC_OUTS_L16": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L16",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B16",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B17->>INT_INTERFACE_LOGIC_OUTS_L17": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L17",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B17",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B15->>INT_INTERFACE_LOGIC_OUTS_L15": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L15",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B15",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B14->>INT_INTERFACE_LOGIC_OUTS_L14": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L14",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B14",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B20->>INT_INTERFACE_LOGIC_OUTS_L20": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L20",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B20",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B10->>INT_INTERFACE_LOGIC_OUTS_L10": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L10",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B10",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B11->>INT_INTERFACE_LOGIC_OUTS_L11": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L11",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B11",
"is_pseudo": "0"
}
},
"wires": [
"INT_INTERFACE_LH10",
"INT_INTERFACE_LOGIC_OUTS_L18",
"INT_INTERFACE_BRAM_UTURN_IMUX17",
"INT_INTERFACE_SE4C0",
"INT_INTERFACE_LOGIC_OUTS_L_B15",
"INT_INTERFACE_EE4BEG1",
"INT_INTERFACE_BRAM_UTURN_IMUX19",
"INT_INTERFACE_EL1BEG3",
"INT_INTERFACE_BRAM_UTURN_IMUX12",
"INT_INTERFACE_BRAM_UTURN_IMUX15",
"INT_INTERFACE_NE4BEG0",
"INT_INTERFACE_BRAM_IMUX12",
"INT_INTERFACE_BRAM_IMUX7",
"INT_INTERFACE_WW2A0",
"INT_INTERFACE_BRAM_IMUX18",
"INT_INTERFACE_EE2A3",
"INT_INTERFACE_FAN5",
"INT_INTERFACE_BRAM_UTURN_IMUX10",
"INT_INTERFACE_WW4C3",
"INT_INTERFACE_BRAM_IMUX30",
"INT_INTERFACE_BRAM_UTURN_IMUX28",
"INT_INTERFACE_BRAM_UTURN_IMUX29",
"INT_INTERFACE_BRAM_UTURN_IMUX27",
"INT_INTERFACE_BRAM_IMUX10",
"INT_INTERFACE_BRAM_IMUX23",
"INT_INTERFACE_BLOCK_OUTS_L_B1",
"INT_INTERFACE_BRAM_UTURN_IMUX45",
"INT_INTERFACE_WW2END0",
"INT_INTERFACE_NW2A0",
"INT_INTERFACE_BRAM_IMUX25",
"INT_INTERFACE_BYP3",
"INT_INTERFACE_EE4B2",
"INT_INTERFACE_LOGIC_OUTS_L_B2",
"INT_INTERFACE_LOGIC_OUTS_L0",
"INT_INTERFACE_BRAM_UTURN_IMUX39",
"INT_INTERFACE_NW2A3",
"INT_INTERFACE_BRAM_UTURN_IMUX32",
"INT_INTERFACE_BRAM_UTURN_IMUX25",
"INT_INTERFACE_BRAM_IMUX28",
"INT_INTERFACE_BRAM_UTURN_IMUX38",
"INT_INTERFACE_BLOCK_OUTS_L_B0",
"INT_INTERFACE_EL1BEG1",
"INT_INTERFACE_LOGIC_OUTS_L_B21",
"INT_INTERFACE_BRAM_IMUX32",
"INT_INTERFACE_BRAM_UTURN_IMUX24",
"INT_INTERFACE_LH11",
"INT_INTERFACE_EE4B0",
"INT_INTERFACE_BRAM_IMUX34",
"INT_INTERFACE_BRAM_IMUX20",
"INT_INTERFACE_BRAM_IMUX0",
"INT_INTERFACE_BRAM_IMUX9",
"INT_INTERFACE_BRAM_IMUX1",
"INT_INTERFACE_ER1BEG0",
"INT_INTERFACE_BRAM_UTURN_IMUX6",
"INT_INTERFACE_LOGIC_OUTS_L_B23",
"INT_INTERFACE_BRAM_UTURN_IMUX21",
"INT_INTERFACE_WW4B2",
"INT_INTERFACE_NE4BEG3",
"INT_INTERFACE_BRAM_IMUX43",
"INT_INTERFACE_LOGIC_OUTS_L22",
"INT_INTERFACE_BYP6",
"INT_INTERFACE_WW4B0",
"INT_INTERFACE_BRAM_IMUX21",
"INT_INTERFACE_LH2",
"INT_INTERFACE_BRAM_IMUX4",
"INT_INTERFACE_NE2A3",
"INT_INTERFACE_LOGIC_OUTS_L11",
"INT_INTERFACE_SE4C1",
"INT_INTERFACE_BRAM_IMUX24",
"INT_INTERFACE_WL1END1",
"INT_INTERFACE_NW4A0",
"INT_INTERFACE_BRAM_UTURN_IMUX35",
"INT_INTERFACE_LOGIC_OUTS_L_B8",
"INT_INTERFACE_WW4END2",
"INT_INTERFACE_BRAM_IMUX47",
"INT_INTERFACE_BRAM_UTURN_IMUX47",
"INT_INTERFACE_NE4C3",
"INT_INTERFACE_LOGIC_OUTS_L23",
"INT_INTERFACE_EE4C0",
"INT_INTERFACE_BRAM_UTURN_IMUX40",
"INT_INTERFACE_BRAM_IMUX38",
"INT_INTERFACE_SW4END3",
"INT_INTERFACE_LOGIC_OUTS_L13",
"INT_INTERFACE_SW4END2",
"INT_INTERFACE_BRAM_IMUX13",
"INT_INTERFACE_BRAM_UTURN_IMUX43",
"INT_INTERFACE_LOGIC_OUTS_L8",
"INT_INTERFACE_FAN6",
"INT_INTERFACE_LOGIC_OUTS_L21",
"INT_INTERFACE_BRAM_IMUX19",
"INT_INTERFACE_EE2A0",
"INT_INTERFACE_LOGIC_OUTS_L3",
"INT_INTERFACE_BRAM_UTURN_IMUX8",
"INT_INTERFACE_LOGIC_OUTS_L1",
"INT_INTERFACE_BRAM_IMUX27",
"INT_INTERFACE_BRAM_UTURN_IMUX11",
"INT_INTERFACE_BRAM_IMUX29",
"INT_INTERFACE_LH7",
"INT_INTERFACE_LOGIC_OUTS_L9",
"INT_INTERFACE_LOGIC_OUTS_L_B3",
"INT_INTERFACE_LOGIC_OUTS_L_B14",
"INT_INTERFACE_WW4END3",
"INT_INTERFACE_SW4A2",
"INT_INTERFACE_SW4A1",
"INT_INTERFACE_BRAM_UTURN_IMUX23",
"INT_INTERFACE_BRAM_IMUX16",
"INT_INTERFACE_SE2A1",
"INT_INTERFACE_LOGIC_OUTS_L20",
"INT_INTERFACE_LH6",
"INT_INTERFACE_BRAM_UTURN_IMUX9",
"INT_INTERFACE_LH5",
"INT_INTERFACE_BRAM_IMUX40",
"L_INT_INTER_DQS_IOTOPHASER",
"INT_INTERFACE_WW4A0",
"INT_INTERFACE_SE4BEG2",
"INT_INTERFACE_NW4A2",
"INT_INTERFACE_LOGIC_OUTS_L_B1",
"INT_INTERFACE_BRAM_IMUX35",
"INT_INTERFACE_LOGIC_OUTS_L_B20",
"INT_INTERFACE_BRAM_IMUX45",
"INT_INTERFACE_WR1END3",
"INT_INTERFACE_BRAM_IMUX39",
"INT_INTERFACE_EE4C1",
"INT_INTERFACE_FAN7",
"INT_INTERFACE_EE4BEG0",
"INT_INTERFACE_BRAM_IMUX15",
"INT_INTERFACE_BRAM_IMUX46",
"INT_INTERFACE_SW2A1",
"INT_INTERFACE_BRAM_UTURN_IMUX46",
"INT_INTERFACE_LOGIC_OUTS_L_B13",
"INT_INTERFACE_LOGIC_OUTS_L_B16",
"INT_INTERFACE_LH8",
"INT_INTERFACE_BRAM_UTURN_IMUX42",
"INT_INTERFACE_LH9",
"INT_INTERFACE_SE2A2",
"INT_INTERFACE_SW4A3",
"INT_INTERFACE_SE2A3",
"INT_INTERFACE_NW4END2",
"INT_INTERFACE_EE4C3",
"INT_INTERFACE_EE2A1",
"INT_INTERFACE_SE4BEG1",
"INT_INTERFACE_NW4END1",
"INT_INTERFACE_WL1END3",
"INT_INTERFACE_LOGIC_OUTS_L17",
"INT_INTERFACE_PHASER_TO_IO_ICLK",
"INT_INTERFACE_NE4C0",
"INT_INTERFACE_WR1END2",
"INT_INTERFACE_LOGIC_OUTS_L4",
"INT_INTERFACE_BRAM_IMUX33",
"INT_INTERFACE_NW4A3",
"INT_INTERFACE_WR1END0",
"INT_INTERFACE_BRAM_UTURN_IMUX18",
"INT_INTERFACE_BRAM_UTURN_IMUX33",
"INT_INTERFACE_NE2A0",
"INT_INTERFACE_EE4BEG3",
"INT_INTERFACE_ER1BEG2",
"INT_INTERFACE_LOGIC_OUTS_L_B0",
"INT_INTERFACE_BRAM_IMUX5",
"INT_INTERFACE_LOGIC_OUTS_L_B9",
"INT_INTERFACE_WW2END1",
"INT_INTERFACE_BRAM_IMUX3",
"INT_INTERFACE_LOGIC_OUTS_L_B22",
"INT_INTERFACE_BRAM_UTURN_IMUX4",
"INT_INTERFACE_EE4A1",
"INT_INTERFACE_LOGIC_OUTS_L_B19",
"INT_INTERFACE_WW2A1",
"INT_INTERFACE_LH3",
"INT_INTERFACE_WL1END0",
"INT_INTERFACE_WR1END1",
"INT_INTERFACE_WW4B1",
"INT_INTERFACE_BRAM_UTURN_IMUX7",
"INT_INTERFACE_BYP7",
"INT_INTERFACE_PHASER_TO_IO_OCLKDIV",
"INT_INTERFACE_WW4C0",
"INT_INTERFACE_SW2A0",
"INT_INTERFACE_LOGIC_OUTS_L_B18",
"INT_INTERFACE_SE4BEG3",
"INT_INTERFACE_LH1",
"INT_INTERFACE_WW4B3",
"INT_INTERFACE_BRAM_IMUX41",
"INT_INTERFACE_BRAM_UTURN_IMUX22",
"INT_INTERFACE_WW4A1",
"INT_INTERFACE_BRAM_IMUX31",
"INT_INTERFACE_ER1BEG1",
"INT_INTERFACE_LOGIC_OUTS_L14",
"INT_INTERFACE_SW4A0",
"INT_INTERFACE_NW4A1",
"INT_INTERFACE_EL1BEG0",
"INT_INTERFACE_LOGIC_OUTS_L15",
"INT_INTERFACE_LH4",
"INT_INTERFACE_BRAM_UTURN_IMUX34",
"INT_INTERFACE_PHASER_TO_IO_OCLK",
"INT_INTERFACE_BRAM_IMUX6",
"INT_INTERFACE_WW4A3",
"INT_INTERFACE_LOGIC_OUTS_L_B5",
"INT_INTERFACE_LOGIC_OUTS_L12",
"INT_INTERFACE_NE2A2",
"INT_INTERFACE_PHASER_TO_IO_ICLKDIV",
"INT_INTERFACE_WW2END2",
"INT_INTERFACE_LOGIC_OUTS_L_B11",
"INT_INTERFACE_LOGIC_OUTS_L19",
"INT_INTERFACE_WW4A2",
"INT_INTERFACE_WL1END2",
"INT_INTERFACE_EE4A3",
"INT_INTERFACE_BYP2",
"INT_INTERFACE_NE4BEG1",
"INT_INTERFACE_BYP0",
"INT_INTERFACE_EE4BEG2",
"INT_INTERFACE_FAN0",
"INT_INTERFACE_WW2A3",
"INT_INTERFACE_NW4END3",
"INT_INTERFACE_LH12",
"INT_INTERFACE_LOGIC_OUTS_L10",
"INT_INTERFACE_BRAM_UTURN_IMUX1",
"INT_INTERFACE_BRAM_UTURN_IMUX16",
"INT_INTERFACE_SW4END1",
"INT_INTERFACE_WW4C2",
"INT_INTERFACE_NE4BEG2",
"INT_INTERFACE_BRAM_UTURN_IMUX37",
"INT_INTERFACE_LOGIC_OUTS_L2",
"INT_INTERFACE_BRAM_IMUX36",
"INT_INTERFACE_CTRL0",
"INT_INTERFACE_ER1BEG3",
"INT_INTERFACE_BRAM_IMUX22",
"INT_INTERFACE_BYP5",
"INT_INTERFACE_LOGIC_OUTS_L_B10",
"INT_INTERFACE_SW2A2",
"INT_INTERFACE_CTRL1",
"INT_INTERFACE_NE2A1",
"INT_INTERFACE_EE2BEG3",
"INT_INTERFACE_NW4END0",
"INT_INTERFACE_NW2A2",
"INT_INTERFACE_WW2END3",
"INT_INTERFACE_BRAM_IMUX42",
"INT_INTERFACE_BRAM_UTURN_IMUX36",
"INT_INTERFACE_EE4C2",
"INT_INTERFACE_EE2BEG1",
"INT_INTERFACE_CLK1",
"INT_INTERFACE_FAN3",
"INT_INTERFACE_WW4C1",
"INT_INTERFACE_BYP1",
"INT_INTERFACE_LOGIC_OUTS_L5",
"INT_INTERFACE_LOGIC_OUTS_L16",
"INT_INTERFACE_BRAM_UTURN_IMUX31",
"INT_INTERFACE_EL1BEG2",
"INT_INTERFACE_BRAM_UTURN_IMUX26",
"INT_INTERFACE_BYP4",
"INT_INTERFACE_LOGIC_OUTS_L_B17",
"INT_INTERFACE_BRAM_UTURN_IMUX2",
"INT_INTERFACE_MONITOR_P",
"INT_INTERFACE_NW2A1",
"INT_INTERFACE_WW2A2",
"INT_INTERFACE_BRAM_UTURN_IMUX13",
"INT_INTERFACE_SE2A0",
"INT_INTERFACE_BRAM_UTURN_IMUX20",
"INT_INTERFACE_BRAM_UTURN_IMUX14",
"INT_INTERFACE_NE4C2",
"INT_INTERFACE_FAN1",
"INT_INTERFACE_EE4B1",
"INT_INTERFACE_SW2A3",
"INT_INTERFACE_EE2A2",
"INT_INTERFACE_LOGIC_OUTS_L_B12",
"INT_INTERFACE_BRAM_UTURN_IMUX0",
"INT_INTERFACE_SE4C3",
"INT_INTERFACE_EE2BEG2",
"INT_INTERFACE_BRAM_IMUX26",
"INT_INTERFACE_BRAM_IMUX11",
"INT_INTERFACE_EE2BEG0",
"INT_INTERFACE_BRAM_UTURN_IMUX41",
"INT_INTERFACE_LOGIC_OUTS_L6",
"INT_INTERFACE_PHASER_TO_IO_OCLK1X_90",
"INT_INTERFACE_LOGIC_OUTS_L_B4",
"INT_INTERFACE_SE4BEG0",
"INT_INTERFACE_SE4C2",
"INT_INTERFACE_BRAM_IMUX44",
"INT_INTERFACE_WW4END1",
"INT_INTERFACE_BRAM_IMUX17",
"INT_INTERFACE_FAN4",
"INT_INTERFACE_BRAM_IMUX2",
"INT_INTERFACE_BRAM_UTURN_IMUX3",
"INT_INTERFACE_LOGIC_OUTS_L_B6",
"INT_INTERFACE_BLOCK_OUTS_L_B3",
"INT_INTERFACE_MONITOR_N",
"INT_INTERFACE_BRAM_IMUX14",
"INT_INTERFACE_BRAM_UTURN_IMUX44",
"INT_INTERFACE_BRAM_UTURN_IMUX30",
"INT_INTERFACE_BLOCK_OUTS_L_B2",
"INT_INTERFACE_BRAM_IMUX37",
"INT_INTERFACE_BRAM_UTURN_IMUX5",
"INT_INTERFACE_SW4END0",
"INT_INTERFACE_WW4END0",
"INT_INTERFACE_EE4B3",
"INT_INTERFACE_EE4A0",
"INT_INTERFACE_LOGIC_OUTS_L7",
"INT_INTERFACE_CLK0",
"INT_INTERFACE_NE4C1",
"INT_INTERFACE_FAN2",
"INT_INTERFACE_LOGIC_OUTS_L_B7",
"INT_INTERFACE_EE4A2",
"INT_INTERFACE_BRAM_IMUX8"
],
"tile_type": "BRAM_INT_INTERFACE_L",
"sites": []
"tile_type": "BRAM_INT_INTERFACE_L"
}

914
artix7/tile_type_BRAM_INT_INTERFACE_R.json
View File

@ -1,476 +1,476 @@
{
"wires": [
"INT_INTERFACE_BRAM_IMUX33",
"INT_INTERFACE_BYP5",
"INT_INTERFACE_BRAM_IMUX41",
"INT_INTERFACE_BRAM_IMUX4",
"INT_INTERFACE_NW4END2",
"INT_INTERFACE_LOGIC_OUTS_B7",
"INT_INTERFACE_NW4A1",
"INT_INTERFACE_BRAM_IMUX13",
"INT_INTERFACE_WW4B3",
"INT_INTERFACE_BYP4",
"INT_INTERFACE_BRAM_IMUX38",
"INT_INTERFACE_EE4B2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX5",
"INT_INTERFACE_WW2END2",
"INT_INTERFACE_WL1END3",
"INT_INTERFACE_LOGIC_OUTS17",
"INT_INTERFACE_SE4C1",
"INT_INTERFACE_NW4END0",
"INT_INTERFACE_SE4C2",
"INT_INTERFACE_BRAM_IMUX7",
"INT_INTERFACE_LOGIC_OUTS16",
"INT_INTERFACE_LH10",
"INT_INTERFACE_NW4END1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX35",
"INT_INTERFACE_BRAM_UTURN_R_IMUX10",
"INT_INTERFACE_BRAM_IMUX11",
"INT_INTERFACE_SW4A0",
"INT_INTERFACE_BRAM_IMUX21",
"INT_INTERFACE_BRAM_UTURN_R_IMUX0",
"INT_INTERFACE_BLOCK_OUTS_B0",
"INT_INTERFACE_EE4A1",
"INT_INTERFACE_EE2A1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX8",
"INT_INTERFACE_LH1",
"INT_INTERFACE_BYP6",
"INT_INTERFACE_NE4BEG1",
"INT_INTERFACE_BRAM_IMUX6",
"INT_INTERFACE_FAN5",
"INT_INTERFACE_BRAM_UTURN_R_IMUX39",
"INT_INTERFACE_BRAM_UTURN_R_IMUX40",
"INT_INTERFACE_BRAM_UTURN_R_IMUX36",
"INT_INTERFACE_LOGIC_OUTS10",
"INT_INTERFACE_CLK0",
"INT_INTERFACE_BRAM_IMUX10",
"INT_INTERFACE_LOGIC_OUTS7",
"INT_INTERFACE_BRAM_UTURN_R_IMUX3",
"INT_INTERFACE_BYP3",
"INT_INTERFACE_LOGIC_OUTS_B1",
"INT_INTERFACE_NW2A1",
"INT_INTERFACE_EE2BEG1",
"INT_INTERFACE_LOGIC_OUTS_B17",
"INT_INTERFACE_EL1BEG2",
"INT_INTERFACE_LOGIC_OUTS5",
"INT_INTERFACE_LH6",
"INT_INTERFACE_SW4A3",
"INT_INTERFACE_BLOCK_OUTS_B2",
"INT_INTERFACE_SE4BEG1",
"INT_INTERFACE_BRAM_IMUX8",
"INT_INTERFACE_BRAM_UTURN_R_IMUX38",
"INT_INTERFACE_LOGIC_OUTS_B9",
"INT_INTERFACE_BRAM_IMUX14",
"INT_INTERFACE_BRAM_UTURN_R_IMUX1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX7",
"INT_INTERFACE_NE4BEG2",
"INT_INTERFACE_LOGIC_OUTS_B18",
"INT_INTERFACE_BRAM_UTURN_R_IMUX21",
"INT_INTERFACE_BRAM_IMUX24",
"INT_INTERFACE_EE4C0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX11",
"INT_INTERFACE_LOGIC_OUTS_B21",
"INT_INTERFACE_WW4A2",
"INT_INTERFACE_LOGIC_OUTS_B10",
"INT_INTERFACE_LOGIC_OUTS21",
"INT_INTERFACE_NE2A3",
"INT_INTERFACE_BRAM_IMUX22",
"INT_INTERFACE_LOGIC_OUTS_B3",
"INT_INTERFACE_EL1BEG3",
"INT_INTERFACE_NE2A0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX9",
"INT_INTERFACE_EE4A3",
"INT_INTERFACE_LOGIC_OUTS_B22",
"INT_INTERFACE_NW2A2",
"INT_INTERFACE_FAN6",
"INT_INTERFACE_ER1BEG2",
"INT_INTERFACE_EE4C2",
"INT_INTERFACE_SW2A0",
"INT_INTERFACE_BRAM_IMUX19",
"INT_INTERFACE_NE4C3",
"INT_INTERFACE_WW2END1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX2",
"INT_INTERFACE_LOGIC_OUTS_B0",
"INT_INTERFACE_MONITOR_N",
"INT_INTERFACE_BRAM_IMUX17",
"INT_INTERFACE_EE2A0",
"L_INT_INTER_DQS_IOTOPHASER",
"INT_INTERFACE_LOGIC_OUTS1",
"INT_INTERFACE_BRAM_IMUX26",
"INT_INTERFACE_BRAM_IMUX44",
"INT_INTERFACE_NW2A0",
"INT_INTERFACE_BRAM_IMUX39",
"INT_INTERFACE_EE4C3",
"INT_INTERFACE_LH4",
"INT_INTERFACE_LOGIC_OUTS3",
"INT_INTERFACE_WR1END2",
"INT_INTERFACE_FAN2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX24",
"INT_INTERFACE_BRAM_UTURN_R_IMUX34",
"INT_INTERFACE_PHASER_TO_IO_OCLKDIV",
"INT_INTERFACE_BRAM_IMUX12",
"INT_INTERFACE_WW2A0",
"INT_INTERFACE_LOGIC_OUTS_B23",
"INT_INTERFACE_BRAM_IMUX28",
"INT_INTERFACE_BRAM_UTURN_R_IMUX31",
"INT_INTERFACE_NW4A0",
"INT_INTERFACE_SE4BEG2",
"INT_INTERFACE_BRAM_IMUX27",
"INT_INTERFACE_LOGIC_OUTS20",
"INT_INTERFACE_BRAM_UTURN_R_IMUX16",
"INT_INTERFACE_SW4END0",
"INT_INTERFACE_WW2A1",
"INT_INTERFACE_SW4END3",
"INT_INTERFACE_SE4C3",
"INT_INTERFACE_NE4C0",
"INT_INTERFACE_WL1END0",
"INT_INTERFACE_BYP1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX28",
"INT_INTERFACE_BRAM_IMUX23",
"INT_INTERFACE_WR1END3",
"INT_INTERFACE_WW4C3",
"INT_INTERFACE_LOGIC_OUTS4",
"INT_INTERFACE_LH8",
"INT_INTERFACE_FAN1",
"INT_INTERFACE_EE4BEG0",
"INT_INTERFACE_LOGIC_OUTS12",
"INT_INTERFACE_BRAM_UTURN_R_IMUX41",
"INT_INTERFACE_CLK1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX15",
"INT_INTERFACE_SE4BEG0",
"INT_INTERFACE_LOGIC_OUTS_B4",
"INT_INTERFACE_BRAM_IMUX46",
"INT_INTERFACE_BRAM_IMUX16",
"INT_INTERFACE_LOGIC_OUTS8",
"INT_INTERFACE_LOGIC_OUTS_B5",
"INT_INTERFACE_WW4END2",
"INT_INTERFACE_NE4BEG3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX6",
"INT_INTERFACE_WW2A3",
"INT_INTERFACE_BRAM_IMUX42",
"INT_INTERFACE_LH7",
"INT_INTERFACE_ER1BEG3",
"INT_INTERFACE_SW2A3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX20",
"INT_INTERFACE_BRAM_UTURN_R_IMUX29",
"INT_INTERFACE_LOGIC_OUTS11",
"INT_INTERFACE_SW2A2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX44",
"INT_INTERFACE_BRAM_IMUX18",
"INT_INTERFACE_LH5",
"INT_INTERFACE_BLOCK_OUTS_B3",
"INT_INTERFACE_LOGIC_OUTS_B8",
"INT_INTERFACE_SW4END2",
"INT_INTERFACE_PHASER_TO_IO_OCLK",
"INT_INTERFACE_BRAM_UTURN_R_IMUX25",
"INT_INTERFACE_LOGIC_OUTS_B20",
"INT_INTERFACE_FAN3",
"INT_INTERFACE_NW4A2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX19",
"INT_INTERFACE_BRAM_UTURN_R_IMUX32",
"INT_INTERFACE_SW4A1",
"INT_INTERFACE_BRAM_IMUX35",
"INT_INTERFACE_EE4BEG3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX17",
"INT_INTERFACE_BRAM_IMUX20",
"INT_INTERFACE_LOGIC_OUTS18",
"INT_INTERFACE_SE2A1",
"INT_INTERFACE_WL1END1",
"INT_INTERFACE_BYP2",
"INT_INTERFACE_NE4C2",
"INT_INTERFACE_LOGIC_OUTS_B12",
"INT_INTERFACE_BRAM_IMUX30",
"INT_INTERFACE_LOGIC_OUTS22",
"INT_INTERFACE_BRAM_UTURN_R_IMUX26",
"INT_INTERFACE_BRAM_IMUX32",
"INT_INTERFACE_BRAM_UTURN_R_IMUX42",
"INT_INTERFACE_WR1END1",
"INT_INTERFACE_EE2BEG2",
"INT_INTERFACE_NW4A3",
"INT_INTERFACE_MONITOR_P",
"INT_INTERFACE_EE4B0",
"INT_INTERFACE_LOGIC_OUTS_B15",
"INT_INTERFACE_WR1END0",
"INT_INTERFACE_BRAM_IMUX5",
"INT_INTERFACE_CTRL1",
"INT_INTERFACE_EL1BEG0",
"INT_INTERFACE_BRAM_IMUX36",
"INT_INTERFACE_NE2A2",
"INT_INTERFACE_BRAM_IMUX9",
"INT_INTERFACE_EE2BEG3",
"INT_INTERFACE_WW4A3",
"INT_INTERFACE_NW2A3",
"INT_INTERFACE_EE2BEG0",
"INT_INTERFACE_LOGIC_OUTS_B6",
"INT_INTERFACE_BRAM_UTURN_R_IMUX43",
"INT_INTERFACE_LOGIC_OUTS0",
"INT_INTERFACE_CTRL0",
"INT_INTERFACE_ER1BEG0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX46",
"INT_INTERFACE_WW2END3",
"INT_INTERFACE_LOGIC_OUTS_B16",
"INT_INTERFACE_LH2",
"INT_INTERFACE_WW4END0",
"INT_INTERFACE_SE4BEG3",
"INT_INTERFACE_WW4B1",
"INT_INTERFACE_EE4A2",
"INT_INTERFACE_LOGIC_OUTS13",
"INT_INTERFACE_BRAM_UTURN_R_IMUX30",
"INT_INTERFACE_SE2A2",
"INT_INTERFACE_LOGIC_OUTS6",
"INT_INTERFACE_BRAM_UTURN_R_IMUX18",
"INT_INTERFACE_LOGIC_OUTS_B13",
"INT_INTERFACE_WW4C0",
"INT_INTERFACE_BRAM_IMUX2",
"INT_INTERFACE_EE4C1",
"INT_INTERFACE_NE4BEG0",
"INT_INTERFACE_BRAM_IMUX45",
"INT_INTERFACE_BRAM_UTURN_R_IMUX33",
"INT_INTERFACE_PHASER_TO_IO_OCLK1X_90",
"INT_INTERFACE_EL1BEG1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX47",
"INT_INTERFACE_LOGIC_OUTS9",
"INT_INTERFACE_BYP7",
"INT_INTERFACE_BRAM_UTURN_R_IMUX14",
"INT_INTERFACE_BRAM_IMUX40",
"INT_INTERFACE_BRAM_IMUX0",
"INT_INTERFACE_LH12",
"INT_INTERFACE_LH9",
"INT_INTERFACE_BRAM_UTURN_R_IMUX45",
"INT_INTERFACE_BRAM_UTURN_R_IMUX12",
"INT_INTERFACE_SW2A1",
"INT_INTERFACE_NW4END3",
"INT_INTERFACE_PHASER_TO_IO_ICLKDIV",
"INT_INTERFACE_BRAM_IMUX1",
"INT_INTERFACE_NE4C1",
"INT_INTERFACE_WW4END1",
"INT_INTERFACE_LOGIC_OUTS_B19",
"INT_INTERFACE_WL1END2",
"INT_INTERFACE_WW4C2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX37",
"INT_INTERFACE_BRAM_IMUX31",
"INT_INTERFACE_BRAM_IMUX15",
"INT_INTERFACE_WW2A2",
"INT_INTERFACE_WW4END3",
"INT_INTERFACE_LOGIC_OUTS15",
"INT_INTERFACE_LH11",
"INT_INTERFACE_SE2A3",
"INT_INTERFACE_WW4C1",
"INT_INTERFACE_SE2A0",
"INT_INTERFACE_EE2A3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX23",
"INT_INTERFACE_EE4BEG1",
"INT_INTERFACE_SW4A2",
"INT_INTERFACE_BRAM_IMUX3",
"INT_INTERFACE_EE4B3",
"INT_INTERFACE_LOGIC_OUTS2",
"INT_INTERFACE_BRAM_IMUX34",
"INT_INTERFACE_SE4C0",
"INT_INTERFACE_LOGIC_OUTS23",
"INT_INTERFACE_BRAM_IMUX47",
"INT_INTERFACE_EE2A2",
"INT_INTERFACE_EE4A0",
"INT_INTERFACE_EE4BEG2",
"INT_INTERFACE_LOGIC_OUTS14",
"INT_INTERFACE_FAN7",
"INT_INTERFACE_WW4B2",
"INT_INTERFACE_LOGIC_OUTS_B2",
"INT_INTERFACE_NE2A1",
"INT_INTERFACE_LOGIC_OUTS19",
"INT_INTERFACE_PHASER_TO_IO_ICLK",
"INT_INTERFACE_WW4B0",
"INT_INTERFACE_BYP0",
"INT_INTERFACE_EE4B1",
"INT_INTERFACE_LOGIC_OUTS_B14",
"INT_INTERFACE_LOGIC_OUTS_B11",
"INT_INTERFACE_BRAM_IMUX29",
"INT_INTERFACE_BRAM_IMUX25",
"INT_INTERFACE_BRAM_UTURN_R_IMUX13",
"INT_INTERFACE_FAN4",
"INT_INTERFACE_FAN0",
"INT_INTERFACE_ER1BEG1",
"INT_INTERFACE_BRAM_IMUX43",
"INT_INTERFACE_BRAM_IMUX37",
"INT_INTERFACE_SW4END1",
"INT_INTERFACE_WW2END0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX27",
"INT_INTERFACE_LH3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX4",
"INT_INTERFACE_WW4A1",
"INT_INTERFACE_WW4A0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX22",
"INT_INTERFACE_BLOCK_OUTS_B1"
],
"sites": [],
"pips": {
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B4->>INT_INTERFACE_LOGIC_OUTS4": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS4",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B4",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B21->>INT_INTERFACE_LOGIC_OUTS21": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS21",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B21",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B2->>INT_INTERFACE_LOGIC_OUTS2": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS2",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B2",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B10->>INT_INTERFACE_LOGIC_OUTS10": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS10",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B10",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B5->>INT_INTERFACE_LOGIC_OUTS5": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS5",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B5",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B16->>INT_INTERFACE_LOGIC_OUTS16": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS16",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B16",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B13->>INT_INTERFACE_LOGIC_OUTS13": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS13",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B13",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B14->>INT_INTERFACE_LOGIC_OUTS14": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS14",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B14",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B7->>INT_INTERFACE_LOGIC_OUTS7": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS7",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B7",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B11->>INT_INTERFACE_LOGIC_OUTS11": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS11",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B11",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B1->>INT_INTERFACE_LOGIC_OUTS1": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS1",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B1",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B15->>INT_INTERFACE_LOGIC_OUTS15": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS15",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B15",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B23->>INT_INTERFACE_LOGIC_OUTS23": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS23",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B23",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B8->>INT_INTERFACE_LOGIC_OUTS8": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS8",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B8",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B17->>INT_INTERFACE_LOGIC_OUTS17": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS17",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B17",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B22->>INT_INTERFACE_LOGIC_OUTS22": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS22",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B22",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B19->>INT_INTERFACE_LOGIC_OUTS19": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS19",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B19",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B20->>INT_INTERFACE_LOGIC_OUTS20": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS20",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B20",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B6->>INT_INTERFACE_LOGIC_OUTS6": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS6",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B6",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B9->>INT_INTERFACE_LOGIC_OUTS9": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS9",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B9",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B18->>INT_INTERFACE_LOGIC_OUTS18": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS18",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B18",
"can_invert": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B12->>INT_INTERFACE_LOGIC_OUTS12": {
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS12",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B12",
"can_invert": "0"
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B0->>INT_INTERFACE_LOGIC_OUTS0": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS0",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B0",
"can_invert": "0"
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B4->>INT_INTERFACE_LOGIC_OUTS4": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS4",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B4",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B14->>INT_INTERFACE_LOGIC_OUTS14": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS14",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B14",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B20->>INT_INTERFACE_LOGIC_OUTS20": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS20",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B20",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B7->>INT_INTERFACE_LOGIC_OUTS7": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS7",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B7",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B9->>INT_INTERFACE_LOGIC_OUTS9": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS9",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B9",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B5->>INT_INTERFACE_LOGIC_OUTS5": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS5",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B5",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B10->>INT_INTERFACE_LOGIC_OUTS10": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS10",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B10",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B17->>INT_INTERFACE_LOGIC_OUTS17": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS17",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B17",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B18->>INT_INTERFACE_LOGIC_OUTS18": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS18",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B18",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B13->>INT_INTERFACE_LOGIC_OUTS13": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS13",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B13",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B3->>INT_INTERFACE_LOGIC_OUTS3": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS3",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B3",
"can_invert": "0"
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B15->>INT_INTERFACE_LOGIC_OUTS15": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS15",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B15",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B19->>INT_INTERFACE_LOGIC_OUTS19": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS19",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B19",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B16->>INT_INTERFACE_LOGIC_OUTS16": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS16",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B16",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B21->>INT_INTERFACE_LOGIC_OUTS21": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS21",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B21",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B11->>INT_INTERFACE_LOGIC_OUTS11": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS11",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B11",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B12->>INT_INTERFACE_LOGIC_OUTS12": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS12",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B12",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B1->>INT_INTERFACE_LOGIC_OUTS1": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS1",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B1",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B22->>INT_INTERFACE_LOGIC_OUTS22": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS22",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B22",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B2->>INT_INTERFACE_LOGIC_OUTS2": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS2",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B2",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B8->>INT_INTERFACE_LOGIC_OUTS8": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS8",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B8",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B6->>INT_INTERFACE_LOGIC_OUTS6": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS6",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B6",
"is_pseudo": "0"
}
},
"wires": [
"INT_INTERFACE_BRAM_UTURN_R_IMUX3",
"INT_INTERFACE_LOGIC_OUTS_B0",
"INT_INTERFACE_LH10",
"INT_INTERFACE_BRAM_UTURN_R_IMUX16",
"INT_INTERFACE_BLOCK_OUTS_B0",
"INT_INTERFACE_SE4C0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX36",
"INT_INTERFACE_BRAM_UTURN_R_IMUX37",
"INT_INTERFACE_EE4BEG1",
"INT_INTERFACE_LOGIC_OUTS_B2",
"INT_INTERFACE_EL1BEG3",
"INT_INTERFACE_NE4BEG0",
"INT_INTERFACE_LOGIC_OUTS4",
"INT_INTERFACE_LOGIC_OUTS13",
"INT_INTERFACE_LOGIC_OUTS_B18",
"INT_INTERFACE_BRAM_IMUX12",
"INT_INTERFACE_BRAM_IMUX7",
"INT_INTERFACE_WW2A0",
"INT_INTERFACE_BRAM_IMUX18",
"INT_INTERFACE_BRAM_UTURN_R_IMUX35",
"INT_INTERFACE_BRAM_UTURN_R_IMUX44",
"INT_INTERFACE_LOGIC_OUTS_B19",
"INT_INTERFACE_EE2A3",
"INT_INTERFACE_FAN5",
"INT_INTERFACE_WW4C3",
"INT_INTERFACE_BRAM_IMUX30",
"INT_INTERFACE_BRAM_UTURN_R_IMUX25",
"INT_INTERFACE_BRAM_UTURN_R_IMUX22",
"INT_INTERFACE_LOGIC_OUTS1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX31",
"INT_INTERFACE_LOGIC_OUTS2",
"INT_INTERFACE_BRAM_IMUX10",
"INT_INTERFACE_BRAM_IMUX23",
"INT_INTERFACE_BRAM_UTURN_R_IMUX12",
"INT_INTERFACE_NW2A0",
"INT_INTERFACE_BRAM_IMUX25",
"INT_INTERFACE_BRAM_UTURN_R_IMUX4",
"INT_INTERFACE_BYP3",
"INT_INTERFACE_WW2END0",
"INT_INTERFACE_EE4B2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX8",
"INT_INTERFACE_BRAM_UTURN_R_IMUX0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX29",
"INT_INTERFACE_NW2A3",
"INT_INTERFACE_BRAM_IMUX28",
"INT_INTERFACE_EL1BEG1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX43",
"INT_INTERFACE_BRAM_IMUX32",
"INT_INTERFACE_LH11",
"INT_INTERFACE_LOGIC_OUTS9",
"INT_INTERFACE_BRAM_IMUX34",
"INT_INTERFACE_EE4B0",
"INT_INTERFACE_LOGIC_OUTS_B14",
"INT_INTERFACE_BRAM_UTURN_R_IMUX33",
"INT_INTERFACE_BRAM_IMUX20",
"INT_INTERFACE_BRAM_IMUX0",
"INT_INTERFACE_BRAM_IMUX9",
"INT_INTERFACE_BRAM_IMUX1",
"INT_INTERFACE_ER1BEG0",
"INT_INTERFACE_WW4B2",
"INT_INTERFACE_NE4BEG3",
"INT_INTERFACE_BRAM_IMUX43",
"INT_INTERFACE_LOGIC_OUTS19",
"INT_INTERFACE_BRAM_UTURN_R_IMUX42",
"INT_INTERFACE_BYP6",
"INT_INTERFACE_WW4B0",
"INT_INTERFACE_BLOCK_OUTS_B3",
"INT_INTERFACE_BRAM_IMUX21",
"INT_INTERFACE_LH2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX11",
"INT_INTERFACE_LOGIC_OUTS_B21",
"INT_INTERFACE_BRAM_IMUX4",
"INT_INTERFACE_NE2A3",
"INT_INTERFACE_LOGIC_OUTS_B4",
"INT_INTERFACE_SE4C1",
"INT_INTERFACE_LOGIC_OUTS12",
"INT_INTERFACE_BRAM_IMUX24",
"INT_INTERFACE_WL1END1",
"INT_INTERFACE_NW4A0",
"INT_INTERFACE_WW4END2",
"INT_INTERFACE_BRAM_IMUX47",
"INT_INTERFACE_NE4C3",
"INT_INTERFACE_EE4C0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX26",
"INT_INTERFACE_BRAM_IMUX38",
"INT_INTERFACE_LOGIC_OUTS_B1",
"INT_INTERFACE_SW4END3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX5",
"INT_INTERFACE_SW4END2",
"INT_INTERFACE_BRAM_IMUX13",
"INT_INTERFACE_LOGIC_OUTS_B16",
"INT_INTERFACE_FAN6",
"INT_INTERFACE_BRAM_UTURN_R_IMUX46",
"INT_INTERFACE_BRAM_IMUX19",
"INT_INTERFACE_BRAM_UTURN_R_IMUX41",
"INT_INTERFACE_EE2A0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX28",
"INT_INTERFACE_BRAM_IMUX27",
"INT_INTERFACE_BRAM_IMUX29",
"INT_INTERFACE_LH7",
"INT_INTERFACE_BRAM_UTURN_R_IMUX34",
"INT_INTERFACE_LOGIC_OUTS_B20",
"INT_INTERFACE_LOGIC_OUTS_B6",
"INT_INTERFACE_WW4END3",
"INT_INTERFACE_LOGIC_OUTS5",
"INT_INTERFACE_LOGIC_OUTS_B3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX17",
"INT_INTERFACE_SW4A2",
"INT_INTERFACE_SW4A1",
"INT_INTERFACE_BRAM_IMUX16",
"INT_INTERFACE_LOGIC_OUTS8",
"INT_INTERFACE_SE2A1",
"INT_INTERFACE_LH6",
"INT_INTERFACE_LH5",
"INT_INTERFACE_BRAM_IMUX40",
"L_INT_INTER_DQS_IOTOPHASER",
"INT_INTERFACE_WW4A0",
"INT_INTERFACE_SE4BEG2",
"INT_INTERFACE_NW4A2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX7",
"INT_INTERFACE_BRAM_IMUX35",
"INT_INTERFACE_LOGIC_OUTS_B9",
"INT_INTERFACE_BRAM_UTURN_R_IMUX19",
"INT_INTERFACE_BRAM_UTURN_R_IMUX13",
"INT_INTERFACE_BRAM_IMUX45",
"INT_INTERFACE_WR1END3",
"INT_INTERFACE_BRAM_IMUX39",
"INT_INTERFACE_EE4C1",
"INT_INTERFACE_FAN7",
"INT_INTERFACE_EE4BEG0",
"INT_INTERFACE_LOGIC_OUTS15",
"INT_INTERFACE_BRAM_IMUX15",
"INT_INTERFACE_BRAM_IMUX46",
"INT_INTERFACE_SW2A1",
"INT_INTERFACE_LOGIC_OUTS22",
"INT_INTERFACE_LH8",
"INT_INTERFACE_LH9",
"INT_INTERFACE_SE2A2",
"INT_INTERFACE_LOGIC_OUTS_B10",
"INT_INTERFACE_SW4A3",
"INT_INTERFACE_LOGIC_OUTS7",
"INT_INTERFACE_BRAM_UTURN_R_IMUX6",
"INT_INTERFACE_SE2A3",
"INT_INTERFACE_NW4END2",
"INT_INTERFACE_EE4C3",
"INT_INTERFACE_EE2A1",
"INT_INTERFACE_SE4BEG1",
"INT_INTERFACE_LOGIC_OUTS17",
"INT_INTERFACE_NW4END1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX2",
"INT_INTERFACE_WL1END3",
"INT_INTERFACE_LOGIC_OUTS_B17",
"INT_INTERFACE_LOGIC_OUTS_B8",
"INT_INTERFACE_PHASER_TO_IO_ICLK",
"INT_INTERFACE_NE4C0",
"INT_INTERFACE_WR1END2",
"INT_INTERFACE_BRAM_IMUX33",
"INT_INTERFACE_NW4A3",
"INT_INTERFACE_WR1END0",
"INT_INTERFACE_NE2A0",
"INT_INTERFACE_EE4BEG3",
"INT_INTERFACE_ER1BEG2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX27",
"INT_INTERFACE_BRAM_IMUX5",
"INT_INTERFACE_WW2END1",
"INT_INTERFACE_LOGIC_OUTS0",
"INT_INTERFACE_BRAM_IMUX3",
"INT_INTERFACE_EE4A1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX39",
"INT_INTERFACE_WW2A1",
"INT_INTERFACE_LH3",
"INT_INTERFACE_WL1END0",
"INT_INTERFACE_WR1END1",
"INT_INTERFACE_WW4B1",
"INT_INTERFACE_BYP7",
"INT_INTERFACE_PHASER_TO_IO_OCLKDIV",
"INT_INTERFACE_BRAM_UTURN_R_IMUX38",
"INT_INTERFACE_WW4C0",
"INT_INTERFACE_SW2A0",
"INT_INTERFACE_SE4BEG3",
"INT_INTERFACE_LH1",
"INT_INTERFACE_WW4B3",
"INT_INTERFACE_BRAM_IMUX41",
"INT_INTERFACE_WW4A1",
"INT_INTERFACE_BRAM_IMUX31",
"INT_INTERFACE_ER1BEG1",
"INT_INTERFACE_SW4A0",
"INT_INTERFACE_NW4A1",
"INT_INTERFACE_EL1BEG0",
"INT_INTERFACE_LH4",
"INT_INTERFACE_PHASER_TO_IO_OCLK",
"INT_INTERFACE_BRAM_IMUX6",
"INT_INTERFACE_WW4A3",
"INT_INTERFACE_LOGIC_OUTS20",
"INT_INTERFACE_NE2A2",
"INT_INTERFACE_PHASER_TO_IO_ICLKDIV",
"INT_INTERFACE_BRAM_UTURN_R_IMUX45",
"INT_INTERFACE_WW2END2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX18",
"INT_INTERFACE_BRAM_UTURN_R_IMUX20",
"INT_INTERFACE_WW4A2",
"INT_INTERFACE_WL1END2",
"INT_INTERFACE_BLOCK_OUTS_B1",
"INT_INTERFACE_EE4A3",
"INT_INTERFACE_BYP2",
"INT_INTERFACE_NE4BEG1",
"INT_INTERFACE_BYP0",
"INT_INTERFACE_EE4BEG2",
"INT_INTERFACE_LOGIC_OUTS6",
"INT_INTERFACE_FAN0",
"INT_INTERFACE_WW2A3",
"INT_INTERFACE_LOGIC_OUTS_B12",
"INT_INTERFACE_NW4END3",
"INT_INTERFACE_LH12",
"INT_INTERFACE_BRAM_UTURN_R_IMUX21",
"INT_INTERFACE_BRAM_UTURN_R_IMUX30",
"INT_INTERFACE_SW4END1",
"INT_INTERFACE_WW4C2",
"INT_INTERFACE_NE4BEG2",
"INT_INTERFACE_BRAM_IMUX36",
"INT_INTERFACE_CTRL0",
"INT_INTERFACE_ER1BEG3",
"INT_INTERFACE_BRAM_IMUX22",
"INT_INTERFACE_BYP5",
"INT_INTERFACE_SW2A2",
"INT_INTERFACE_CTRL1",
"INT_INTERFACE_NE2A1",
"INT_INTERFACE_EE2BEG3",
"INT_INTERFACE_LOGIC_OUTS_B23",
"INT_INTERFACE_NW4END0",
"INT_INTERFACE_NW2A2",
"INT_INTERFACE_LOGIC_OUTS_B11",
"INT_INTERFACE_WW2END3",
"INT_INTERFACE_BRAM_IMUX42",
"INT_INTERFACE_LOGIC_OUTS16",
"INT_INTERFACE_EE4C2",
"INT_INTERFACE_EE2BEG1",
"INT_INTERFACE_CLK1",
"INT_INTERFACE_LOGIC_OUTS10",
"INT_INTERFACE_FAN3",
"INT_INTERFACE_WW4C1",
"INT_INTERFACE_BYP1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX15",
"INT_INTERFACE_EL1BEG2",
"INT_INTERFACE_LOGIC_OUTS3",
"INT_INTERFACE_BYP4",
"INT_INTERFACE_BRAM_UTURN_R_IMUX9",
"INT_INTERFACE_MONITOR_P",
"INT_INTERFACE_NW2A1",
"INT_INTERFACE_LOGIC_OUTS_B5",
"INT_INTERFACE_WW2A2",
"INT_INTERFACE_LOGIC_OUTS_B13",
"INT_INTERFACE_SE2A0",
"INT_INTERFACE_FAN1",
"INT_INTERFACE_EE4B1",
"INT_INTERFACE_LOGIC_OUTS11",
"INT_INTERFACE_NE4C2",
"INT_INTERFACE_SW2A3",
"INT_INTERFACE_EE2A2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX14",
"INT_INTERFACE_BRAM_UTURN_R_IMUX23",
"INT_INTERFACE_BRAM_UTURN_R_IMUX32",
"INT_INTERFACE_SE4C3",
"INT_INTERFACE_EE2BEG2",
"INT_INTERFACE_BRAM_IMUX26",
"INT_INTERFACE_BRAM_IMUX11",
"INT_INTERFACE_BRAM_UTURN_R_IMUX47",
"INT_INTERFACE_LOGIC_OUTS_B22",
"INT_INTERFACE_EE2BEG0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX40",
"INT_INTERFACE_LOGIC_OUTS_B15",
"INT_INTERFACE_PHASER_TO_IO_OCLK1X_90",
"INT_INTERFACE_BRAM_UTURN_R_IMUX1",
"INT_INTERFACE_SE4BEG0",
"INT_INTERFACE_LOGIC_OUTS_B7",
"INT_INTERFACE_SE4C2",
"INT_INTERFACE_BRAM_IMUX44",
"INT_INTERFACE_LOGIC_OUTS14",
"INT_INTERFACE_WW4END1",
"INT_INTERFACE_BRAM_IMUX17",
"INT_INTERFACE_FAN4",
"INT_INTERFACE_BLOCK_OUTS_B2",
"INT_INTERFACE_LOGIC_OUTS23",
"INT_INTERFACE_BRAM_IMUX2",
"INT_INTERFACE_MONITOR_N",
"INT_INTERFACE_BRAM_IMUX14",
"INT_INTERFACE_LOGIC_OUTS18",
"INT_INTERFACE_BRAM_IMUX37",
"INT_INTERFACE_SW4END0",
"INT_INTERFACE_WW4END0",
"INT_INTERFACE_EE4B3",
"INT_INTERFACE_EE4A0",
"INT_INTERFACE_NE4C1",
"INT_INTERFACE_LOGIC_OUTS21",
"INT_INTERFACE_CLK0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX24",
"INT_INTERFACE_FAN2",
"INT_INTERFACE_EE4A2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX10",
"INT_INTERFACE_BRAM_IMUX8"
],
"tile_type": "BRAM_INT_INTERFACE_R",
"sites": []
"tile_type": "BRAM_INT_INTERFACE_R"
}

19284
artix7/tile_type_BRAM_L.json
View File

File diff suppressed because it is too large Load Diff

19564
artix7/tile_type_BRAM_R.json
View File

File diff suppressed because it is too large Load Diff

120
artix7/tile_type_BRKH_BRAM.json
View File

@ -1,71 +1,71 @@
{
"pips": {},
"wires": [
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU3",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU9",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU1",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU6",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU3",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU2",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU8",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU6",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU7",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU5",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU8",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU7",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU4",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU5",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU1",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU9",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU1",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU6",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU8",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU3",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU1",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU4",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU11",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU7",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11",
"BRKH_BRAM_CASCADEA_R",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU10",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU2",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU8",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU4",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU9",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10",
"BRKH_BRAM_CASCADEB_R",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU12",
"BRKH_BRAM_CASCADEB_L",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU2",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU8",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU11",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU7",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU13",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU5",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU4",
"BRKH_BRAM_CASCADEA_L",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU11",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU5",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU13",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU6",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU2",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU3",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU0",
"BRKH_BRAM_CASCADEA_R",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU1",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU11",
"BRKH_BRAM_CASCADEA_L",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU4",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU9",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU1",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU2",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU7",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU10",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU9",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU3",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU12",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU1",
"BRKH_BRAM_CASCADEB_L",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU13",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU6",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU8",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU7",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU2",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU5",
"BRKH_BRAM_CASCADEB_R",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU3",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU6",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU13",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU14"
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU4",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU4",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU14",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU5",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU1",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU8",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU7",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU6",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU3",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU6",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU0",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU5",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU9",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU2",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU4",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU3",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU2",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14"
],
"tile_type": "BRKH_BRAM",
"sites": []
"sites": [],
"pips": {},
"tile_type": "BRKH_BRAM"
}

220
artix7/tile_type_BRKH_B_TERM_INT.json
View File

@ -1,125 +1,125 @@
{
"pips": {},
"wires": [
"B_TERM_UTURN_INT_LVB0",
"B_TERM_UTURN_INT_LV7",
"B_TERM_UTURN_INT_SS2A0",
"B_TERM_UTURN_INT_SW6B3",
"B_TERM_UTURN_INT_SS6C3",
"B_TERM_UTURN_INT_SS2BEG0",
"B_TERM_UTURN_INT_SS6E0",
"B_TERM_UTURN_INT_SW6END_N0_3",
"B_TERM_UTURN_INT_LV_L7",
"B_TERM_UTURN_INT_SS6B3",
"B_TERM_UTURN_INT_LV2",
"B_TERM_UTURN_INT_LV8",
"B_TERM_UTURN_INT_SW2BEG3",
"B_TERM_UTURN_INT_LVB4",
"B_TERM_UTURN_INT_LV_L18",
"B_TERM_UTURN_INT_LVB_L1",
"B_TERM_UTURN_INT_SL1BEG3",
"B_TERM_UTURN_INT_SE6A2",
"B_TERM_UTURN_INT_ER1BEG0",
"B_TERM_UTURN_INT_SW6B0",
"B_TERM_UTURN_INT_SE6C3",
"B_TERM_UTURN_INT_SS6B2",
"B_TERM_UTURN_INT_SE6D1",
"B_TERM_UTURN_INT_SS6A1",
"B_TERM_UTURN_INT_SE6C1",
"B_TERM_UTURN_INT_SS2BEG2",
"B_TERM_UTURN_INT_SW2BEG0",
"B_TERM_UTURN_INT_SE6D3",
"B_TERM_UTURN_INT_SE6D0",
"B_TERM_UTURN_INT_SW6B2",
"B_TERM_UTURN_INT_LVB_L3",
"B_TERM_UTURN_INT_LV_L6",
"B_TERM_UTURN_INT_SW6A1",
"B_TERM_UTURN_INT_LV_L9",
"B_TERM_UTURN_INT_SL1BEG0",
"B_TERM_UTURN_INT_LVB5",
"B_TERM_UTURN_INT_FAN_BOUNCE2",
"B_TERM_UTURN_INT_SS6B1",
"B_TERM_UTURN_INT_SW6C3",
"B_TERM_UTURN_INT_SS6C1",
"B_TERM_UTURN_INT_SS6E3",
"B_TERM_UTURN_INT_SS2A1",
"B_TERM_UTURN_INT_LV_L8",
"B_TERM_UTURN_INT_SW6A2",
"B_TERM_UTURN_INT_LVB2",
"B_TERM_UTURN_INT_LV9",
"B_TERM_UTURN_INT_SE6A0",
"B_TERM_UTURN_INT_FAN_BOUNCE0",
"B_TERM_UTURN_INT_SW6D3",
"B_TERM_UTURN_INT_SS6A2",
"B_TERM_UTURN_INT_WR1BEG0",
"B_TERM_UTURN_INT_ER1END_N3_3",
"B_TERM_UTURN_INT_WR1END0",
"B_TERM_UTURN_INT_SE2BEG3",
"B_TERM_UTURN_INT_SS6C0",
"B_TERM_UTURN_INT_SE2BEG2",
"B_TERM_UTURN_INT_SE6A3",
"B_TERM_UTURN_INT_SW6A0",
"B_TERM_UTURN_INT_SW2BEG2",
"B_TERM_UTURN_INT_SS6BEG1",
"B_TERM_UTURN_INT_SS6A3",
"B_TERM_UTURN_INT_LV_L6",
"B_TERM_UTURN_INT_LVB4",
"B_TERM_UTURN_INT_SW6A2",
"B_TERM_UTURN_INT_LV4",
"B_TERM_UTURN_INT_SS2A1",
"B_TERM_UTURN_INT_LV3",
"B_TERM_UTURN_INT_LVB1",
"B_TERM_UTURN_INT_SS6D3",
"B_TERM_UTURN_INT_LV2",
"B_TERM_UTURN_INT_LV_L3",
"B_TERM_UTURN_INT_SS6B3",
"B_TERM_UTURN_INT_SS6D1",
"B_TERM_UTURN_INT_LV_L4",
"B_TERM_UTURN_INT_SS6C1",
"B_TERM_UTURN_INT_SW6B3",
"B_TERM_UTURN_INT_SS6A3",
"B_TERM_UTURN_INT_ER1BEG0",
"B_TERM_UTURN_INT_SW6D2",
"B_TERM_UTURN_INT_LVB_L5",
"B_TERM_UTURN_INT_SW6D3",
"B_TERM_UTURN_INT_SL1BEG1",
"B_TERM_UTURN_INT_SE6D0",
"B_TERM_UTURN_INT_SE2BEG2",
"B_TERM_UTURN_INT_SS6B0",
"B_TERM_UTURN_INT_SW6A3",
"B_TERM_UTURN_INT_LVB5",
"B_TERM_UTURN_INT_SS6C3",
"B_TERM_UTURN_INT_LV_L5",
"B_TERM_UTURN_INT_SE6A1",
"B_TERM_UTURN_INT_LV_L18",
"B_TERM_UTURN_INT_SS6A0",
"B_TERM_UTURN_INT_SS6C0",
"B_TERM_UTURN_INT_SW6C0",
"B_TERM_UTURN_INT_SS6B1",
"B_TERM_UTURN_INT_SW6B1",
"B_TERM_UTURN_INT_SW6D1",
"B_TERM_UTURN_INT_SS6E0",
"B_TERM_UTURN_INT_LVB3",
"B_TERM_UTURN_INT_SS6BEG0",
"B_TERM_UTURN_INT_SW6A1",
"B_TERM_UTURN_INT_FAN_BOUNCE0",
"B_TERM_UTURN_INT_SS2A0",
"B_TERM_UTURN_INT_LV_L8",
"B_TERM_UTURN_INT_SW6C3",
"B_TERM_UTURN_INT_SW2BEG0",
"B_TERM_UTURN_INT_SS2BEG3",
"B_TERM_UTURN_INT_SE6D2",
"B_TERM_UTURN_INT_SE6B1",
"B_TERM_UTURN_INT_FAN_BOUNCE4",
"B_TERM_UTURN_INT_SE2BEG0",
"B_TERM_UTURN_INT_SS6C2",
"B_TERM_UTURN_INT_LV_L4",
"B_TERM_UTURN_INT_SW6D0",
"B_TERM_UTURN_INT_LV_L3",
"B_TERM_UTURN_INT_SL1BEG1",
"B_TERM_UTURN_INT_SW6B1",
"B_TERM_UTURN_INT_LV18",
"B_TERM_UTURN_INT_LVB_L0",
"B_TERM_UTURN_INT_SS6A0",
"B_TERM_UTURN_INT_SW6C0",
"B_TERM_UTURN_INT_SW6D1",
"B_TERM_UTURN_INT_SW6C2",
"B_TERM_UTURN_INT_SL1BEG2",
"B_TERM_UTURN_INT_FAN_BOUNCE2",
"B_TERM_UTURN_INT_SW6B2",
"B_TERM_UTURN_INT_WR1END0",
"B_TERM_UTURN_INT_SS6B2",
"B_TERM_UTURN_INT_SE6C0",
"B_TERM_UTURN_INT_SE6B3",
"B_TERM_UTURN_INT_SR1BEG3",
"B_TERM_UTURN_INT_SE6B1",
"B_TERM_UTURN_INT_SW6C1",
"B_TERM_UTURN_INT_SW2BEG1",
"B_TERM_UTURN_INT_SE6A0",
"B_TERM_UTURN_INT_SW2BEG3",
"B_TERM_UTURN_INT_LV8",
"B_TERM_UTURN_INT_SS6BEG2",
"B_TERM_UTURN_INT_LV4",
"B_TERM_UTURN_INT_SE6C2",
"B_TERM_UTURN_INT_LV6",
"B_TERM_UTURN_INT_SR1BEG1",
"B_TERM_UTURN_INT_SE6A1",
"B_TERM_UTURN_INT_SS6D0",
"B_TERM_UTURN_INT_SW6A3",
"B_TERM_UTURN_INT_SE6D2",
"B_TERM_UTURN_INT_SS2A2",
"B_TERM_UTURN_INT_LV_L2",
"B_TERM_UTURN_INT_LV5",
"B_TERM_UTURN_INT_FAN_BOUNCE6",
"B_TERM_UTURN_INT_SS6D2",
"B_TERM_UTURN_INT_SS6BEG3",
"B_TERM_UTURN_INT_WR1BEG0",
"B_TERM_UTURN_INT_SE6B2",
"B_TERM_UTURN_INT_SW2BEG1",
"B_TERM_UTURN_INT_SS6E3",
"B_TERM_UTURN_INT_SS6E1",
"B_TERM_UTURN_INT_SR1BEG2",
"B_TERM_UTURN_INT_SS6D1",
"B_TERM_UTURN_INT_SW6D2",
"B_TERM_UTURN_INT_FAN_BOUNCE4",
"B_TERM_UTURN_INT_SS2BEG1",
"B_TERM_UTURN_INT_LVB3",
"B_TERM_UTURN_INT_SL1BEG2",
"B_TERM_UTURN_INT_SS6BEG3",
"B_TERM_UTURN_INT_SS6BEG1",
"B_TERM_UTURN_INT_SE2BEG1",
"B_TERM_UTURN_INT_LVB_L5",
"B_TERM_UTURN_INT_SS2A2",
"B_TERM_UTURN_INT_SS6E2",
"B_TERM_UTURN_INT_LVB_L2",
"B_TERM_UTURN_INT_SS6D3",
"B_TERM_UTURN_INT_SS2A3",
"B_TERM_UTURN_INT_SS6BEG0",
"B_TERM_UTURN_INT_SS2BEG3",
"B_TERM_UTURN_INT_LV_L9",
"B_TERM_UTURN_INT_SW6A0",
"B_TERM_UTURN_INT_SW6END_N0_3",
"B_TERM_UTURN_INT_SE6A3",
"B_TERM_UTURN_INT_SE6B2",
"B_TERM_UTURN_INT_SE6D1",
"B_TERM_UTURN_INT_SW6B0",
"B_TERM_UTURN_INT_SR1BEG2",
"B_TERM_UTURN_INT_SE6A2",
"B_TERM_UTURN_INT_LV7",
"B_TERM_UTURN_INT_SW6C2",
"B_TERM_UTURN_INT_SS2BEG1",
"B_TERM_UTURN_INT_LVB_L4",
"B_TERM_UTURN_INT_LV_L5",
"B_TERM_UTURN_INT_FAN_BOUNCE6",
"B_TERM_UTURN_INT_LVB_L3",
"B_TERM_UTURN_INT_SE6D3",
"B_TERM_UTURN_INT_LV9",
"B_TERM_UTURN_INT_LV_L7",
"B_TERM_UTURN_INT_SE6C3",
"B_TERM_UTURN_INT_SW6C1",
"B_TERM_UTURN_INT_SE2BEG3",
"B_TERM_UTURN_INT_SS6A1",
"B_TERM_UTURN_INT_LV_L2",
"B_TERM_UTURN_INT_LVB_L0",
"B_TERM_UTURN_INT_SS2BEG2",
"B_TERM_UTURN_INT_SR1BEG1",
"B_TERM_UTURN_INT_LVB1",
"B_TERM_UTURN_INT_LVB_L1",
"B_TERM_UTURN_INT_SE6B0",
"B_TERM_UTURN_INT_SS6B0",
"B_TERM_UTURN_INT_SE6C0"
"B_TERM_UTURN_INT_SS6D0",
"B_TERM_UTURN_INT_LVB2",
"B_TERM_UTURN_INT_SS2BEG0",
"B_TERM_UTURN_INT_LVB0",
"B_TERM_UTURN_INT_SS6D2",
"B_TERM_UTURN_INT_SE6C1",
"B_TERM_UTURN_INT_SW6D0",
"B_TERM_UTURN_INT_SL1BEG0",
"B_TERM_UTURN_INT_LV18",
"B_TERM_UTURN_INT_LV6",
"B_TERM_UTURN_INT_LV5",
"B_TERM_UTURN_INT_SR1BEG3",
"B_TERM_UTURN_INT_LVB_L2",
"B_TERM_UTURN_INT_SL1BEG3",
"B_TERM_UTURN_INT_SW2BEG2",
"B_TERM_UTURN_INT_SS6A2",
"B_TERM_UTURN_INT_SS2A3",
"B_TERM_UTURN_INT_SE6C2"
],
"tile_type": "BRKH_B_TERM_INT",
"sites": []
"sites": [],
"pips": {},
"tile_type": "BRKH_B_TERM_INT"
}

8
artix7/tile_type_BRKH_CLB.json
View File

@ -1,11 +1,11 @@
{
"pips": {},
"wires": [
"BRKH_CLB_COUT0_L",
"BRKH_CLB_COUT1_R",
"BRKH_CLB_COUT1_L",
"BRKH_CLB_COUT0_L",
"BRKH_CLB_COUT0_R"
],
"tile_type": "BRKH_CLB",
"sites": []
"sites": [],
"pips": {},
"tile_type": "BRKH_CLB"
}

248
artix7/tile_type_BRKH_CLK.json
View File

@ -1,135 +1,135 @@
{
"pips": {},
"wires": [
"BRKH_CLK_CK_GCLK9",
"BRKH_CLK_R_CK_BUFG_CASC28",
"BRKH_CLK_CK_BUFG_CASC31",
"BRKH_CLK_R_CK_BUFG_CASC8",
"BRKH_CLK_CK_GCLK14",
"BRKH_CLK_CK_GCLK7",
"BRKH_CLK_CK_GCLK28",
"BRKH_CLK_CK_BUFG_CASC9",
"BRKH_CLK_R_CK_BUFG_CASC0",
"BRKH_CLK_R_CK_GCLK6",
"BRKH_CLK_R_CK_GCLK21",
"BRKH_CLK_R_CK_BUFG_CASC13",
"BRKH_CLK_CK_BUFG_CASC13",
"BRKH_CLK_R_CK_BUFG_CASC21",
"BRKH_CLK_R_CK_GCLK31",
"BRKH_CLK_CK_BUFG_CASC2",
"BRKH_CLK_CK_BUFG_CASC26",
"BRKH_CLK_CK_GCLK24",
"BRKH_CLK_CK_BUFG_CASC28",
"BRKH_CLK_R_CK_GCLK30",
"BRKH_CLK_R_CK_BUFG_CASC22",
"BRKH_CLK_R_CK_GCLK9",
"BRKH_CLK_R_CK_BUFG_CASC1",
"BRKH_CLK_CK_GCLK11",
"BRKH_CLK_R_CK_BUFG_CASC11",
"BRKH_CLK_R_CK_GCLK1",
"BRKH_CLK_CK_GCLK4",
"BRKH_CLK_CK_BUFG_CASC10",
"BRKH_CLK_CK_GCLK18",
"BRKH_CLK_CK_GCLK5",
"BRKH_CLK_R_CK_BUFG_CASC18",
"BRKH_CLK_R_CK_BUFG_CASC16",
"BRKH_CLK_CK_BUFG_CASC1",
"BRKH_CLK_R_CK_GCLK11",
"BRKH_CLK_CK_GCLK26",
"BRKH_CLK_CK_GCLK17",
"BRKH_CLK_CK_GCLK30",
"BRKH_CLK_CK_GCLK12",
"BRKH_CLK_CK_GCLK23",
"BRKH_CLK_R_CK_BUFG_CASC9",
"BRKH_CLK_R_CK_BUFG_CASC12",
"BRKH_CLK_CK_BUFG_CASC22",
"BRKH_CLK_R_CK_GCLK28",
"BRKH_CLK_R_CK_GCLK24",
"BRKH_CLK_R_CK_GCLK5",
"BRKH_CLK_R_CK_BUFG_CASC31",
"BRKH_CLK_R_CK_BUFG_CASC19",
"BRKH_CLK_R_CK_BUFG_CASC25",
"BRKH_CLK_R_CK_GCLK3",
"BRKH_CLK_CK_BUFG_CASC20",
"BRKH_CLK_R_CK_GCLK27",
"BRKH_CLK_R_CK_GCLK19",
"BRKH_CLK_CK_GCLK8",
"BRKH_CLK_R_CK_GCLK17",
"BRKH_CLK_CK_GCLK27",
"BRKH_CLK_R_CK_GCLK14",
"BRKH_CLK_CK_BUFG_CASC11",
"BRKH_CLK_CK_BUFG_CASC15",
"BRKH_CLK_CK_GCLK25",
"BRKH_CLK_CK_BUFG_CASC18",
"BRKH_CLK_R_CK_GCLK4",
"BRKH_CLK_R_CK_BUFG_CASC15",
"BRKH_CLK_R_CK_BUFG_CASC26",
"BRKH_CLK_CK_GCLK21",
"BRKH_CLK_CK_BUFG_CASC19",
"BRKH_CLK_R_CK_BUFG_CASC7",
"BRKH_CLK_CK_GCLK0",
"BRKH_CLK_R_CK_BUFG_CASC20",
"BRKH_CLK_R_CK_BUFG_CASC2",
"BRKH_CLK_CK_BUFG_CASC14",
"BRKH_CLK_R_CK_BUFG_CASC30",
"BRKH_CLK_CK_GCLK3",
"BRKH_CLK_CK_BUFG_CASC29",
"BRKH_CLK_R_CK_GCLK25",
"BRKH_CLK_CK_GCLK15",
"BRKH_CLK_CK_GCLK13",
"BRKH_CLK_CK_BUFG_CASC30",
"BRKH_CLK_R_CK_GCLK7",
"BRKH_CLK_R_CK_GCLK8",
"BRKH_CLK_CK_BUFG_CASC17",
"BRKH_CLK_CK_BUFG_CASC4",
"BRKH_CLK_CK_BUFG_CASC27",
"BRKH_CLK_R_CK_GCLK22",
"BRKH_CLK_CK_BUFG_CASC16",
"BRKH_CLK_R_CK_BUFG_CASC3",
"BRKH_CLK_R_CK_GCLK20",
"BRKH_CLK_R_CK_BUFG_CASC4",
"BRKH_CLK_CK_BUFG_CASC3",
"BRKH_CLK_CK_GCLK1",
"BRKH_CLK_R_CK_GCLK26",
"BRKH_CLK_CK_BUFG_CASC7",
"BRKH_CLK_R_CK_BUFG_CASC14",
"BRKH_CLK_CK_BUFG_CASC12",
"BRKH_CLK_R_CK_BUFG_CASC23",
"BRKH_CLK_CK_GCLK16",
"BRKH_CLK_CK_GCLK2",
"BRKH_CLK_CK_BUFG_CASC21",
"BRKH_CLK_CK_GCLK6",
"BRKH_CLK_R_CK_BUFG_CASC24",
"BRKH_CLK_R_CK_BUFG_CASC6",
"BRKH_CLK_CK_GCLK29",
"BRKH_CLK_R_CK_GCLK15",
"BRKH_CLK_CK_BUFG_CASC0",
"BRKH_CLK_CK_BUFG_CASC6",
"BRKH_CLK_CK_GCLK31",
"BRKH_CLK_CK_GCLK20",
"BRKH_CLK_R_CK_GCLK18",
"BRKH_CLK_R_CK_BUFG_CASC10",
"BRKH_CLK_R_CK_GCLK10",
"BRKH_CLK_CK_BUFG_CASC5",
"BRKH_CLK_R_CK_GCLK16",
"BRKH_CLK_CK_GCLK10",
"BRKH_CLK_R_CK_GCLK29",
"BRKH_CLK_R_CK_GCLK0",
"BRKH_CLK_CK_BUFG_CASC23",
"BRKH_CLK_R_CK_GCLK27",
"BRKH_CLK_CK_GCLK4",
"BRKH_CLK_R_CK_BUFG_CASC20",
"BRKH_CLK_CK_GCLK15",
"BRKH_CLK_CK_BUFG_CASC31",
"BRKH_CLK_R_CK_GCLK14",
"BRKH_CLK_CK_GCLK25",
"BRKH_CLK_R_CK_BUFG_CASC14",
"BRKH_CLK_R_CK_GCLK20",
"BRKH_CLK_R_CK_GCLK15",
"BRKH_CLK_R_CK_GCLK3",
"BRKH_CLK_CK_BUFG_CASC17",
"BRKH_CLK_CK_GCLK20",
"BRKH_CLK_R_CK_GCLK25",
"BRKH_CLK_R_CK_GCLK0",
"BRKH_CLK_R_CK_GCLK12",
"BRKH_CLK_R_CK_GCLK13",
"BRKH_CLK_CK_GCLK22",
"BRKH_CLK_R_CK_BUFG_CASC27",
"BRKH_CLK_R_CK_BUFG_CASC5",
"BRKH_CLK_R_CK_BUFG_CASC29",
"BRKH_CLK_R_CK_BUFG_CASC8",
"BRKH_CLK_CK_GCLK28",
"BRKH_CLK_CK_BUFG_CASC20",
"BRKH_CLK_R_CK_BUFG_CASC26",
"BRKH_CLK_CK_BUFG_CASC0",
"BRKH_CLK_R_CK_GCLK16",
"BRKH_CLK_R_CK_GCLK19",
"BRKH_CLK_R_CK_GCLK8",
"BRKH_CLK_CK_GCLK16",
"BRKH_CLK_CK_GCLK29",
"BRKH_CLK_R_CK_GCLK28",
"BRKH_CLK_CK_GCLK17",
"BRKH_CLK_R_CK_GCLK4",
"BRKH_CLK_R_CK_BUFG_CASC28",
"BRKH_CLK_R_CK_BUFG_CASC0",
"BRKH_CLK_R_CK_GCLK29",
"BRKH_CLK_R_CK_GCLK17",
"BRKH_CLK_CK_GCLK13",
"BRKH_CLK_R_CK_GCLK21",
"BRKH_CLK_CK_BUFG_CASC12",
"BRKH_CLK_CK_GCLK30",
"BRKH_CLK_R_CK_GCLK22",
"BRKH_CLK_CK_GCLK12",
"BRKH_CLK_CK_BUFG_CASC29",
"BRKH_CLK_CK_BUFG_CASC22",
"BRKH_CLK_R_CK_BUFG_CASC25",
"BRKH_CLK_CK_GCLK6",
"BRKH_CLK_CK_GCLK19",
"BRKH_CLK_R_CK_GCLK13",
"BRKH_CLK_R_CK_BUFG_CASC3",
"BRKH_CLK_R_CK_GCLK30",
"BRKH_CLK_R_CK_GCLK11",
"BRKH_CLK_R_CK_BUFG_CASC27",
"BRKH_CLK_R_CK_BUFG_CASC23",
"BRKH_CLK_R_CK_BUFG_CASC12",
"BRKH_CLK_R_CK_GCLK10",
"BRKH_CLK_CK_GCLK0",
"BRKH_CLK_CK_GCLK11",
"BRKH_CLK_CK_BUFG_CASC6",
"BRKH_CLK_CK_GCLK5",
"BRKH_CLK_CK_GCLK27",
"BRKH_CLK_CK_GCLK23",
"BRKH_CLK_CK_GCLK14",
"BRKH_CLK_CK_BUFG_CASC13",
"BRKH_CLK_CK_BUFG_CASC18",
"BRKH_CLK_CK_BUFG_CASC19",
"BRKH_CLK_CK_GCLK7",
"BRKH_CLK_R_CK_GCLK1",
"BRKH_CLK_R_CK_BUFG_CASC18",
"BRKH_CLK_CK_GCLK1",
"BRKH_CLK_CK_BUFG_CASC30",
"BRKH_CLK_R_CK_GCLK6",
"BRKH_CLK_R_CK_GCLK26",
"BRKH_CLK_CK_GCLK31",
"BRKH_CLK_CK_GCLK24",
"BRKH_CLK_CK_BUFG_CASC14",
"BRKH_CLK_CK_BUFG_CASC8",
"BRKH_CLK_R_CK_GCLK2",
"BRKH_CLK_R_CK_BUFG_CASC30",
"BRKH_CLK_CK_BUFG_CASC7",
"BRKH_CLK_R_CK_BUFG_CASC15",
"BRKH_CLK_CK_GCLK26",
"BRKH_CLK_R_CK_BUFG_CASC31",
"BRKH_CLK_CK_BUFG_CASC21",
"BRKH_CLK_CK_BUFG_CASC25",
"BRKH_CLK_R_CK_BUFG_CASC29",
"BRKH_CLK_R_CK_BUFG_CASC13",
"BRKH_CLK_CK_GCLK10",
"BRKH_CLK_R_CK_GCLK5",
"BRKH_CLK_R_CK_GCLK18",
"BRKH_CLK_CK_GCLK9",
"BRKH_CLK_CK_BUFG_CASC5",
"BRKH_CLK_R_CK_BUFG_CASC22",
"BRKH_CLK_CK_BUFG_CASC11",
"BRKH_CLK_CK_GCLK8",
"BRKH_CLK_CK_BUFG_CASC27",
"BRKH_CLK_R_CK_BUFG_CASC21",
"BRKH_CLK_CK_GCLK3",
"BRKH_CLK_R_CK_BUFG_CASC11",
"BRKH_CLK_R_CK_BUFG_CASC7",
"BRKH_CLK_R_CK_BUFG_CASC16",
"BRKH_CLK_R_CK_GCLK23",
"BRKH_CLK_R_CK_GCLK7",
"BRKH_CLK_R_CK_BUFG_CASC24",
"BRKH_CLK_R_CK_BUFG_CASC9",
"BRKH_CLK_R_CK_BUFG_CASC6",
"BRKH_CLK_R_CK_BUFG_CASC17",
"BRKH_CLK_CK_BUFG_CASC24",
"BRKH_CLK_R_CK_GCLK23"
"BRKH_CLK_R_CK_BUFG_CASC1",
"BRKH_CLK_CK_BUFG_CASC16",
"BRKH_CLK_CK_BUFG_CASC9",
"BRKH_CLK_CK_BUFG_CASC26",
"BRKH_CLK_CK_BUFG_CASC15",
"BRKH_CLK_R_CK_BUFG_CASC5",
"BRKH_CLK_CK_GCLK22",
"BRKH_CLK_R_CK_GCLK24",
"BRKH_CLK_CK_GCLK21",
"BRKH_CLK_CK_BUFG_CASC28",
"BRKH_CLK_R_CK_GCLK2",
"BRKH_CLK_CK_BUFG_CASC1",
"BRKH_CLK_CK_BUFG_CASC4",
"BRKH_CLK_CK_GCLK18",
"BRKH_CLK_CK_BUFG_CASC2",
"BRKH_CLK_R_CK_GCLK31",
"BRKH_CLK_CK_BUFG_CASC3",
"BRKH_CLK_CK_GCLK2",
"BRKH_CLK_R_CK_BUFG_CASC2",
"BRKH_CLK_CK_BUFG_CASC10",
"BRKH_CLK_R_CK_BUFG_CASC10",
"BRKH_CLK_R_CK_BUFG_CASC4",
"BRKH_CLK_R_CK_BUFG_CASC19",
"BRKH_CLK_R_CK_GCLK9"
],
"tile_type": "BRKH_CLK",
"sites": []
"sites": [],
"pips": {},
"tile_type": "BRKH_CLK"
}

16
artix7/tile_type_BRKH_CMT.json
View File

@ -1,16 +1,16 @@
{
"pips": {},
"wires": [
"BRKH_CMT_PHASEREF_BELOW0",
"BRKH_CMT_FREQ_REF_NS1",
"BRKH_CMT_PHASEREF1",
"BRKH_CMT_PHASEREF_BELOW1",
"BRKH_CMT_FREQ_REF_NS1",
"BRKH_CMT_FREQ_REF_NS0",
"BRKH_CMT_PHYCTRL_SYNC_BB",
"BRKH_CMT_PHASEREF_BELOW0",
"BRKH_CMT_FREQ_REF_NS2",
"BRKH_CMT_FREQ_REF_NS3",
"BRKH_CMT_PHASEREF0",
"BRKH_CMT_FREQ_REF_NS2"
"BRKH_CMT_PHASEREF_BELOW1",
"BRKH_CMT_PHYCTRL_SYNC_BB"
],
"tile_type": "BRKH_CMT",
"sites": []
"sites": [],
"pips": {},
"tile_type": "BRKH_CMT"
}

186
artix7/tile_type_BRKH_DSP_L.json
View File

@ -1,105 +1,105 @@
{
"pips": {},
"wires": [
"BRKH_DSP_PCIN3",
"BRKH_DSP_BCIN6",
"BRKH_DSP_BCIN0",
"BRKH_DSP_PCIN37",
"BRKH_DSP_PCIN45",
"BRKH_DSP_PCIN34",
"BRKH_DSP_ACIN25",
"BRKH_DSP_PCIN26",
"BRKH_DSP_PCIN27",
"BRKH_DSP_PCIN33",
"BRKH_DSP_PCIN18",
"BRKH_DSP_ACIN16",
"BRKH_DSP_BCIN7",
"BRKH_DSP_ACIN26",
"BRKH_DSP_PCIN40",
"BRKH_DSP_ACIN23",
"BRKH_DSP_PCIN16",
"BRKH_DSP_PCIN4",
"BRKH_DSP_PCIN43",
"BRKH_DSP_PCIN12",
"BRKH_DSP_ACIN12",
"BRKH_DSP_PCIN47",
"BRKH_DSP_PCIN39",
"BRKH_DSP_ACIN18",
"BRKH_DSP_PCIN15",
"BRKH_DSP_ACIN21",
"BRKH_DSP_PCIN44",
"BRKH_DSP_PCIN29",
"BRKH_DSP_PCIN1",
"BRKH_DSP_PCIN35",
"BRKH_DSP_PCIN20",
"BRKH_DSP_ACIN1",
"BRKH_DSP_BCIN4",
"BRKH_DSP_ACIN13",
"BRKH_DSP_ACIN4",
"BRKH_DSP_PCIN2",
"BRKH_DSP_ACIN27",
"BRKH_DSP_ACIN9",
"BRKH_DSP_ACIN6",
"BRKH_DSP_ACIN5",
"BRKH_DSP_ACIN14",
"BRKH_DSP_PCIN31",
"BRKH_DSP_PCIN7",
"BRKH_DSP_PCIN46",
"BRKH_DSP_ACIN8",
"BRKH_DSP_ACIN15",
"BRKH_DSP_ACIN17",
"BRKH_DSP_ACIN28",
"BRKH_DSP_PCIN19",
"BRKH_DSP_BCIN12",
"BRKH_DSP_ACIN22",
"BRKH_DSP_ACIN19",
"BRKH_DSP_BCIN9",
"BRKH_DSP_PCIN12",
"BRKH_DSP_PCIN35",
"BRKH_DSP_ACIN27",
"BRKH_DSP_PCIN40",
"BRKH_DSP_ACIN17",
"BRKH_DSP_ACIN14",
"BRKH_DSP_CARRYCASCIN",
"BRKH_DSP_BCIN5",
"BRKH_DSP_PCIN6",
"BRKH_DSP_PCIN5",
"BRKH_DSP_ACIN2",
"BRKH_DSP_PCIN11",
"BRKH_DSP_BCIN16",
"BRKH_DSP_PCIN21",
"BRKH_DSP_PCIN41",
"BRKH_DSP_PCIN0",
"BRKH_DSP_PCIN38",
"BRKH_DSP_BCIN3",
"BRKH_DSP_PCIN30",
"BRKH_DSP_PCIN32",
"BRKH_DSP_PCIN23",
"BRKH_DSP_ACIN20",
"BRKH_DSP_ACIN29",
"BRKH_DSP_PCIN10",
"BRKH_DSP_PCIN13",
"BRKH_DSP_ACIN3",
"BRKH_DSP_BCIN9",
"BRKH_DSP_BCIN2",
"BRKH_DSP_PCIN17",
"BRKH_DSP_BCIN1",
"BRKH_DSP_PCIN14",
"BRKH_DSP_BCIN14",
"BRKH_DSP_BCIN13",
"BRKH_DSP_ACIN0",
"BRKH_DSP_BCIN17",
"BRKH_DSP_PCIN36",
"BRKH_DSP_PCIN9",
"BRKH_DSP_PCIN24",
"BRKH_DSP_PCIN16",
"BRKH_DSP_PCIN19",
"BRKH_DSP_BCIN10",
"BRKH_DSP_PCIN28",
"BRKH_DSP_PCIN8",
"BRKH_DSP_ACIN7",
"BRKH_DSP_PCIN42",
"BRKH_DSP_BCIN11",
"BRKH_DSP_MULTSIGNIN",
"BRKH_DSP_BCIN15",
"BRKH_DSP_BCIN8",
"BRKH_DSP_PCIN22",
"BRKH_DSP_PCIN25",
"BRKH_DSP_BCIN6",
"BRKH_DSP_ACIN4",
"BRKH_DSP_PCIN41",
"BRKH_DSP_BCIN0",
"BRKH_DSP_PCIN38",
"BRKH_DSP_ACIN23",
"BRKH_DSP_BCIN4",
"BRKH_DSP_MULTSIGNIN",
"BRKH_DSP_PCIN30",
"BRKH_DSP_PCIN9",
"BRKH_DSP_ACIN20",
"BRKH_DSP_PCIN39",
"BRKH_DSP_PCIN26",
"BRKH_DSP_BCIN12",
"BRKH_DSP_ACIN15",
"BRKH_DSP_PCIN17",
"BRKH_DSP_BCIN14",
"BRKH_DSP_PCIN4",
"BRKH_DSP_PCIN33",
"BRKH_DSP_PCIN13",
"BRKH_DSP_PCIN23",
"BRKH_DSP_PCIN24",
"BRKH_DSP_PCIN34",
"BRKH_DSP_PCIN5",
"BRKH_DSP_ACIN25",
"BRKH_DSP_PCIN21",
"BRKH_DSP_PCIN11",
"BRKH_DSP_PCIN22",
"BRKH_DSP_ACIN1",
"BRKH_DSP_PCIN8",
"BRKH_DSP_ACIN6",
"BRKH_DSP_ACIN3",
"BRKH_DSP_ACIN5",
"BRKH_DSP_PCIN3",
"BRKH_DSP_BCIN17",
"BRKH_DSP_PCIN37",
"BRKH_DSP_BCIN8",
"BRKH_DSP_PCIN31",
"BRKH_DSP_BCIN16",
"BRKH_DSP_PCIN18",
"BRKH_DSP_ACIN26",
"BRKH_DSP_ACIN18",
"BRKH_DSP_ACIN16",
"BRKH_DSP_ACIN9",
"BRKH_DSP_BCIN13",
"BRKH_DSP_PCIN7",
"BRKH_DSP_PCIN36",
"BRKH_DSP_ACIN13",
"BRKH_DSP_BCIN1",
"BRKH_DSP_PCIN2",
"BRKH_DSP_PCIN10",
"BRKH_DSP_ACIN12",
"BRKH_DSP_BCIN11",
"BRKH_DSP_ACIN0",
"BRKH_DSP_PCIN29",
"BRKH_DSP_PCIN27",
"BRKH_DSP_ACIN21",
"BRKH_DSP_BCIN7",
"BRKH_DSP_ACIN2",
"BRKH_DSP_ACIN29",
"BRKH_DSP_PCIN42",
"BRKH_DSP_BCIN3",
"BRKH_DSP_PCIN46",
"BRKH_DSP_ACIN11",
"BRKH_DSP_BCIN2",
"BRKH_DSP_PCIN20",
"BRKH_DSP_ACIN10",
"BRKH_DSP_PCIN6",
"BRKH_DSP_ACIN8",
"BRKH_DSP_ACIN22",
"BRKH_DSP_PCIN14",
"BRKH_DSP_BCIN15",
"BRKH_DSP_ACIN7",
"BRKH_DSP_PCIN43",
"BRKH_DSP_ACIN24",
"BRKH_DSP_ACIN10"
"BRKH_DSP_PCIN44",
"BRKH_DSP_PCIN32",
"BRKH_DSP_ACIN19",
"BRKH_DSP_PCIN1",
"BRKH_DSP_PCIN15",
"BRKH_DSP_PCIN0",
"BRKH_DSP_PCIN28",
"BRKH_DSP_PCIN47"
],
"tile_type": "BRKH_DSP_L",
"sites": []
"sites": [],
"pips": {},
"tile_type": "BRKH_DSP_L"
}

186
artix7/tile_type_BRKH_DSP_R.json
View File

@ -1,105 +1,105 @@
{
"pips": {},
"wires": [
"BRKH_DSP_PCIN3",
"BRKH_DSP_BCIN6",
"BRKH_DSP_BCIN0",
"BRKH_DSP_PCIN37",
"BRKH_DSP_PCIN45",
"BRKH_DSP_PCIN34",
"BRKH_DSP_ACIN25",
"BRKH_DSP_PCIN26",
"BRKH_DSP_PCIN27",
"BRKH_DSP_PCIN33",
"BRKH_DSP_PCIN18",
"BRKH_DSP_ACIN16",
"BRKH_DSP_BCIN7",
"BRKH_DSP_ACIN26",
"BRKH_DSP_PCIN40",
"BRKH_DSP_ACIN23",
"BRKH_DSP_PCIN16",
"BRKH_DSP_PCIN4",
"BRKH_DSP_PCIN43",
"BRKH_DSP_PCIN12",
"BRKH_DSP_ACIN12",
"BRKH_DSP_PCIN47",
"BRKH_DSP_PCIN39",
"BRKH_DSP_ACIN18",
"BRKH_DSP_PCIN15",
"BRKH_DSP_ACIN21",
"BRKH_DSP_PCIN44",
"BRKH_DSP_PCIN29",
"BRKH_DSP_PCIN1",
"BRKH_DSP_PCIN35",
"BRKH_DSP_PCIN20",
"BRKH_DSP_ACIN1",
"BRKH_DSP_BCIN4",
"BRKH_DSP_ACIN13",
"BRKH_DSP_ACIN4",
"BRKH_DSP_PCIN2",
"BRKH_DSP_ACIN27",
"BRKH_DSP_ACIN9",
"BRKH_DSP_ACIN6",
"BRKH_DSP_ACIN5",
"BRKH_DSP_ACIN14",
"BRKH_DSP_PCIN31",
"BRKH_DSP_PCIN7",
"BRKH_DSP_PCIN46",
"BRKH_DSP_ACIN8",
"BRKH_DSP_ACIN15",
"BRKH_DSP_ACIN17",
"BRKH_DSP_ACIN28",
"BRKH_DSP_PCIN19",
"BRKH_DSP_BCIN12",
"BRKH_DSP_ACIN22",
"BRKH_DSP_ACIN19",
"BRKH_DSP_BCIN9",
"BRKH_DSP_PCIN12",
"BRKH_DSP_PCIN35",
"BRKH_DSP_ACIN27",
"BRKH_DSP_PCIN40",
"BRKH_DSP_ACIN17",
"BRKH_DSP_ACIN14",
"BRKH_DSP_CARRYCASCIN",
"BRKH_DSP_BCIN5",
"BRKH_DSP_PCIN6",
"BRKH_DSP_PCIN5",
"BRKH_DSP_ACIN2",
"BRKH_DSP_PCIN11",
"BRKH_DSP_BCIN16",
"BRKH_DSP_PCIN21",
"BRKH_DSP_PCIN41",
"BRKH_DSP_PCIN0",
"BRKH_DSP_PCIN38",
"BRKH_DSP_BCIN3",
"BRKH_DSP_PCIN30",
"BRKH_DSP_PCIN32",
"BRKH_DSP_PCIN23",
"BRKH_DSP_ACIN20",
"BRKH_DSP_ACIN29",
"BRKH_DSP_PCIN10",
"BRKH_DSP_PCIN13",
"BRKH_DSP_ACIN3",
"BRKH_DSP_BCIN9",
"BRKH_DSP_BCIN2",
"BRKH_DSP_PCIN17",
"BRKH_DSP_BCIN1",
"BRKH_DSP_PCIN14",
"BRKH_DSP_BCIN14",
"BRKH_DSP_BCIN13",
"BRKH_DSP_ACIN0",
"BRKH_DSP_BCIN17",
"BRKH_DSP_PCIN36",
"BRKH_DSP_PCIN9",
"BRKH_DSP_PCIN24",
"BRKH_DSP_PCIN16",
"BRKH_DSP_PCIN19",
"BRKH_DSP_BCIN10",
"BRKH_DSP_PCIN28",
"BRKH_DSP_PCIN8",
"BRKH_DSP_ACIN7",
"BRKH_DSP_PCIN42",
"BRKH_DSP_BCIN11",
"BRKH_DSP_MULTSIGNIN",
"BRKH_DSP_BCIN15",
"BRKH_DSP_BCIN8",
"BRKH_DSP_PCIN22",
"BRKH_DSP_PCIN25",
"BRKH_DSP_BCIN6",
"BRKH_DSP_ACIN4",
"BRKH_DSP_PCIN41",
"BRKH_DSP_BCIN0",
"BRKH_DSP_PCIN38",
"BRKH_DSP_ACIN23",
"BRKH_DSP_BCIN4",
"BRKH_DSP_MULTSIGNIN",
"BRKH_DSP_PCIN30",
"BRKH_DSP_PCIN9",
"BRKH_DSP_ACIN20",
"BRKH_DSP_PCIN39",
"BRKH_DSP_PCIN26",
"BRKH_DSP_BCIN12",
"BRKH_DSP_ACIN15",
"BRKH_DSP_PCIN17",
"BRKH_DSP_BCIN14",
"BRKH_DSP_PCIN4",
"BRKH_DSP_PCIN33",
"BRKH_DSP_PCIN13",
"BRKH_DSP_PCIN23",
"BRKH_DSP_PCIN24",
"BRKH_DSP_PCIN34",
"BRKH_DSP_PCIN5",
"BRKH_DSP_ACIN25",
"BRKH_DSP_PCIN21",
"BRKH_DSP_PCIN11",
"BRKH_DSP_PCIN22",
"BRKH_DSP_ACIN1",
"BRKH_DSP_PCIN8",
"BRKH_DSP_ACIN6",
"BRKH_DSP_ACIN3",
"BRKH_DSP_ACIN5",
"BRKH_DSP_PCIN3",
"BRKH_DSP_BCIN17",
"BRKH_DSP_PCIN37",
"BRKH_DSP_BCIN8",
"BRKH_DSP_PCIN31",
"BRKH_DSP_BCIN16",
"BRKH_DSP_PCIN18",
"BRKH_DSP_ACIN26",
"BRKH_DSP_ACIN18",
"BRKH_DSP_ACIN16",
"BRKH_DSP_ACIN9",
"BRKH_DSP_BCIN13",
"BRKH_DSP_PCIN7",
"BRKH_DSP_PCIN36",
"BRKH_DSP_ACIN13",
"BRKH_DSP_BCIN1",
"BRKH_DSP_PCIN2",
"BRKH_DSP_PCIN10",
"BRKH_DSP_ACIN12",
"BRKH_DSP_BCIN11",
"BRKH_DSP_ACIN0",
"BRKH_DSP_PCIN29",
"BRKH_DSP_PCIN27",
"BRKH_DSP_ACIN21",
"BRKH_DSP_BCIN7",
"BRKH_DSP_ACIN2",
"BRKH_DSP_ACIN29",
"BRKH_DSP_PCIN42",
"BRKH_DSP_BCIN3",
"BRKH_DSP_PCIN46",
"BRKH_DSP_ACIN11",
"BRKH_DSP_BCIN2",
"BRKH_DSP_PCIN20",
"BRKH_DSP_ACIN10",
"BRKH_DSP_PCIN6",
"BRKH_DSP_ACIN8",
"BRKH_DSP_ACIN22",
"BRKH_DSP_PCIN14",
"BRKH_DSP_BCIN15",
"BRKH_DSP_ACIN7",
"BRKH_DSP_PCIN43",
"BRKH_DSP_ACIN24",
"BRKH_DSP_ACIN10"
"BRKH_DSP_PCIN44",
"BRKH_DSP_PCIN32",
"BRKH_DSP_ACIN19",
"BRKH_DSP_PCIN1",
"BRKH_DSP_PCIN15",
"BRKH_DSP_PCIN0",
"BRKH_DSP_PCIN28",
"BRKH_DSP_PCIN47"
],
"tile_type": "BRKH_DSP_R",
"sites": []
"sites": [],
"pips": {},
"tile_type": "BRKH_DSP_R"
}

164
artix7/tile_type_BRKH_GTX.json
View File

@ -1,104 +1,104 @@
{
"wires": [
"BRKH_GTX_SOUTHREFCLK0_LOWER",
"BRKH_GTX_NORTHREFCLK1_UPPER",
"BRKH_GTX_REFCLK0_LOWER",
"BRKH_GTX_NORTHREFCLK0_UPPER",
"BRKH_GTX_REFCLK1_LOWER",
"BRKH_GTX_REFCLK0_UPPER",
"BRKH_GTX_SOUTHREFCLK0_UPPER",
"BRKH_GTX_SOUTHREFCLK1_UPPER",
"BRKH_GTX_NORTHREFCLK0_LOWER",
"BRKH_GTX_SOUTHREFCLK1_LOWER",
"BRKH_GTX_NORTHREFCLK1_LOWER",
"BRKH_GTX_REFCLK1_UPPER"
],
"sites": [],
"pips": {
"BRKH_GTX.BRKH_GTX_REFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
"is_pseudo": "0",
"BRKH_GTX.BRKH_GTX_NORTHREFCLK0_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
"is_directional": "1",
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
"src_wire": "BRKH_GTX_REFCLK1_UPPER",
"can_invert": "0"
"src_wire": "BRKH_GTX_NORTHREFCLK0_LOWER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
"is_pseudo": "0",
"is_directional": "1",
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK0_LOWER",
"can_invert": "0"
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
"is_pseudo": "0",
"is_directional": "1",
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK0_UPPER",
"can_invert": "0"
},
"BRKH_GTX.BRKH_GTX_NORTHREFCLK1_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
"is_pseudo": "0",
"is_directional": "1",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
"src_wire": "BRKH_GTX_NORTHREFCLK1_LOWER",
"can_invert": "0"
},
"BRKH_GTX.BRKH_GTX_NORTHREFCLK0_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
"is_pseudo": "0",
"is_directional": "1",
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
"src_wire": "BRKH_GTX_NORTHREFCLK0_LOWER",
"can_invert": "0"
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_SOUTHREFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
"is_pseudo": "0",
"is_directional": "1",
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_SOUTHREFCLK0_UPPER",
"can_invert": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
"is_pseudo": "0",
"is_directional": "1",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
"src_wire": "BRKH_GTX_REFCLK1_LOWER",
"can_invert": "0"
},
"BRKH_GTX.BRKH_GTX_SOUTHREFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
"is_pseudo": "0",
"is_directional": "1",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
"src_wire": "BRKH_GTX_SOUTHREFCLK1_UPPER",
"can_invert": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
"is_pseudo": "0",
"is_directional": "1",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
"src_wire": "BRKH_GTX_REFCLK0_UPPER",
"can_invert": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
"is_pseudo": "0",
"is_directional": "1",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
"src_wire": "BRKH_GTX_REFCLK1_UPPER",
"can_invert": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
"is_pseudo": "0",
"is_directional": "1",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
"src_wire": "BRKH_GTX_REFCLK0_LOWER",
"can_invert": "0"
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
"is_pseudo": "0",
"is_directional": "1",
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK1_LOWER",
"can_invert": "0"
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK1_LOWER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK1_UPPER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK0_LOWER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK1_UPPER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK0_UPPER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_NORTHREFCLK1_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
"is_directional": "1",
"src_wire": "BRKH_GTX_NORTHREFCLK1_LOWER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_SOUTHREFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_SOUTHREFCLK1_UPPER",
"is_pseudo": "0"
}
},
"wires": [
"BRKH_GTX_SOUTHREFCLK1_UPPER",
"BRKH_GTX_SOUTHREFCLK0_UPPER",
"BRKH_GTX_REFCLK0_UPPER",
"BRKH_GTX_SOUTHREFCLK0_LOWER",
"BRKH_GTX_NORTHREFCLK0_UPPER",
"BRKH_GTX_SOUTHREFCLK1_LOWER",
"BRKH_GTX_REFCLK1_LOWER",
"BRKH_GTX_REFCLK1_UPPER",
"BRKH_GTX_REFCLK0_LOWER",
"BRKH_GTX_NORTHREFCLK1_UPPER",
"BRKH_GTX_NORTHREFCLK1_LOWER",
"BRKH_GTX_NORTHREFCLK0_LOWER"
],
"tile_type": "BRKH_GTX",
"sites": []
"tile_type": "BRKH_GTX"
}

648
artix7/tile_type_BRKH_INT.json
View File

@ -1,367 +1,367 @@
{
"wires": [
"BRKH_INT_SE6B1",
"BRKH_INT_L_LV6",
"BRKH_INT_SE6C2",
"BRKH_INT_NE6D1",
"BRKH_INT_LVB10",
"BRKH_INT_LVB5",
"BRKH_INT_SL1END2",
"BRKH_INT_LV9",
"BRKH_INT_SS6C2",
"BRKH_INT_NL1BEG2",
"BRKH_INT_SR1END1_SLOW",
"BRKH_INT_NN6C0",
"BRKH_INT_L_LV3",
"BRKH_INT_SE6E2",
"BRKH_INT_NN2BEG0",
"BRKH_INT_NN6A3",
"BRKH_INT_NW6C2",
"BRKH_INT_NR1BEG2_SLOW",
"BRKH_INT_NW6B0",
"BRKH_INT_SW6C3",
"BRKH_INT_NR1BEG3",
"BRKH_INT_NW6D1",
"BRKH_INT_ER1END3",
"BRKH_INT_NL1BEG0_SLOW",
"BRKH_INT_NW6D0",
"BRKH_INT_NW2BEG1",
"BRKH_INT_SS6END1",
"BRKH_INT_NN6BEG1",
"BRKH_INT_NW6END_S0_0",
"BRKH_INT_SE6B2",
"BRKH_INT_SS2A3",
"BRKH_INT_LVB_L10",
"BRKH_INT_NE6A1",
"BRKH_INT_L_LV1",
"BRKH_INT_SW2A3",
"BRKH_INT_SS6D3",
"BRKH_INT_NN2A2",
"BRKH_INT_SR1END3",
"BRKH_INT_NL1END_S3_0",
"BRKH_INT_SL1END2_SLOW",
"BRKH_INT_SE2A2",
"BRKH_INT_SE2A0",
"BRKH_INT_NL1BEG1_SLOW",
"BRKH_INT_SW6E1",
"BRKH_INT_NE2BEG1",
"BRKH_INT_SS2A1",
"BRKH_INT_SS6A0",
"BRKH_INT_LV10",
"BRKH_INT_SE6D0",
"BRKH_INT_NW2END_S0_0",
"BRKH_INT_SS6C1",
"BRKH_INT_LVB3",
"BRKH_INT_SW2A0",
"BRKH_INT_SW6B0",
"BRKH_INT_SW6E2",
"BRKH_INT_NN6C1",
"BRKH_INT_SW6D3",
"BRKH_INT_NL1BEG2_SLOW",
"BRKH_INT_LV3",
"BRKH_INT_LV13",
"BRKH_INT_NW6C3",
"BRKH_INT_NE2END_S3_0",
"BRKH_INT_SS2END3",
"BRKH_INT_SS6C3",
"BRKH_INT_SS2END2",
"BRKH_INT_NW2BEG2",
"BRKH_INT_SW6B1",
"BRKH_INT_NN6A1",
"BRKH_INT_SS6END0",
"BRKH_INT_NR1BEG1",
"BRKH_INT_SS6D2",
"BRKH_INT_SW6E3",
"BRKH_INT_SE6D1",
"BRKH_INT_BYP_BOUNCE2",
"BRKH_INT_BYP_BOUNCE6",
"BRKH_INT_SL1END1_SLOW",
"BRKH_INT_NE6B0",
"BRKH_INT_NW2BEG0",
"BRKH_INT_SE6B3",
"BRKH_INT_NN2A0",
"BRKH_INT_LV17",
"BRKH_INT_NN2BEG1",
"BRKH_INT_SL1END3_SLOW",
"BRKH_INT_SS6A3",
"BRKH_INT_ER1BEG_S0",
"BRKH_INT_NN6E0",
"BRKH_INT_NN2A3",
"BRKH_INT_SS6E2",
"BRKH_INT_SS6B0",
"BRKH_INT_NW2BEG3",
"BRKH_INT_NR1BEG2",
"BRKH_INT_SE6B0",
"BRKH_INT_SS2END_N0_3",
"BRKH_INT_SS6C0",
"BRKH_INT_NE6A2",
"BRKH_INT_NW6A0",
"BRKH_INT_SE6D3",
"BRKH_INT_LV8",
"BRKH_INT_NW6A2",
"BRKH_INT_NN6BEG3",
"BRKH_INT_NN2BEG2",
"BRKH_INT_NN6A2",
"BRKH_INT_SW6D2",
"BRKH_INT_LV5",
"BRKH_INT_EL1BEG3",
"BRKH_INT_L_LV14",
"BRKH_INT_SR1END_N3_3",
"BRKH_INT_NE6B1",
"BRKH_INT_LVB_L2",
"BRKH_INT_LVB_L7",
"BRKH_INT_SS6E3",
"BRKH_INT_NN6A0",
"BRKH_INT_NE6B2",
"BRKH_INT_NN6B3",
"BRKH_INT_SS6B2",
"BRKH_INT_NE2BEG0",
"BRKH_INT_SE6E0",
"BRKH_INT_SS6B1",
"BRKH_INT_SW6C2",
"BRKH_INT_SW2END3",
"BRKH_INT_LV1",
"BRKH_INT_SR1END2_SLOW",
"BRKH_INT_NE6D2",
"BRKH_INT_NN6BEG0",
"BRKH_INT_L_LV10",
"BRKH_INT_SE2A1",
"BRKH_INT_SS6END2",
"BRKH_INT_L_LV17",
"BRKH_INT_NR1BEG0_SLOW",
"BRKH_INT_LV12",
"BRKH_INT_NR1BEG0",
"BRKH_INT_SW6C0",
"BRKH_INT_NE2BEG2",
"BRKH_INT_SR1END3_SLOW",
"BRKH_INT_SS6END3",
"BRKH_INT_WW2END3",
"BRKH_INT_LVB7",
"BRKH_INT_NW6A3",
"BRKH_INT_NE6B3",
"BRKH_INT_LVB2",
"BRKH_INT_LVB_L5",
"BRKH_INT_SE6E1",
"BRKH_INT_SW6B3",
"BRKH_INT_NW6D2",
"BRKH_INT_WW4END_S0_0",
"BRKH_INT_SL1END0_SLOW",
"BRKH_INT_NL1BEG1",
"BRKH_INT_L_LV9",
"BRKH_INT_L_LV0",
"BRKH_INT_WL1BEG3",
"BRKH_INT_LVB12",
"BRKH_INT_LVB_L8",
"BRKH_INT_NE6A3",
"BRKH_INT_NE6C1",
"BRKH_INT_NN2BEG3",
"BRKH_INT_SW2A1",
"BRKH_INT_LVB_L6",
"BRKH_INT_NE6C3",
"BRKH_INT_SR1END1",
"BRKH_INT_SW6C1",
"BRKH_INT_LV0",
"BRKH_INT_L_LV2",
"BRKH_INT_NW6B2",
"BRKH_INT_SS6D0",
"BRKH_INT_SS6B3",
"BRKH_INT_NE2BEG3",
"BRKH_INT_LV7",
"BRKH_INT_SE6C3",
"BRKH_INT_NN6E3",
"BRKH_INT_NN6D0",
"BRKH_INT_NN6D1",
"BRKH_INT_SS6A2",
"BRKH_INT_LVB1",
"BRKH_INT_LV6",
"BRKH_INT_NN6END_S1_0",
"BRKH_INT_LVB8",
"BRKH_INT_NN6C2",
"BRKH_INT_NN6B1",
"BRKH_INT_LV15",
"BRKH_INT_NW6C0",
"BRKH_INT_LV11",
"BRKH_INT_LVB_L4",
"BRKH_INT_LV16",
"BRKH_INT_NN6C3",
"BRKH_INT_SS2END0",
"BRKH_INT_WR1END_S1_0",
"BRKH_INT_SS6A1",
"BRKH_INT_NE6C0",
"BRKH_INT_SW6D1",
"BRKH_INT_LV4",
"BRKH_INT_SR1END2",
"BRKH_INT_FAN_BOUNCE_S3_6",
"BRKH_INT_SS6END_N0_3",
"BRKH_INT_LV2",
"BRKH_INT_NR1BEG1_SLOW",
"BRKH_INT_SE6E3",
"BRKH_INT_NN2A1",
"BRKH_INT_NE6C2",
"BRKH_INT_NN6D3",
"BRKH_INT_WR1BEG_S0",
"BRKH_INT_LVB_L1",
"BRKH_INT_L_LV5",
"BRKH_INT_EL1END_S3_0",
"BRKH_INT_FAN_BOUNCE_S3_0",
"BRKH_INT_LVB4",
"BRKH_INT_L_LV8",
"BRKH_INT_SW2A2",
"BRKH_INT_NE6A0",
"BRKH_INT_BYP_BOUNCE3",
"BRKH_INT_SW6B2",
"BRKH_INT_NW6D3",
"BRKH_INT_LVB11",
"BRKH_INT_LVB_L9",
"BRKH_INT_SL1END0",
"BRKH_INT_NE6D3",
"BRKH_INT_NW6B1",
"BRKH_INT_L_LV13",
"BRKH_INT_L_LV7",
"BRKH_INT_NL1BEG0",
"BRKH_INT_NN6E2",
"BRKH_INT_L_LV12",
"BRKH_INT_BYP_BOUNCE7",
"BRKH_INT_SL1END1",
"BRKH_INT_SE6D2",
"BRKH_INT_NE6D0",
"BRKH_INT_L_LV4",
"BRKH_INT_WL1END3",
"BRKH_INT_FAN_BOUNCE_S3_2",
"BRKH_INT_NW6A1",
"BRKH_INT_LVB9",
"BRKH_INT_SL1END3",
"BRKH_INT_SE6C1",
"BRKH_INT_LVB_L3",
"BRKH_INT_NN6B2",
"BRKH_INT_SS2END1",
"BRKH_INT_NW6B3",
"BRKH_INT_SW6E0",
"BRKH_INT_SS2A0",
"BRKH_INT_LVB_L11",
"BRKH_INT_NW6C1",
"BRKH_INT_SW6END3",
"BRKH_INT_SS2A2",
"BRKH_INT_L_LV15",
"BRKH_INT_LVB_L12",
"BRKH_INT_L_LV11",
"BRKH_INT_NN2END_S2_0",
"BRKH_INT_SE2A3",
"BRKH_INT_SS6E1",
"BRKH_INT_SS6D1",
"BRKH_INT_SE6C0",
"BRKH_INT_SS6E0",
"BRKH_INT_NR1BEG3_SLOW",
"BRKH_INT_FAN_BOUNCE_S3_4",
"BRKH_INT_NN6E1",
"BRKH_INT_NN6D2",
"BRKH_INT_L_LV16",
"BRKH_INT_SW6D0",
"BRKH_INT_NN6B0",
"BRKH_INT_LVB6",
"BRKH_INT_NN6BEG2",
"BRKH_INT_LV14"
],
"sites": [],
"pips": {
"BRKH_INT.BRKH_INT_NR1BEG1->>BRKH_INT_NR1BEG1_SLOW": {
"is_pseudo": "0",
"dst_wire": "BRKH_INT_NR1BEG1_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NR1BEG1",
"can_invert": "0"
},
"BRKH_INT.BRKH_INT_NL1BEG2->>BRKH_INT_NL1BEG2_SLOW": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "BRKH_INT_NL1BEG2_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NL1BEG2",
"can_invert": "0"
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SL1END2_SLOW->>BRKH_INT_SL1END2": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "BRKH_INT_SL1END2",
"is_directional": "1",
"src_wire": "BRKH_INT_SL1END2_SLOW",
"can_invert": "0"
},
"BRKH_INT.BRKH_INT_SR1END2_SLOW->>BRKH_INT_SR1END2": {
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SR1END2",
"is_directional": "1",
"src_wire": "BRKH_INT_SR1END2_SLOW",
"can_invert": "0"
},
"BRKH_INT.BRKH_INT_NR1BEG0->>BRKH_INT_NR1BEG0_SLOW": {
"is_pseudo": "0",
"dst_wire": "BRKH_INT_NR1BEG0_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NR1BEG0",
"can_invert": "0"
},
"BRKH_INT.BRKH_INT_SR1END1_SLOW->>BRKH_INT_SR1END1": {
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SR1END1",
"is_directional": "1",
"src_wire": "BRKH_INT_SR1END1_SLOW",
"can_invert": "0"
},
"BRKH_INT.BRKH_INT_SL1END3_SLOW->>BRKH_INT_SL1END3": {
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SL1END3",
"is_directional": "1",
"src_wire": "BRKH_INT_SL1END3_SLOW",
"can_invert": "0"
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_NL1BEG0->>BRKH_INT_NL1BEG0_SLOW": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "BRKH_INT_NL1BEG0_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NL1BEG0",
"can_invert": "0"
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_NR1BEG2->>BRKH_INT_NR1BEG2_SLOW": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "BRKH_INT_NR1BEG2_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NR1BEG2",
"can_invert": "0"
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_NL1BEG1->>BRKH_INT_NL1BEG1_SLOW": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "BRKH_INT_NL1BEG1_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NL1BEG1",
"can_invert": "0"
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SL1END0_SLOW->>BRKH_INT_SL1END0": {
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SL1END0",
"BRKH_INT.BRKH_INT_SR1END2_SLOW->>BRKH_INT_SR1END2": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SR1END2",
"is_directional": "1",
"src_wire": "BRKH_INT_SL1END0_SLOW",
"can_invert": "0"
"src_wire": "BRKH_INT_SR1END2_SLOW",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_NR1BEG3->>BRKH_INT_NR1BEG3_SLOW": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "BRKH_INT_NR1BEG3_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NR1BEG3",
"can_invert": "0"
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SL1END1_SLOW->>BRKH_INT_SL1END1": {
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SL1END1",
"BRKH_INT.BRKH_INT_NR1BEG0->>BRKH_INT_NR1BEG0_SLOW": {
"can_invert": "0",
"dst_wire": "BRKH_INT_NR1BEG0_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_SL1END1_SLOW",
"can_invert": "0"
"src_wire": "BRKH_INT_NR1BEG0",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SR1END3_SLOW->>BRKH_INT_SR1END3": {
"is_pseudo": "0",
"can_invert": "0",
"dst_wire": "BRKH_INT_SR1END3",
"is_directional": "1",
"src_wire": "BRKH_INT_SR1END3_SLOW",
"can_invert": "0"
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SR1END1_SLOW->>BRKH_INT_SR1END1": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SR1END1",
"is_directional": "1",
"src_wire": "BRKH_INT_SR1END1_SLOW",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SL1END0_SLOW->>BRKH_INT_SL1END0": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SL1END0",
"is_directional": "1",
"src_wire": "BRKH_INT_SL1END0_SLOW",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_NR1BEG1->>BRKH_INT_NR1BEG1_SLOW": {
"can_invert": "0",
"dst_wire": "BRKH_INT_NR1BEG1_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NR1BEG1",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SL1END3_SLOW->>BRKH_INT_SL1END3": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SL1END3",
"is_directional": "1",
"src_wire": "BRKH_INT_SL1END3_SLOW",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SL1END1_SLOW->>BRKH_INT_SL1END1": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SL1END1",
"is_directional": "1",
"src_wire": "BRKH_INT_SL1END1_SLOW",
"is_pseudo": "0"
}
},
"wires": [
"BRKH_INT_SW2A2",
"BRKH_INT_LVB_L9",
"BRKH_INT_L_LV15",
"BRKH_INT_SS6B3",
"BRKH_INT_SW6D0",
"BRKH_INT_NN6E1",
"BRKH_INT_LVB_L6",
"BRKH_INT_SL1END1_SLOW",
"BRKH_INT_NN6B1",
"BRKH_INT_LV4",
"BRKH_INT_SR1END_N3_3",
"BRKH_INT_L_LV4",
"BRKH_INT_SS6A3",
"BRKH_INT_L_LV6",
"BRKH_INT_LVB_L5",
"BRKH_INT_ER1END3",
"BRKH_INT_LVB_L3",
"BRKH_INT_SW6E3",
"BRKH_INT_BYP_BOUNCE7",
"BRKH_INT_NN6A0",
"BRKH_INT_SS2A2",
"BRKH_INT_SS6D3",
"BRKH_INT_SW6D2",
"BRKH_INT_LV16",
"BRKH_INT_LV10",
"BRKH_INT_FAN_BOUNCE_S3_0",
"BRKH_INT_BYP_BOUNCE6",
"BRKH_INT_NW6B2",
"BRKH_INT_SR1END2_SLOW",
"BRKH_INT_L_LV17",
"BRKH_INT_NN6A3",
"BRKH_INT_NN6E0",
"BRKH_INT_NN6E3",
"BRKH_INT_SE6E1",
"BRKH_INT_LVB9",
"BRKH_INT_SR1END3",
"BRKH_INT_SS2END1",
"BRKH_INT_LVB_L12",
"BRKH_INT_NN2A0",
"BRKH_INT_NN6END_S1_0",
"BRKH_INT_EL1END_S3_0",
"BRKH_INT_NW6D3",
"BRKH_INT_LV8",
"BRKH_INT_SE6D2",
"BRKH_INT_SL1END2_SLOW",
"BRKH_INT_NE6B2",
"BRKH_INT_NN6BEG3",
"BRKH_INT_L_LV14",
"BRKH_INT_SS6C3",
"BRKH_INT_NW6C1",
"BRKH_INT_L_LV13",
"BRKH_INT_SS6END1",
"BRKH_INT_SS6A0",
"BRKH_INT_SW6C0",
"BRKH_INT_LVB5",
"BRKH_INT_NE6B3",
"BRKH_INT_SW6E1",
"BRKH_INT_L_LV10",
"BRKH_INT_L_LV11",
"BRKH_INT_LVB_L7",
"BRKH_INT_SS2A3",
"BRKH_INT_ER1BEG_S0",
"BRKH_INT_SW2A3",
"BRKH_INT_LVB_L10",
"BRKH_INT_NE2BEG3",
"BRKH_INT_NE6D3",
"BRKH_INT_NW6B3",
"BRKH_INT_SW6B0",
"BRKH_INT_NR1BEG0",
"BRKH_INT_NW2BEG3",
"BRKH_INT_NW6A0",
"BRKH_INT_NN6B0",
"BRKH_INT_NW6D0",
"BRKH_INT_LVB7",
"BRKH_INT_SS6A1",
"BRKH_INT_NW6D2",
"BRKH_INT_SE6B0",
"BRKH_INT_SE6C0",
"BRKH_INT_NE6A2",
"BRKH_INT_LV6",
"BRKH_INT_LV17",
"BRKH_INT_LV0",
"BRKH_INT_SE6B2",
"BRKH_INT_L_LV3",
"BRKH_INT_NN6A2",
"BRKH_INT_NE6B0",
"BRKH_INT_SW6E0",
"BRKH_INT_NL1BEG2_SLOW",
"BRKH_INT_NN6B3",
"BRKH_INT_SW2END3",
"BRKH_INT_NL1BEG1_SLOW",
"BRKH_INT_NL1BEG0",
"BRKH_INT_NW6D1",
"BRKH_INT_NW6END_S0_0",
"BRKH_INT_SR1END2",
"BRKH_INT_SE6E0",
"BRKH_INT_NW2END_S0_0",
"BRKH_INT_WR1BEG_S0",
"BRKH_INT_SE6E2",
"BRKH_INT_SW6D1",
"BRKH_INT_BYP_BOUNCE3",
"BRKH_INT_SE2A2",
"BRKH_INT_SS6D0",
"BRKH_INT_WR1END_S1_0",
"BRKH_INT_SE6C3",
"BRKH_INT_NW2BEG0",
"BRKH_INT_NW6A3",
"BRKH_INT_SE2A3",
"BRKH_INT_NN6B2",
"BRKH_INT_NE6C1",
"BRKH_INT_LVB1",
"BRKH_INT_NN2A3",
"BRKH_INT_NR1BEG2",
"BRKH_INT_NR1BEG2_SLOW",
"BRKH_INT_NN6A1",
"BRKH_INT_NN6C1",
"BRKH_INT_NE6C0",
"BRKH_INT_NE6D1",
"BRKH_INT_NE6D0",
"BRKH_INT_NW6C0",
"BRKH_INT_LVB8",
"BRKH_INT_NR1BEG3_SLOW",
"BRKH_INT_LVB_L8",
"BRKH_INT_LV13",
"BRKH_INT_WW4END_S0_0",
"BRKH_INT_SR1END1",
"BRKH_INT_NR1BEG1",
"BRKH_INT_SW2A0",
"BRKH_INT_NN2BEG2",
"BRKH_INT_NN6C2",
"BRKH_INT_NE6D2",
"BRKH_INT_NW6B1",
"BRKH_INT_NW2BEG1",
"BRKH_INT_LVB11",
"BRKH_INT_NE6B1",
"BRKH_INT_LVB6",
"BRKH_INT_WL1END3",
"BRKH_INT_SS6END2",
"BRKH_INT_SS6E0",
"BRKH_INT_LVB12",
"BRKH_INT_SS2END2",
"BRKH_INT_NE6A3",
"BRKH_INT_L_LV5",
"BRKH_INT_NR1BEG1_SLOW",
"BRKH_INT_NN2BEG0",
"BRKH_INT_SL1END0_SLOW",
"BRKH_INT_SW6B1",
"BRKH_INT_LV3",
"BRKH_INT_LVB3",
"BRKH_INT_LVB_L1",
"BRKH_INT_NE2BEG1",
"BRKH_INT_LV14",
"BRKH_INT_NN2END_S2_0",
"BRKH_INT_NN6D2",
"BRKH_INT_SS6C2",
"BRKH_INT_SR1END3_SLOW",
"BRKH_INT_NR1BEG0_SLOW",
"BRKH_INT_NN2BEG3",
"BRKH_INT_SS6D1",
"BRKH_INT_SE6B1",
"BRKH_INT_SS6END3",
"BRKH_INT_NN6C3",
"BRKH_INT_NN2BEG1",
"BRKH_INT_SS6C0",
"BRKH_INT_SS2A1",
"BRKH_INT_SS6B1",
"BRKH_INT_L_LV1",
"BRKH_INT_L_LV8",
"BRKH_INT_SW6C2",
"BRKH_INT_SW6B2",
"BRKH_INT_NE6A0",
"BRKH_INT_LVB2",
"BRKH_INT_LV11",
"BRKH_INT_WL1BEG3",
"BRKH_INT_NW6A1",
"BRKH_INT_NW6C3",
"BRKH_INT_LV15",
"BRKH_INT_SE2A1",
"BRKH_INT_FAN_BOUNCE_S3_6",
"BRKH_INT_SS6D2",
"BRKH_INT_SW6B3",
"BRKH_INT_LV1",
"BRKH_INT_NN6BEG1",
"BRKH_INT_SS6C1",
"BRKH_INT_NL1BEG1",
"BRKH_INT_NN6BEG0",
"BRKH_INT_NE6C2",
"BRKH_INT_SS2END0",
"BRKH_INT_BYP_BOUNCE2",
"BRKH_INT_EL1BEG3",
"BRKH_INT_LVB4",
"BRKH_INT_LV5",
"BRKH_INT_SE6D3",
"BRKH_INT_L_LV9",
"BRKH_INT_FAN_BOUNCE_S3_4",
"BRKH_INT_NL1BEG2",
"BRKH_INT_SS6B0",
"BRKH_INT_SS2A0",
"BRKH_INT_L_LV2",
"BRKH_INT_SR1END1_SLOW",
"BRKH_INT_SS6E3",
"BRKH_INT_NW6A2",
"BRKH_INT_SL1END3_SLOW",
"BRKH_INT_SW6C3",
"BRKH_INT_SW6E2",
"BRKH_INT_SW6D3",
"BRKH_INT_SS6END_N0_3",
"BRKH_INT_NN6C0",
"BRKH_INT_NN6BEG2",
"BRKH_INT_SE6D0",
"BRKH_INT_NE6C3",
"BRKH_INT_SS6A2",
"BRKH_INT_SS6END0",
"BRKH_INT_LV12",
"BRKH_INT_L_LV16",
"BRKH_INT_SE2A0",
"BRKH_INT_LVB_L2",
"BRKH_INT_NE2BEG0",
"BRKH_INT_NN6E2",
"BRKH_INT_L_LV0",
"BRKH_INT_L_LV12",
"BRKH_INT_NL1END_S3_0",
"BRKH_INT_SL1END0",
"BRKH_INT_FAN_BOUNCE_S3_2",
"BRKH_INT_SL1END1",
"BRKH_INT_SW6C1",
"BRKH_INT_NE2BEG2",
"BRKH_INT_SE6B3",
"BRKH_INT_NN6D0",
"BRKH_INT_SS2END_N0_3",
"BRKH_INT_SS2END3",
"BRKH_INT_LV7",
"BRKH_INT_SE6D1",
"BRKH_INT_SE6C2",
"BRKH_INT_NE2END_S3_0",
"BRKH_INT_LV9",
"BRKH_INT_WW2END3",
"BRKH_INT_NN2A2",
"BRKH_INT_NW2BEG2",
"BRKH_INT_SW2A1",
"BRKH_INT_NN6D3",
"BRKH_INT_NN2A1",
"BRKH_INT_SS6E2",
"BRKH_INT_LVB_L11",
"BRKH_INT_SE6C1",
"BRKH_INT_SL1END2",
"BRKH_INT_L_LV7",
"BRKH_INT_NE6A1",
"BRKH_INT_LVB10",
"BRKH_INT_NW6B0",
"BRKH_INT_SL1END3",
"BRKH_INT_NN6D1",
"BRKH_INT_SW6END3",
"BRKH_INT_SS6E1",
"BRKH_INT_SE6E3",
"BRKH_INT_SS6B2",
"BRKH_INT_LV2",
"BRKH_INT_NR1BEG3",
"BRKH_INT_NL1BEG0_SLOW",
"BRKH_INT_NW6C2",
"BRKH_INT_LVB_L4"
],
"tile_type": "BRKH_INT",
"sites": []
"tile_type": "BRKH_INT"
}

226
artix7/tile_type_BRKH_TERM_INT.json
View File

@ -1,124 +1,124 @@
{
"pips": {},
"wires": [
"T_TERM_UTURN_INT_SW6E3",
"T_TERM_UTURN_INT_SE2A1",
"T_TERM_UTURN_INT_SE6E0",
"T_TERM_UTURN_INT_LV_L3",
"T_TERM_UTURN_INT_SS6D0",
"T_TERM_UTURN_INT_SS6B3",
"T_TERM_UTURN_INT_SL1END0_SLOW",
"T_TERM_UTURN_INT_SW6E0",
"T_TERM_UTURN_INT_SE6D2",
"T_TERM_UTURN_INT_WR1END_S1_0",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_2",
"T_TERM_UTURN_INT_SW6D3",
"T_TERM_UTURN_INT_SW6B3",
"T_TERM_UTURN_INT_SE6B0",
"T_TERM_UTURN_INT_SW2A3",
"T_TERM_UTURN_INT_LV_L4",
"T_TERM_UTURN_INT_SE2A2",
"T_TERM_UTURN_INT_SL1END3_SLOW",
"T_TERM_UTURN_INT_SE6E2",
"T_TERM_UTURN_INT_LVB2",
"T_TERM_UTURN_INT_SS6END2",
"T_TERM_UTURN_INT_SE6B3",
"T_TERM_INT_UTURN_LV_R4",
"T_TERM_UTURN_INT_LV_L16",
"T_TERM_UTURN_INT_SS2A0",
"T_TERM_UTURN_INT_SE6C3",
"T_TERM_UTURN_INT_LVB_L4",
"T_TERM_UTURN_INT_SW6D2",
"T_TERM_UTURN_INT_LV_L7",
"T_TERM_UTURN_INT_LV_L17",
"T_TERM_UTURN_INT_SS6B1",
"T_TERM_INT_UTURN_LV_R3",
"T_TERM_UTURN_INT_SS6B0",
"T_TERM_UTURN_INT_SS6D1",
"T_TERM_UTURN_INT_SE6D0",
"T_TERM_UTURN_INT_SS6D2",
"T_TERM_UTURN_INT_SS6C3",
"T_TERM_UTURN_INT_SE6C1",
"T_TERM_UTURN_INT_SS2A2",
"T_TERM_UTURN_INT_SS6END3",
"T_TERM_UTURN_INT_SE2A3",
"T_TERM_UTURN_INT_SS6C1",
"T_TERM_UTURN_INT_SS2A3",
"T_TERM_UTURN_INT_LVB0",
"T_TERM_UTURN_INT_LVB1",
"T_TERM_UTURN_INT_SS6A1",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_4",
"T_TERM_UTURN_INT_LVB4",
"T_TERM_UTURN_INT_LV_L9",
"T_TERM_UTURN_INT_SS6END0",
"T_TERM_INT_UTURN_LV_R6",
"T_TERM_INT_UTURN_LV_R7",
"T_TERM_UTURN_INT_SW2A1",
"T_TERM_UTURN_INT_SS6A2",
"T_TERM_UTURN_INT_SW2A2",
"T_TERM_UTURN_INT_LVB5",
"T_TERM_UTURN_INT_LVB3",
"T_TERM_UTURN_INT_SE6B2",
"T_TERM_UTURN_INT_SS2END0",
"T_TERM_UTURN_INT_SW6B1",
"T_TERM_UTURN_INT_SS6D3",
"T_TERM_UTURN_INT_ER1END3",
"T_TERM_UTURN_INT_SL1END1_SLOW",
"T_TERM_UTURN_INT_SE6C2",
"T_TERM_UTURN_INT_SR1END1_SLOW",
"T_TERM_UTURN_INT_SW2A0",
"T_TERM_UTURN_INT_SW6C1",
"T_TERM_INT_UTURN_LV_R16",
"T_TERM_UTURN_INT_SE6D3",
"T_TERM_UTURN_INT_SW6E1",
"T_TERM_UTURN_INT_SS6A3",
"T_TERM_UTURN_INT_SW6C0",
"T_TERM_UTURN_INT_SR1END3_SLOW",
"T_TERM_UTURN_INT_SW6B2",
"T_TERM_UTURN_INT_SE6E3",
"T_TERM_UTURN_INT_LVB_L3",
"T_TERM_UTURN_INT_SS6E3",
"T_TERM_UTURN_INT_SW6D1",
"T_TERM_UTURN_INT_LVB_L0",
"T_TERM_UTURN_INT_SS6E0",
"T_TERM_UTURN_INT_SW6C2",
"T_TERM_UTURN_INT_SS2END1",
"T_TERM_UTURN_INT_SS6C0",
"T_TERM_INT_UTURN_LV_R2",
"T_TERM_INT_UTURN_LV_R17",
"T_TERM_UTURN_INT_SS6END1",
"T_TERM_INT_UTURN_LV_R5",
"T_TERM_UTURN_INT_LV_L2",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_6",
"T_TERM_UTURN_INT_LVB_L1",
"T_TERM_UTURN_INT_LVB_L5",
"T_TERM_UTURN_INT_SL1END2_SLOW",
"T_TERM_UTURN_INT_SW6C3",
"T_TERM_UTURN_INT_SS6A0",
"T_TERM_INT_UTURN_LV_R9",
"T_TERM_UTURN_INT_SE6E1",
"T_TERM_UTURN_INT_SE6C3",
"T_TERM_UTURN_INT_SW6D3",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_0",
"T_TERM_UTURN_INT_SE6C0",
"T_TERM_UTURN_INT_SE2A0",
"T_TERM_UTURN_INT_LV_L5",
"T_TERM_UTURN_INT_SE6B1",
"T_TERM_UTURN_INT_SS6C2",
"T_TERM_UTURN_INT_SS6E1",
"T_TERM_UTURN_INT_LV_L6",
"T_TERM_UTURN_INT_SS2END3",
"T_TERM_UTURN_INT_SS6B2",
"T_TERM_UTURN_INT_SS6E2",
"T_TERM_UTURN_INT_WR1BEG_S0",
"T_TERM_UTURN_INT_SE6E3",
"T_TERM_UTURN_INT_SS2A1",
"T_TERM_UTURN_INT_SS2END2",
"T_TERM_UTURN_INT_SW6E2",
"T_TERM_UTURN_INT_SW6C3",
"T_TERM_UTURN_INT_LV_L16",
"T_TERM_UTURN_INT_SS6B0",
"T_TERM_INT_UTURN_LV_R2",
"T_TERM_UTURN_INT_SS2A2",
"T_TERM_UTURN_INT_SW2A3",
"T_TERM_UTURN_INT_SS6END3",
"T_TERM_UTURN_INT_LVB1",
"T_TERM_INT_UTURN_LV_R5",
"T_TERM_UTURN_INT_SE6E1",
"T_TERM_INT_UTURN_LV_R17",
"T_TERM_UTURN_INT_SE6D3",
"T_TERM_UTURN_INT_SW6D1",
"T_TERM_UTURN_INT_SW2A1",
"T_TERM_UTURN_INT_SS6B2",
"T_TERM_UTURN_INT_LV_L4",
"T_TERM_UTURN_INT_SW6E3",
"T_TERM_UTURN_INT_SS6A3",
"T_TERM_UTURN_INT_LV_L17",
"T_TERM_UTURN_INT_SW2A0",
"T_TERM_UTURN_INT_LV_L6",
"T_TERM_INT_UTURN_LV_R9",
"T_TERM_UTURN_INT_SE2A3",
"T_TERM_UTURN_INT_SS6C0",
"T_TERM_UTURN_INT_SE6D0",
"T_TERM_UTURN_INT_SW6E1",
"T_TERM_UTURN_INT_LV_L2",
"T_TERM_UTURN_INT_SE2A0",
"T_TERM_UTURN_INT_SL1END2_SLOW",
"T_TERM_UTURN_INT_SW6D0",
"T_TERM_UTURN_INT_SR1END2_SLOW",
"T_TERM_UTURN_INT_LVB0",
"T_TERM_UTURN_INT_SS6END1",
"T_TERM_UTURN_INT_SR1END3_SLOW",
"T_TERM_UTURN_INT_SW6C1",
"T_TERM_UTURN_INT_SS6E1",
"T_TERM_UTURN_INT_SW6B0",
"T_TERM_UTURN_INT_LVB_L2",
"T_TERM_UTURN_INT_LVB2",
"T_TERM_UTURN_INT_SS2END0",
"T_TERM_UTURN_INT_SS6D3",
"T_TERM_UTURN_INT_SS6E2",
"T_TERM_INT_UTURN_LV_R4",
"T_TERM_INT_UTURN_LV_R6",
"T_TERM_UTURN_INT_SS6D1",
"T_TERM_UTURN_INT_SS6A0",
"T_TERM_UTURN_INT_SS2END1",
"T_TERM_UTURN_INT_SE6D1",
"T_TERM_UTURN_INT_SS6A1",
"T_TERM_UTURN_INT_LVB_L5",
"T_TERM_UTURN_INT_SW2A2",
"T_TERM_UTURN_INT_LVB_L2",
"T_TERM_UTURN_INT_LVB_L3",
"T_TERM_UTURN_INT_SS6C2",
"T_TERM_UTURN_INT_SS6D0",
"T_TERM_UTURN_INT_SS2A0",
"T_TERM_UTURN_INT_LV_L9",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_4",
"T_TERM_UTURN_INT_SS6B1",
"T_TERM_UTURN_INT_SW6E2",
"T_TERM_UTURN_INT_SW6B2",
"T_TERM_UTURN_INT_SE2A1",
"T_TERM_UTURN_INT_SR1END2_SLOW",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_6",
"T_TERM_UTURN_INT_SE6B2",
"T_TERM_UTURN_INT_SE6D2",
"T_TERM_UTURN_INT_SE6B3",
"T_TERM_UTURN_INT_LVB3",
"T_TERM_UTURN_INT_SL1END3_SLOW",
"T_TERM_UTURN_INT_WR1BEG_S0",
"T_TERM_UTURN_INT_SW6B1",
"T_TERM_UTURN_INT_LV_L7",
"T_TERM_UTURN_INT_LV_L3",
"T_TERM_UTURN_INT_SS6END2",
"T_TERM_UTURN_INT_LVB_L4",
"T_TERM_UTURN_INT_SE6C1",
"T_TERM_UTURN_INT_SS6C1",
"T_TERM_UTURN_INT_SW6E0",
"T_TERM_UTURN_INT_SL1END1_SLOW",
"T_TERM_UTURN_INT_SS6END0",
"T_TERM_UTURN_INT_SE6B1",
"T_TERM_UTURN_INT_SS6E0",
"T_TERM_UTURN_INT_LVB_L1",
"T_TERM_UTURN_INT_SS2END3",
"T_TERM_UTURN_INT_SS2END2",
"T_TERM_UTURN_INT_SS6A2",
"T_TERM_UTURN_INT_SR1END1_SLOW",
"T_TERM_UTURN_INT_LVB_L0",
"T_TERM_UTURN_INT_ER1END3",
"T_TERM_INT_UTURN_LV_R16",
"T_TERM_UTURN_INT_SE6C2",
"T_TERM_UTURN_INT_SE2A2",
"T_TERM_UTURN_INT_SS6C3",
"T_TERM_INT_UTURN_LV_R7",
"T_TERM_UTURN_INT_SE6E0",
"T_TERM_UTURN_INT_SE6E2",
"T_TERM_UTURN_INT_SW6B3",
"T_TERM_UTURN_INT_LVB4",
"T_TERM_UTURN_INT_SL1END0_SLOW",
"T_TERM_UTURN_INT_SS6D2",
"T_TERM_UTURN_INT_SW6C2",
"T_TERM_UTURN_INT_SS6E3",
"T_TERM_UTURN_INT_WR1END_S1_0",
"T_TERM_UTURN_INT_SE6B0",
"T_TERM_UTURN_INT_SS6B3",
"T_TERM_UTURN_INT_SW6C0",
"T_TERM_UTURN_INT_LV_L5",
"T_TERM_UTURN_INT_SE6C0",
"T_TERM_UTURN_INT_SS2A3",
"T_TERM_UTURN_INT_SW6D2",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_2",
"T_TERM_INT_UTURN_LV_R3",
"T_TERM_UTURN_INT_ER1BEG_S0"
],
"tile_type": "BRKH_TERM_INT",
"sites": []
"sites": [],
"pips": {},
"tile_type": "BRKH_TERM_INT"
}

220
artix7/tile_type_B_TERM_INT.json
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@ -1,125 +1,125 @@
{
"pips": {},
"wires": [
"B_TERM_UTURN_INT_LVB0",
"B_TERM_UTURN_INT_LV7",
"B_TERM_UTURN_INT_SS2A0",
"B_TERM_UTURN_INT_SW6B3",
"B_TERM_UTURN_INT_SS6C3",
"B_TERM_UTURN_INT_SS2BEG0",
"B_TERM_UTURN_INT_SS6E0",
"B_TERM_UTURN_INT_SW6END_N0_3",
"B_TERM_UTURN_INT_LV_L7",
"B_TERM_UTURN_INT_SS6B3",
"B_TERM_UTURN_INT_LV2",
"B_TERM_UTURN_INT_LV8",
"B_TERM_UTURN_INT_SW2BEG3",
"B_TERM_UTURN_INT_LVB4",
"B_TERM_UTURN_INT_LV_L18",
"B_TERM_UTURN_INT_LVB_L1",
"B_TERM_UTURN_INT_SL1BEG3",
"B_TERM_UTURN_INT_SE6A2",
"B_TERM_UTURN_INT_ER1BEG0",
"B_TERM_UTURN_INT_SW6B0",
"B_TERM_UTURN_INT_SE6C3",
"B_TERM_UTURN_INT_SS6B2",
"B_TERM_UTURN_INT_SE6D1",
"B_TERM_UTURN_INT_SS6A1",
"B_TERM_UTURN_INT_SE6C1",
"B_TERM_UTURN_INT_SS2BEG2",
"B_TERM_UTURN_INT_SW2BEG0",
"B_TERM_UTURN_INT_SE6D3",
"B_TERM_UTURN_INT_SE6D0",
"B_TERM_UTURN_INT_SW6B2",
"B_TERM_UTURN_INT_LVB_L3",
"B_TERM_UTURN_INT_LV_L6",
"B_TERM_UTURN_INT_SW6A1",
"B_TERM_UTURN_INT_LV_L9",
"B_TERM_UTURN_INT_SL1BEG0",
"B_TERM_UTURN_INT_LVB5",
"B_TERM_UTURN_INT_FAN_BOUNCE2",
"B_TERM_UTURN_INT_SS6B1",
"B_TERM_UTURN_INT_SW6C3",
"B_TERM_UTURN_INT_SS6C1",
"B_TERM_UTURN_INT_SS6E3",
"B_TERM_UTURN_INT_SS2A1",
"B_TERM_UTURN_INT_LV_L8",
"B_TERM_UTURN_INT_SW6A2",
"B_TERM_UTURN_INT_LVB2",
"B_TERM_UTURN_INT_LV9",
"B_TERM_UTURN_INT_SE6A0",
"B_TERM_UTURN_INT_FAN_BOUNCE0",
"B_TERM_UTURN_INT_SW6D3",
"B_TERM_UTURN_INT_SS6A2",
"B_TERM_UTURN_INT_WR1BEG0",
"B_TERM_UTURN_INT_ER1END_N3_3",
"B_TERM_UTURN_INT_WR1END0",
"B_TERM_UTURN_INT_SE2BEG3",
"B_TERM_UTURN_INT_SS6C0",
"B_TERM_UTURN_INT_SE2BEG2",
"B_TERM_UTURN_INT_SE6A3",
"B_TERM_UTURN_INT_SW6A0",
"B_TERM_UTURN_INT_SW2BEG2",
"B_TERM_UTURN_INT_SS6BEG1",
"B_TERM_UTURN_INT_SS6A3",
"B_TERM_UTURN_INT_LV_L6",
"B_TERM_UTURN_INT_LVB4",
"B_TERM_UTURN_INT_SW6A2",
"B_TERM_UTURN_INT_LV4",
"B_TERM_UTURN_INT_SS2A1",
"B_TERM_UTURN_INT_LV3",
"B_TERM_UTURN_INT_LVB1",
"B_TERM_UTURN_INT_SS6D3",
"B_TERM_UTURN_INT_LV2",
"B_TERM_UTURN_INT_LV_L3",
"B_TERM_UTURN_INT_SS6B3",
"B_TERM_UTURN_INT_SS6D1",
"B_TERM_UTURN_INT_LV_L4",
"B_TERM_UTURN_INT_SS6C1",
"B_TERM_UTURN_INT_SW6B3",
"B_TERM_UTURN_INT_SS6A3",
"B_TERM_UTURN_INT_ER1BEG0",
"B_TERM_UTURN_INT_SW6D2",
"B_TERM_UTURN_INT_LVB_L5",
"B_TERM_UTURN_INT_SW6D3",
"B_TERM_UTURN_INT_SL1BEG1",
"B_TERM_UTURN_INT_SE6D0",
"B_TERM_UTURN_INT_SE2BEG2",
"B_TERM_UTURN_INT_SS6B0",
"B_TERM_UTURN_INT_SW6A3",
"B_TERM_UTURN_INT_LVB5",
"B_TERM_UTURN_INT_SS6C3",
"B_TERM_UTURN_INT_LV_L5",
"B_TERM_UTURN_INT_SE6A1",
"B_TERM_UTURN_INT_LV_L18",
"B_TERM_UTURN_INT_SS6A0",
"B_TERM_UTURN_INT_SS6C0",
"B_TERM_UTURN_INT_SW6C0",
"B_TERM_UTURN_INT_SS6B1",
"B_TERM_UTURN_INT_SW6B1",
"B_TERM_UTURN_INT_SW6D1",
"B_TERM_UTURN_INT_SS6E0",
"B_TERM_UTURN_INT_LVB3",
"B_TERM_UTURN_INT_SS6BEG0",
"B_TERM_UTURN_INT_SW6A1",
"B_TERM_UTURN_INT_FAN_BOUNCE0",
"B_TERM_UTURN_INT_SS2A0",
"B_TERM_UTURN_INT_LV_L8",
"B_TERM_UTURN_INT_SW6C3",
"B_TERM_UTURN_INT_SW2BEG0",
"B_TERM_UTURN_INT_SS2BEG3",
"B_TERM_UTURN_INT_SE6D2",
"B_TERM_UTURN_INT_SE6B1",
"B_TERM_UTURN_INT_FAN_BOUNCE4",
"B_TERM_UTURN_INT_SE2BEG0",
"B_TERM_UTURN_INT_SS6C2",
"B_TERM_UTURN_INT_LV_L4",
"B_TERM_UTURN_INT_SW6D0",
"B_TERM_UTURN_INT_LV_L3",
"B_TERM_UTURN_INT_SL1BEG1",
"B_TERM_UTURN_INT_SW6B1",
"B_TERM_UTURN_INT_LV18",
"B_TERM_UTURN_INT_LVB_L0",
"B_TERM_UTURN_INT_SS6A0",
"B_TERM_UTURN_INT_SW6C0",
"B_TERM_UTURN_INT_SW6D1",
"B_TERM_UTURN_INT_SW6C2",
"B_TERM_UTURN_INT_SL1BEG2",
"B_TERM_UTURN_INT_FAN_BOUNCE2",
"B_TERM_UTURN_INT_SW6B2",
"B_TERM_UTURN_INT_WR1END0",
"B_TERM_UTURN_INT_SS6B2",
"B_TERM_UTURN_INT_SE6C0",
"B_TERM_UTURN_INT_SE6B3",
"B_TERM_UTURN_INT_SR1BEG3",
"B_TERM_UTURN_INT_SE6B1",
"B_TERM_UTURN_INT_SW6C1",
"B_TERM_UTURN_INT_SW2BEG1",
"B_TERM_UTURN_INT_SE6A0",
"B_TERM_UTURN_INT_SW2BEG3",
"B_TERM_UTURN_INT_LV8",
"B_TERM_UTURN_INT_SS6BEG2",
"B_TERM_UTURN_INT_LV4",
"B_TERM_UTURN_INT_SE6C2",
"B_TERM_UTURN_INT_LV6",
"B_TERM_UTURN_INT_SR1BEG1",
"B_TERM_UTURN_INT_SE6A1",
"B_TERM_UTURN_INT_SS6D0",
"B_TERM_UTURN_INT_SW6A3",
"B_TERM_UTURN_INT_SE6D2",
"B_TERM_UTURN_INT_SS2A2",
"B_TERM_UTURN_INT_LV_L2",
"B_TERM_UTURN_INT_LV5",
"B_TERM_UTURN_INT_FAN_BOUNCE6",
"B_TERM_UTURN_INT_SS6D2",
"B_TERM_UTURN_INT_SS6BEG3",
"B_TERM_UTURN_INT_WR1BEG0",
"B_TERM_UTURN_INT_SE6B2",
"B_TERM_UTURN_INT_SW2BEG1",
"B_TERM_UTURN_INT_SS6E3",
"B_TERM_UTURN_INT_SS6E1",
"B_TERM_UTURN_INT_SR1BEG2",
"B_TERM_UTURN_INT_SS6D1",
"B_TERM_UTURN_INT_SW6D2",
"B_TERM_UTURN_INT_FAN_BOUNCE4",
"B_TERM_UTURN_INT_SS2BEG1",
"B_TERM_UTURN_INT_LVB3",
"B_TERM_UTURN_INT_SL1BEG2",
"B_TERM_UTURN_INT_SS6BEG3",
"B_TERM_UTURN_INT_SS6BEG1",
"B_TERM_UTURN_INT_SE2BEG1",
"B_TERM_UTURN_INT_LVB_L5",
"B_TERM_UTURN_INT_SS2A2",
"B_TERM_UTURN_INT_SS6E2",
"B_TERM_UTURN_INT_LVB_L2",
"B_TERM_UTURN_INT_SS6D3",
"B_TERM_UTURN_INT_SS2A3",
"B_TERM_UTURN_INT_SS6BEG0",
"B_TERM_UTURN_INT_SS2BEG3",
"B_TERM_UTURN_INT_LV_L9",
"B_TERM_UTURN_INT_SW6A0",
"B_TERM_UTURN_INT_SW6END_N0_3",
"B_TERM_UTURN_INT_SE6A3",
"B_TERM_UTURN_INT_SE6B2",
"B_TERM_UTURN_INT_SE6D1",
"B_TERM_UTURN_INT_SW6B0",
"B_TERM_UTURN_INT_SR1BEG2",
"B_TERM_UTURN_INT_SE6A2",
"B_TERM_UTURN_INT_LV7",
"B_TERM_UTURN_INT_SW6C2",
"B_TERM_UTURN_INT_SS2BEG1",
"B_TERM_UTURN_INT_LVB_L4",
"B_TERM_UTURN_INT_LV_L5",
"B_TERM_UTURN_INT_FAN_BOUNCE6",
"B_TERM_UTURN_INT_LVB_L3",
"B_TERM_UTURN_INT_SE6D3",
"B_TERM_UTURN_INT_LV9",
"B_TERM_UTURN_INT_LV_L7",
"B_TERM_UTURN_INT_SE6C3",
"B_TERM_UTURN_INT_SW6C1",
"B_TERM_UTURN_INT_SE2BEG3",
"B_TERM_UTURN_INT_SS6A1",
"B_TERM_UTURN_INT_LV_L2",
"B_TERM_UTURN_INT_LVB_L0",
"B_TERM_UTURN_INT_SS2BEG2",
"B_TERM_UTURN_INT_SR1BEG1",
"B_TERM_UTURN_INT_LVB1",
"B_TERM_UTURN_INT_LVB_L1",
"B_TERM_UTURN_INT_SE6B0",
"B_TERM_UTURN_INT_SS6B0",
"B_TERM_UTURN_INT_SE6C0"
"B_TERM_UTURN_INT_SS6D0",
"B_TERM_UTURN_INT_LVB2",
"B_TERM_UTURN_INT_SS2BEG0",
"B_TERM_UTURN_INT_LVB0",
"B_TERM_UTURN_INT_SS6D2",
"B_TERM_UTURN_INT_SE6C1",
"B_TERM_UTURN_INT_SW6D0",
"B_TERM_UTURN_INT_SL1BEG0",
"B_TERM_UTURN_INT_LV18",
"B_TERM_UTURN_INT_LV6",
"B_TERM_UTURN_INT_LV5",
"B_TERM_UTURN_INT_SR1BEG3",
"B_TERM_UTURN_INT_LVB_L2",
"B_TERM_UTURN_INT_SL1BEG3",
"B_TERM_UTURN_INT_SW2BEG2",
"B_TERM_UTURN_INT_SS6A2",
"B_TERM_UTURN_INT_SS2A3",
"B_TERM_UTURN_INT_SE6C2"
],
"tile_type": "B_TERM_INT",
"sites": []
"sites": [],
"pips": {},
"tile_type": "B_TERM_INT"
}

8988
artix7/tile_type_CFG_CENTER_BOT.json
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14162
artix7/tile_type_CFG_CENTER_MID.json
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5108
artix7/tile_type_CFG_CENTER_TOP.json
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2778
artix7/tile_type_CLBLL_L.json
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artix7/tile_type_CLBLL_R.json
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2914
artix7/tile_type_CLBLM_L.json
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2858
artix7/tile_type_CLBLM_R.json
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6870
artix7/tile_type_CLK_BUFG_BOT_R.json
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2304
artix7/tile_type_CLK_BUFG_REBUF.json
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6872
artix7/tile_type_CLK_BUFG_TOP_R.json
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490
artix7/tile_type_CLK_FEED.json
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@ -1,261 +1,261 @@
{
"pips": {},
"wires": [
"CLK_FEED_WL1END0",
"CLK_FEED_WW4END3",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_NE2A3",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_SW4A0",
"CLK_FEED_SE4BEG1",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_NE2A0",
"CLK_FEED_SW4A3",
"CLK_FEED_NW2A0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_FEED_NE4BEG3",
"CLK_FEED_SE4BEG3",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_LH10",
"CLK_FEED_SE4C3",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_NW2A2",
"CLK_FEED_NW4END2",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_FEED_LH9",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_NW4END1",
"CLK_FEED_LH4",
"CLK_FEED_NW4A2",
"CLK_FEED_EE2BEG1",
"CLK_FEED_EE4BEG1",
"CLK_FEED_CK_GCLK30",
"CLK_FEED_CK_GCLK22",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK2",
"CLK_FEED_LH1",
"CLK_FEED_R_CK_GCLK23",
"CLK_FEED_LH5",
"CLK_FEED_EE2A0",
"CLK_FEED_WW4B0",
"CLK_FEED_SE4BEG2",
"CLK_FEED_NW4END3",
"CLK_FEED_NE4BEG2",
"CLK_FEED_NE4C3",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_EE2BEG2",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_R_CK_GCLK10",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_ER1BEG3",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH2",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_NW2A1",
"CLK_FEED_LH8",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_LH3",
"CLK_FEED_LH11",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_WL1END3",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_FEED_ER1BEG2",
"CLK_FEED_EL1BEG3",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_EE4BEG2",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_CK_GCLK11",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_EE2BEG3",
"CLK_FEED_SW4END0",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_WL1END1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_EE4B2",
"CLK_FEED_R_CK_GCLK28",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_EE4C3",
"CLK_FEED_NW4A0",
"CLK_FEED_WW2END0",
"CLK_FEED_SE2A0",
"CLK_FEED_LH6",
"CLK_FEED_MONITOR_P",
"CLK_FEED_SE4C2",
"CLK_FEED_EE4B3",
"CLK_FEED_WR1END0",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_R_CK_GCLK15",
"CLK_FEED_EE4BEG0",
"CLK_FEED_WW2A2",
"CLK_FEED_WW2END3",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_WW4B2",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_WW4C1",
"CLK_FEED_NW4A0",
"CLK_FEED_LH6",
"CLK_FEED_EL1BEG0",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_WR1END1",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_EE4A1",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_EL1BEG1",
"CLK_FEED_WW4END1",
"CLK_FEED_R_CK_GCLK23",
"CLK_FEED_R_CK_GCLK28",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_EL1BEG2",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_EE2A0",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_LH8",
"CLK_FEED_SW4A0",
"CLK_FEED_NE4C3",
"CLK_FEED_SE2A1",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4C0",
"CLK_FEED_EE2A2",
"CLK_FEED_NE4BEG3",
"CLK_FEED_WW4END2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_NE4BEG2",
"CLK_FEED_WR1END3",
"CLK_FEED_EL1BEG3",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_FEED_SW2A2",
"CLK_FEED_LH9",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_R_CK_GCLK20",
"CLK_FEED_WW4A2",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_NW4END2",
"CLK_FEED_SE2A0",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_WW2A0",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_LH3",
"CLK_FEED_MONITOR_N",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_NW4END0",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_EE4B0",
"CLK_FEED_LH11",
"CLK_FEED_NW2A0",
"CLK_FEED_SW4A2",
"CLK_FEED_NW4A2",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_WW4END0",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_SW2A3",
"CLK_FEED_WW4C0",
"CLK_FEED_SW4END1",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_FEED_LH12",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_NW4END0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_EL1BEG1",
"CLK_FEED_NE4C0",
"CLK_FEED_WW4END1",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_ER1BEG1",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_EE4A0",
"CLK_FEED_SW2A0",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_FEED_NW4A3",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_WR1END0",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_SW4A2",
"CLK_FEED_EE4C0",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_EL1BEG2",
"CLK_FEED_WR1END3",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_MONITOR_N",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_EE2A3",
"CLK_FEED_WW2A3",
"CLK_FEED_WW2END1",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_WW2END2",
"CLK_FEED_SW4A1",
"CLK_FEED_SE4C1",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_EE4B0",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_WW4A2",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_R_CK_GCLK15",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_NE2A0",
"CLK_FEED_EE2A1",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_EE4A3",
"CLK_FEED_LH12",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_EE2BEG3",
"CLK_FEED_SE4BEG2",
"CLK_FEED_LH7",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_NW4END3",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_FEED_EE4C0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_NE2A2",
"CLK_FEED_WW2A0",
"CLK_FEED_EE2A2",
"CLK_FEED_LH7",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_EE4A1",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_FEED_NW4A1",
"CLK_FEED_SW4END3",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_WW4END2",
"CLK_FEED_EL1BEG0",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG0",
"CLK_FEED_WW4C2",
"CLK_FEED_WR1END2",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_ER1BEG0",
"CLK_FEED_WW4C1",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_SE4BEG3",
"CLK_FEED_SW4END2",
"CLK_FEED_R_CK_GCLK20",
"CLK_FEED_SE2A3",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_EE2A1",
"CLK_FEED_EE4A3",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_WW2A1",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_FEED_EE4B3",
"CLK_FEED_NE4C1",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_SW2A2",
"CLK_FEED_EE4C1",
"CLK_FEED_SE2A1",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_WW4C3",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_EE4BEG0",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_WW4A0",
"CLK_FEED_WW2A2",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_NE4BEG1",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_EE4C2",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_R_CK_GCLK26",
"CLK_FEED_EE4BEG3",
"CLK_FEED_WW4B3",
"CLK_FEED_NE4BEG0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_SE4C0",
"CLK_FEED_CK_GCLK13",
"CLK_FEED_WW4A3",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_SW4END3",
"CLK_FEED_R_CK_GCLK2",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_EE2BEG2",
"CLK_FEED_EE4BEG1",
"CLK_FEED_LH2",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_SW4END1",
"CLK_FEED_WW2A3",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_SE4C1",
"CLK_FEED_SW2A0",
"CLK_FEED_EE2A3",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_SW4END0",
"CLK_FEED_EE4C2",
"CLK_FEED_LH10",
"CLK_FEED_NE4C1",
"CLK_FEED_ER1BEG0",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_SE4BEG1",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH1",
"CLK_FEED_WL1END0",
"CLK_FEED_SW4A3",
"CLK_FEED_CK_GCLK13",
"CLK_FEED_CK_GCLK11",
"CLK_FEED_LH4",
"CLK_FEED_NE4C0",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_NE2A2",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK30",
"CLK_FEED_WW4B0",
"CLK_FEED_WW4C3",
"CLK_FEED_EE4C1",
"CLK_FEED_WW4C2",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_ER1BEG2",
"CLK_FEED_WL1END3",
"CLK_FEED_SE2A3",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_EE4BEG2",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_WW4B2",
"CLK_FEED_SE4C2",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_ER1BEG1",
"CLK_FEED_SE4C3",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_FEED_NW2A1",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_NW2A2",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_SW2A1",
"CLK_FEED_EE2BEG0",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_SW2A1"
"CLK_FEED_MONITOR_P",
"CLK_FEED_NE2A3",
"CLK_FEED_R_CK_GCLK26",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_LH5",
"CLK_FEED_EE4C3",
"CLK_FEED_WR1END2",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_CK_GCLK22",
"CLK_FEED_SW4A1",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WW4C0",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_SW2A3",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_R_CK_GCLK10",
"CLK_FEED_WW4A3",
"CLK_FEED_WW2END1",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_WW2A1",
"CLK_FEED_WW4B3",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_NW4A3",
"CLK_FEED_NW4END1",
"CLK_FEED_NW4A1",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_EE4A0",
"CLK_FEED_WL1END1",
"CLK_FEED_EE2BEG1",
"CLK_FEED_WW2END0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_FEED_SE4BEG0"
],
"tile_type": "CLK_FEED",
"sites": []
"sites": [],
"pips": {},
"tile_type": "CLK_FEED"
}

44432
artix7/tile_type_CLK_HROW_BOT_R.json
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44434
artix7/tile_type_CLK_HROW_TOP_R.json
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694
artix7/tile_type_CLK_MTBF2.json
View File

@ -1,365 +1,365 @@
{
"pips": {},
"wires": [
"CLK_FEED_WL1END0",
"CLK_PMV_FAN3_0",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_NE2A3",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_SW4A0",
"CLK_FEED_SE4BEG1",
"CLK_PMV_FAN7_0",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_NE2A0",
"CLK_FEED_SW4A3",
"CLK_MTBF2_EN",
"CLK_FEED_NW2A0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_BYP5_0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_SE4BEG3",
"CLK_PMV_IMUX5_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_LH10",
"CLK_FEED_SE4C3",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_R_CK_GCLK14",
"CLK_PMV_FAN1_0",
"CLK_FEED_NW2A2",
"CLK_FEED_NW4END2",
"CLK_PMV_IMUX32_0",
"CLK_MTBF2_DIN",
"CLK_PMV_BYP3_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_LH9",
"CLK_FEED_NW4END1",
"CLK_FEED_LH4",
"CLK_PMV_IMUX37_0",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_FEED_NW4A2",
"CLK_FEED_EE2BEG1",
"CLK_PMV_IMUX2_0",
"CLK_FEED_EE4BEG1",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_IMUX8_0",
"CLK_FEED_CK_GCLK22",
"CLK_FEED_CK_GCLK16",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_FAN0_0",
"CLK_FEED_LH1",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX31_0",
"CLK_FEED_LH5",
"CLK_FEED_EE2A0",
"CLK_FEED_WW4B0",
"CLK_PMV_BYP2_0",
"CLK_FEED_SE4BEG2",
"CLK_FEED_NW4END3",
"CLK_FEED_NE4BEG2",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_CLK1_0",
"CLK_FEED_NE4C3",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_EE2BEG2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK0",
"CLK_PMV_CLK0_0",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_ER1BEG3",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH2",
"CLK_MTBF2_Q3B",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_LH8",
"CLK_FEED_LH3",
"CLK_FEED_NW2A1",
"CLK_FEED_LH11",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_PMV_IMUX35_0",
"CLK_PMV_IMUX0_0",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_WL1END3",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_ER1BEG2",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_EL1BEG3",
"CLK_FEED_R_CK_GCLK16",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_MTBF2_Q6B",
"CLK_FEED_EE4BEG2",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_GCLK19",
"CLK_PMV_IMUX38_0",
"CLK_PMV_IMUX10_0",
"CLK_FEED_CK_GCLK11",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_EE2BEG3",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_WL1END1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_EE4B2",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_EE4B3",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX44_0",
"CLK_PMV_BYP2_0",
"CLK_MTBF2_Q3B",
"CLK_FEED_R_CK_GCLK12",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK12",
"CLK_MTBF2_Q4B",
"CLK_FEED_R_CK_GCLK28",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_PMV_IMUX15_0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX29_0",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_EE4C3",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_FEED_NW4A0",
"CLK_MTBF2_Q7B",
"CLK_FEED_WW2END0",
"CLK_FEED_SE2A0",
"CLK_FEED_LH6",
"CLK_FEED_MONITOR_P",
"CLK_FEED_SE4C2",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_PMV_BYP0_0",
"CLK_PMV_BYP5_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_PMV_IMUX27_0",
"CLK_FEED_EE4BEG0",
"CLK_FEED_WW2A2",
"CLK_FEED_WW2END3",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_WW4B2",
"CLK_FEED_R_CK_GCLK27",
"CLK_MTBF2_Q0B",
"CLK_PMV_FAN4_0",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4C1",
"CLK_FEED_LH6",
"CLK_MTBF2_RESET",
"CLK_FEED_EL1BEG0",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_WR1END1",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_EE4A1",
"CLK_FEED_WW4END1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_PMV_IMUX7_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_EL1BEG2",
"CLK_MTBF2_Q1B",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_R_CK_GCLK4",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_PMV_IMUX14_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_GCLK0",
"CLK_PMV_IMUX35_0",
"CLK_FEED_EE2A0",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_LH8",
"CLK_FEED_SW4A0",
"CLK_FEED_NE4C3",
"CLK_FEED_SE2A1",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4C0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_WW4END2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_PMV_CLK1_0",
"CLK_FEED_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_MTBF2_CLK",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_PMV_IMUX34_0",
"CLK_FEED_NE4BEG2",
"CLK_FEED_EL1BEG3",
"CLK_FEED_WR1END3",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_SW2A2",
"CLK_FEED_LH9",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_IMUX40_0",
"CLK_FEED_WW4A2",
"CLK_PMV_IMUX24_0",
"CLK_FEED_R_CK_GCLK5",
"CLK_PMV_IMUX3_0",
"CLK_PMV_IMUX42_0",
"CLK_PMV_IMUX5_0",
"CLK_FEED_SE2A0",
"CLK_FEED_NW4END2",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_PMV_CLK0_0",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_WW2A0",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_LH3",
"CLK_FEED_MONITOR_N",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_NW4END0",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_EE4B0",
"CLK_FEED_LH11",
"CLK_PMV_FAN4_0",
"CLK_FEED_NW2A0",
"CLK_FEED_SW4A2",
"CLK_MTBF2_DIN",
"CLK_FEED_NW4A2",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_WW4END0",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_SW2A3",
"CLK_FEED_WW4C0",
"CLK_FEED_SW4END1",
"CLK_FEED_LH12",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_IMUX16_0",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_PMV_IMUX4_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_MTBF2_CLK",
"CLK_FEED_NW4END0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_PMV_IMUX40_0",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_PMV_IMUX34_0",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_NE4C0",
"CLK_FEED_WW4END1",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_MTBF2_Q5B",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_ER1BEG1",
"CLK_PMV_IMUX25_0",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_EE4A0",
"CLK_FEED_SW2A0",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_FEED_NW4A3",
"CLK_PMV_BYP7_0",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_GCLK25",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX42_0",
"CLK_FEED_SW4A2",
"CLK_FEED_EE4C0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_EL1BEG2",
"CLK_FEED_WR1END3",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_MONITOR_N",
"CLK_PMV_IMUX3_0",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_PMV_BYP1_0",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_EE2A3",
"CLK_FEED_WW2A3",
"CLK_FEED_WW2END1",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_CK_GCLK18",
"CLK_MTBF2_Q2B",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_WW2END2",
"CLK_PMV_IMUX41_0",
"CLK_FEED_SW4A1",
"CLK_FEED_SE4C1",
"CLK_PMV_IMUX26_0",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_EE4B0",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_WW4A2",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_R_CK_GCLK15",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_CK_GCLK29",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_EE2A1",
"CLK_FEED_NE2A0",
"CLK_MTBF2_Q0B",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_EE4A3",
"CLK_FEED_LH12",
"CLK_MTBF2_EN",
"CLK_FEED_EE2BEG3",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG2",
"CLK_FEED_LH7",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_NW4END3",
"CLK_PMV_FAN0_0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_IMUX15_0",
"CLK_MTBF2_Q5B",
"CLK_FEED_EE4C0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_PMV_IMUX33_0",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_PMV_IMUX21_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_NE2A2",
"CLK_FEED_WW2A0",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX24_0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_PMV_IMUX1_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX27_0",
"CLK_FEED_LH7",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_EE4A1",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_FEED_NW4A1",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_SW4END3",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_WW4END2",
"CLK_FEED_EL1BEG0",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG0",
"CLK_FEED_WW4C2",
"CLK_FEED_WR1END2",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_ER1BEG0",
"CLK_PMV_IMUX12_0",
"CLK_FEED_WW4C1",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_SE4BEG3",
"CLK_FEED_SW4END2",
"CLK_PMV_IMUX22_0",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK20",
"CLK_FEED_SE2A3",
"CLK_FEED_EE2A1",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_EE4A3",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_R_CK_GCLK19",
"CLK_PMV_IMUX45_0",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_WW2A1",
"CLK_PMV_IMUX9_0",
"CLK_PMV_IMUX7_0",
"CLK_PMV_IMUX39_0",
"CLK_FEED_CK_GCLK17",
"CLK_PMV_CTRL0_0",
"CLK_PMV_IMUX23_0",
"CLK_PMV_IMUX18_0",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_FEED_EE4B3",
"CLK_PMV_IMUX14_0",
"CLK_FEED_EE4C1",
"CLK_FEED_SW2A2",
"CLK_FEED_NE4C1",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_SE2A1",
"CLK_FEED_CK_GCLK7",
"CLK_MTBF2_Q1B",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_WW4C3",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_EE4BEG0",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_WW4A0",
"CLK_PMV_IMUX44_0",
"CLK_MTBF2_RESET",
"CLK_FEED_WW2A2",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_GCLK31",
"CLK_PMV_CTRL1_0",
"CLK_FEED_SW4END3",
"CLK_PMV_IMUX13_0",
"CLK_FEED_NE4BEG1",
"CLK_FEED_R_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_EE4C2",
"CLK_PMV_IMUX6_0",
"CLK_FEED_EE4BEG3",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_WW4B3",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_IMUX28_0",
"CLK_FEED_NE4BEG0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_SE4C0",
"CLK_FEED_CK_GCLK13",
"CLK_FEED_WW4A3",
"CLK_FEED_EE2BEG0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_BYP0_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_EE2BEG2",
"CLK_PMV_IMUX29_0",
"CLK_FEED_EE4BEG1",
"CLK_PMV_IMUX10_0",
"CLK_PMV_IMUX1_0",
"CLK_FEED_LH2",
"CLK_PMV_FAN3_0",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_MTBF2_Q6B",
"CLK_PMV_IMUX39_0",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_SW4END1",
"CLK_FEED_WW2A3",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_SE4C1",
"CLK_FEED_SW2A0",
"CLK_FEED_EE2A3",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK5",
"CLK_PMV_IMUX38_0",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_IMUX22_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX0_0",
"CLK_PMV_FAN7_0",
"CLK_FEED_EE4C2",
"CLK_FEED_LH10",
"CLK_PMV_IMUX28_0",
"CLK_FEED_NE4C1",
"CLK_FEED_ER1BEG0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_IMUX16_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_SE4BEG1",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH1",
"CLK_FEED_WL1END0",
"CLK_FEED_SW4A3",
"CLK_MTBF2_Q7B",
"CLK_PMV_IMUX6_0",
"CLK_FEED_CK_GCLK13",
"CLK_PMV_IMUX33_0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_LH4",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_NE4C0",
"CLK_FEED_NE2A2",
"CLK_PMV_IMUX9_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_BYP3_0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW4B0",
"CLK_FEED_WW4C3",
"CLK_FEED_EE4C1",
"CLK_FEED_WW4C2",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_ER1BEG2",
"CLK_FEED_WL1END3",
"CLK_FEED_SE2A3",
"CLK_PMV_FAN1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_EE4BEG2",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_IMUX8_0",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_WW4B2",
"CLK_PMV_IMUX26_0",
"CLK_FEED_SE4C2",
"CLK_FEED_CK_GCLK10",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_PMV_BYP1_0",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_ER1BEG1",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_SE4C3",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_NW2A1",
"CLK_PMV_IMUX21_0",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX12_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_CK_GCLK14",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_SW2A1",
"CLK_PMV_IMUX4_0",
"CLK_FEED_EE2BEG0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_MONITOR_P",
"CLK_FEED_NE2A3",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_R_CK_GCLK26",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_SW2A1"
"CLK_FEED_LH5",
"CLK_FEED_EE4C3",
"CLK_FEED_WR1END2",
"CLK_PMV_BYP7_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_CK_GCLK22",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_SW4A1",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX18_0",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_WL1END2",
"CLK_MTBF2_Q2B",
"CLK_FEED_CK_GCLK2",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_WW4C0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_SW2A3",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_IMUX25_0",
"CLK_FEED_WW4A3",
"CLK_FEED_WW2END1",
"CLK_PMV_IMUX23_0",
"CLK_FEED_CK_GCLK20",
"CLK_PMV_IMUX32_0",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_WW2A1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4B3",
"CLK_FEED_NW4A3",
"CLK_FEED_NW4A1",
"CLK_FEED_NW4END1",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_EE4A0",
"CLK_FEED_WL1END1",
"CLK_FEED_EE2BEG1",
"CLK_FEED_WW2END0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_FEED_SE4BEG0"
],
"tile_type": "CLK_MTBF2",
"sites": []
"sites": [],
"pips": {},
"tile_type": "CLK_MTBF2"
}

3306
artix7/tile_type_CLK_PMV.json
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712
artix7/tile_type_CLK_PMV2.json
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@ -1,377 +1,377 @@
{
"pips": {},
"wires": [
"CLK_FEED_WL1END0",
"CLK_PMV_FAN3_0",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_NE2A3",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_SW4A0",
"CLK_FEED_SE4BEG1",
"CLK_PMV_FAN7_0",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_NE2A0",
"CLK_FEED_SW4A3",
"CLK_FEED_NW2A0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_BYP5_0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_SE4BEG3",
"CLK_PMV_IMUX5_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_PMV2_O",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_LH10",
"CLK_FEED_SE4C3",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_R_CK_GCLK14",
"CLK_PMV_FAN1_0",
"CLK_FEED_NW2A2",
"CLK_FEED_NW4END2",
"CLK_PMV_IMUX32_0",
"CLK_PMV_BYP3_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_LH9",
"CLK_FEED_NW4END1",
"CLK_FEED_LH4",
"CLK_PMV_IMUX37_0",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_FEED_NW4A2",
"CLK_FEED_EE2BEG1",
"CLK_PMV_IMUX2_0",
"CLK_FEED_EE4BEG1",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_IMUX8_0",
"CLK_FEED_CK_GCLK22",
"CLK_FEED_CK_GCLK16",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_FAN0_0",
"CLK_FEED_LH1",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX31_0",
"CLK_FEED_LH5",
"CLK_FEED_EE2A0",
"CLK_FEED_WW4B0",
"CLK_PMV_BYP2_0",
"CLK_FEED_SE4BEG2",
"CLK_FEED_NW4END3",
"CLK_FEED_NE4BEG2",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_CLK1_0",
"CLK_FEED_NE4C3",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_EE2BEG2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK0",
"CLK_PMV_CLK0_0",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_ER1BEG3",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH2",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_LH8",
"CLK_FEED_LH3",
"CLK_FEED_NW2A1",
"CLK_FEED_LH11",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_PMV_IMUX35_0",
"CLK_PMV_IMUX0_0",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_WL1END3",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_ER1BEG2",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_EL1BEG3",
"CLK_FEED_R_CK_GCLK16",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_EE4BEG2",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_GCLK19",
"CLK_PMV_IMUX38_0",
"CLK_PMV_IMUX10_0",
"CLK_FEED_CK_GCLK11",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_EE2BEG3",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_PMV2_A0",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_WL1END1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_EE4B2",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_R_CK_GCLK28",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_PMV_IMUX15_0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX29_0",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_EE4C3",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_FEED_NW4A0",
"CLK_FEED_WW2END0",
"CLK_FEED_SE2A0",
"CLK_FEED_LH6",
"CLK_FEED_MONITOR_P",
"CLK_FEED_SE4C2",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_PMV_BYP0_0",
"CLK_PMV2_EN",
"CLK_FEED_EE4B3",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX44_0",
"CLK_PMV_BYP2_0",
"CLK_FEED_R_CK_GCLK12",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK12",
"CLK_PMV2_ODIV4",
"CLK_PMV_BYP5_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_PMV_IMUX27_0",
"CLK_FEED_EE4BEG0",
"CLK_FEED_WW2A2",
"CLK_FEED_WW2END3",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_WW4B2",
"CLK_FEED_R_CK_GCLK27",
"CLK_PMV_FAN4_0",
"CLK_FEED_R_CK_GCLK17",
"CLK_PMV2_O",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4C1",
"CLK_FEED_LH6",
"CLK_FEED_EL1BEG0",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_WR1END1",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_EE4A1",
"CLK_FEED_WW4END1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_PMV_IMUX7_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_EL1BEG2",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_R_CK_GCLK4",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_PMV_IMUX14_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_WW4A1",
"CLK_PMV2_A2",
"CLK_PMV_IMUX35_0",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_EE2A0",
"CLK_PMV2_A0",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_LH8",
"CLK_FEED_SW4A0",
"CLK_FEED_NE4C3",
"CLK_FEED_SE2A1",
"CLK_FEED_R_CK_GCLK27",
"CLK_PMV2_A1",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4C0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_WW4END2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_PMV_CLK1_0",
"CLK_FEED_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_PMV_IMUX34_0",
"CLK_FEED_NE4BEG2",
"CLK_FEED_EL1BEG3",
"CLK_FEED_WR1END3",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_SW2A2",
"CLK_FEED_LH9",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_CK_GCLK15",
"CLK_PMV2_EN",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_IMUX40_0",
"CLK_FEED_WW4A2",
"CLK_PMV_IMUX24_0",
"CLK_FEED_R_CK_GCLK5",
"CLK_PMV_IMUX3_0",
"CLK_PMV_IMUX42_0",
"CLK_PMV_IMUX5_0",
"CLK_FEED_SE2A0",
"CLK_FEED_NW4END2",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_PMV_CLK0_0",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_WW2A0",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_LH3",
"CLK_FEED_MONITOR_N",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_NW4END0",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_EE4B0",
"CLK_FEED_LH11",
"CLK_PMV_FAN4_0",
"CLK_FEED_NW2A0",
"CLK_FEED_SW4A2",
"CLK_FEED_NW4A2",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_WW4END0",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_SW2A3",
"CLK_FEED_WW4C0",
"CLK_FEED_SW4END1",
"CLK_FEED_LH12",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_IMUX16_0",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_PMV_IMUX4_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_NW4END0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_PMV_IMUX40_0",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_PMV_IMUX34_0",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_NE4C0",
"CLK_FEED_WW4END1",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_ER1BEG1",
"CLK_PMV_IMUX25_0",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_EE4A0",
"CLK_FEED_SW2A0",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_FEED_NW4A3",
"CLK_PMV_BYP7_0",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_GCLK25",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX42_0",
"CLK_FEED_SW4A2",
"CLK_FEED_EE4C0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_EL1BEG2",
"CLK_FEED_WR1END3",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_MONITOR_N",
"CLK_PMV_IMUX3_0",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_PMV_BYP1_0",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_EE2A3",
"CLK_FEED_WW2A3",
"CLK_FEED_WW2END1",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_WW2END2",
"CLK_PMV_IMUX41_0",
"CLK_FEED_SW4A1",
"CLK_FEED_SE4C1",
"CLK_PMV_IMUX26_0",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_EE4B0",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_WW4A2",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_R_CK_GCLK15",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_CK_GCLK29",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_EE2A1",
"CLK_FEED_NE2A0",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_EE4A3",
"CLK_FEED_LH12",
"CLK_FEED_EE2BEG3",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG2",
"CLK_FEED_LH7",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_NW4END3",
"CLK_PMV_FAN0_0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_IMUX15_0",
"CLK_FEED_EE4C0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_PMV_IMUX33_0",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_PMV_IMUX21_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_NE2A2",
"CLK_FEED_WW2A0",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX24_0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_PMV_IMUX1_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX27_0",
"CLK_FEED_LH7",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_EE4A1",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_FEED_NW4A1",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_SW4END3",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_WW4END2",
"CLK_FEED_EL1BEG0",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG0",
"CLK_FEED_WW4C2",
"CLK_FEED_WR1END2",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_ER1BEG0",
"CLK_PMV_IMUX12_0",
"CLK_FEED_WW4C1",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_SE4BEG3",
"CLK_FEED_SW4END2",
"CLK_PMV_IMUX22_0",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK20",
"CLK_FEED_SE2A3",
"CLK_FEED_EE2A1",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_EE4A3",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_R_CK_GCLK19",
"CLK_PMV_IMUX45_0",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_WW2A1",
"CLK_PMV_IMUX9_0",
"CLK_PMV_IMUX7_0",
"CLK_PMV_IMUX39_0",
"CLK_FEED_CK_GCLK17",
"CLK_PMV_CTRL0_0",
"CLK_PMV_IMUX23_0",
"CLK_PMV_IMUX18_0",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_PMV2_A1",
"CLK_FEED_EE4B3",
"CLK_PMV_IMUX14_0",
"CLK_FEED_EE4C1",
"CLK_FEED_SW2A2",
"CLK_FEED_NE4C1",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_PMV2_ODIV4",
"CLK_FEED_SE2A1",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_WW4C3",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_EE4BEG0",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_WW4A0",
"CLK_PMV_IMUX44_0",
"CLK_FEED_WW2A2",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_GCLK31",
"CLK_PMV_CTRL1_0",
"CLK_PMV2_ODIV2",
"CLK_FEED_SW4END3",
"CLK_PMV_IMUX13_0",
"CLK_FEED_NE4BEG1",
"CLK_FEED_R_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_EE4C2",
"CLK_PMV_IMUX6_0",
"CLK_FEED_EE4BEG3",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_WW4B3",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_IMUX28_0",
"CLK_PMV2_A2",
"CLK_FEED_NE4BEG0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_SE4C0",
"CLK_FEED_CK_GCLK13",
"CLK_FEED_WW4A3",
"CLK_FEED_EE2BEG0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_BYP0_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_EE2BEG2",
"CLK_PMV_IMUX29_0",
"CLK_FEED_EE4BEG1",
"CLK_PMV_IMUX10_0",
"CLK_PMV_IMUX1_0",
"CLK_FEED_LH2",
"CLK_PMV_FAN3_0",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_PMV_IMUX39_0",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_SW4END1",
"CLK_FEED_WW2A3",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_SE4C1",
"CLK_FEED_SW2A0",
"CLK_FEED_EE2A3",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK5",
"CLK_PMV_IMUX38_0",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_IMUX22_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX0_0",
"CLK_PMV_FAN7_0",
"CLK_FEED_EE4C2",
"CLK_FEED_LH10",
"CLK_PMV_IMUX28_0",
"CLK_FEED_NE4C1",
"CLK_FEED_ER1BEG0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_IMUX16_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_SE4BEG1",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH1",
"CLK_FEED_WL1END0",
"CLK_FEED_SW4A3",
"CLK_PMV_IMUX6_0",
"CLK_FEED_CK_GCLK13",
"CLK_PMV_IMUX33_0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_LH4",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_NE4C0",
"CLK_FEED_NE2A2",
"CLK_PMV_IMUX9_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_BYP3_0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW4B0",
"CLK_FEED_WW4C3",
"CLK_FEED_EE4C1",
"CLK_FEED_WW4C2",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_ER1BEG2",
"CLK_FEED_WL1END3",
"CLK_FEED_SE2A3",
"CLK_PMV_FAN1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_EE4BEG2",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_IMUX8_0",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_WW4B2",
"CLK_PMV_IMUX26_0",
"CLK_FEED_SE4C2",
"CLK_FEED_CK_GCLK10",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_PMV_BYP1_0",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_ER1BEG1",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_SE4C3",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_NW2A1",
"CLK_PMV_IMUX21_0",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX12_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_CK_GCLK14",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_SW2A1",
"CLK_PMV_IMUX4_0",
"CLK_FEED_EE2BEG0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_MONITOR_P",
"CLK_FEED_NE2A3",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_SW2A1"
"CLK_FEED_LH5",
"CLK_FEED_EE4C3",
"CLK_FEED_WR1END2",
"CLK_PMV_BYP7_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_CK_GCLK22",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_SW4A1",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX18_0",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK2",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WW4C0",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_SW2A3",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_IMUX25_0",
"CLK_FEED_WW4A3",
"CLK_FEED_WW2END1",
"CLK_PMV_IMUX23_0",
"CLK_FEED_CK_GCLK20",
"CLK_PMV_IMUX32_0",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_WW2A1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4B3",
"CLK_FEED_NW4A3",
"CLK_FEED_NW4A1",
"CLK_FEED_NW4END1",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_EE4A0",
"CLK_FEED_WL1END1",
"CLK_FEED_EE2BEG1",
"CLK_FEED_WW2END0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_PMV2_ODIV2",
"CLK_FEED_SE4BEG0"
],
"tile_type": "CLK_PMV2",
"sites": [
{
"type": "PMV2",
"y_coord": 0,
"site_pins": {
"O": "CLK_PMV2_O",
"A1": "CLK_PMV2_A1",
"EN": "CLK_PMV2_EN",
"ODIV2": "CLK_PMV2_ODIV2",
"A0": "CLK_PMV2_A0",
"ODIV4": "CLK_PMV2_ODIV4",
"A2": "CLK_PMV2_A2"
},
"name": "X0Y0",
"prefix": "PMV",
"x_coord": 0
"y_coord": 0,
"type": "PMV2",
"site_pins": {
"ODIV2": "CLK_PMV2_ODIV2",
"O": "CLK_PMV2_O",
"A0": "CLK_PMV2_A0",
"A2": "CLK_PMV2_A2",
"EN": "CLK_PMV2_EN",
"A1": "CLK_PMV2_A1",
"ODIV4": "CLK_PMV2_ODIV4"
},
"x_coord": 0,
"name": "X0Y0"
}
]
],
"pips": {},
"tile_type": "CLK_PMV2"
}

686
artix7/tile_type_CLK_PMV2_SVT.json
View File

@ -1,360 +1,360 @@
{
"pips": {},
"wires": [
"CLK_FEED_WL1END0",
"CLK_PMV_FAN3_0",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_NE2A3",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_SW4A0",
"CLK_FEED_SE4BEG1",
"CLK_PMV_FAN7_0",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_NE2A0",
"CLK_FEED_SW4A3",
"CLK_FEED_NW2A0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_BYP5_0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_SE4BEG3",
"CLK_PMV_IMUX5_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_PMV2_O",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_LH10",
"CLK_FEED_SE4C3",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_R_CK_GCLK14",
"CLK_PMV_FAN1_0",
"CLK_FEED_NW2A2",
"CLK_FEED_NW4END2",
"CLK_PMV_IMUX32_0",
"CLK_PMV_BYP3_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_LH9",
"CLK_FEED_NW4END1",
"CLK_FEED_LH4",
"CLK_PMV_IMUX37_0",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_FEED_NW4A2",
"CLK_FEED_EE2BEG1",
"CLK_PMV_IMUX2_0",
"CLK_FEED_EE4BEG1",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_IMUX8_0",
"CLK_FEED_CK_GCLK22",
"CLK_FEED_CK_GCLK16",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_FAN0_0",
"CLK_FEED_LH1",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX31_0",
"CLK_FEED_LH5",
"CLK_FEED_EE2A0",
"CLK_FEED_WW4B0",
"CLK_PMV_BYP2_0",
"CLK_FEED_SE4BEG2",
"CLK_FEED_NW4END3",
"CLK_FEED_NE4BEG2",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_CLK1_0",
"CLK_FEED_NE4C3",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_EE2BEG2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK0",
"CLK_PMV_CLK0_0",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_ER1BEG3",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH2",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_LH8",
"CLK_FEED_LH3",
"CLK_FEED_NW2A1",
"CLK_FEED_LH11",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_PMV_IMUX35_0",
"CLK_PMV_IMUX0_0",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_WL1END3",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_ER1BEG2",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_EL1BEG3",
"CLK_FEED_R_CK_GCLK16",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_EE4BEG2",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_GCLK19",
"CLK_PMV_IMUX38_0",
"CLK_PMV_IMUX10_0",
"CLK_FEED_CK_GCLK11",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_EE2BEG3",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_PMV2_A0",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_WL1END1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_EE4B2",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_R_CK_GCLK28",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_PMV_IMUX15_0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX29_0",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_EE4C3",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_FEED_NW4A0",
"CLK_FEED_WW2END0",
"CLK_FEED_SE2A0",
"CLK_FEED_LH6",
"CLK_FEED_MONITOR_P",
"CLK_FEED_SE4C2",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_PMV_BYP0_0",
"CLK_PMV2_EN",
"CLK_FEED_EE4B3",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX44_0",
"CLK_PMV_BYP2_0",
"CLK_FEED_R_CK_GCLK12",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK12",
"CLK_PMV2_ODIV4",
"CLK_PMV_BYP5_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_PMV_IMUX27_0",
"CLK_FEED_EE4BEG0",
"CLK_FEED_WW2A2",
"CLK_FEED_WW2END3",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_WW4B2",
"CLK_FEED_R_CK_GCLK27",
"CLK_PMV_FAN4_0",
"CLK_FEED_R_CK_GCLK17",
"CLK_PMV2_O",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4C1",
"CLK_FEED_LH6",
"CLK_FEED_EL1BEG0",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_WR1END1",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_EE4A1",
"CLK_FEED_WW4END1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_PMV_IMUX7_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_EL1BEG2",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_R_CK_GCLK4",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_PMV_IMUX14_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_WW4A1",
"CLK_PMV2_A2",
"CLK_PMV_IMUX35_0",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_EE2A0",
"CLK_PMV2_A0",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_LH8",
"CLK_FEED_SW4A0",
"CLK_FEED_NE4C3",
"CLK_FEED_SE2A1",
"CLK_FEED_R_CK_GCLK27",
"CLK_PMV2_A1",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4C0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_WW4END2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_PMV_CLK1_0",
"CLK_FEED_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_PMV_IMUX34_0",
"CLK_FEED_NE4BEG2",
"CLK_FEED_EL1BEG3",
"CLK_FEED_WR1END3",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_SW2A2",
"CLK_FEED_LH9",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_CK_GCLK15",
"CLK_PMV2_EN",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_IMUX40_0",
"CLK_FEED_WW4A2",
"CLK_PMV_IMUX24_0",
"CLK_FEED_R_CK_GCLK5",
"CLK_PMV_IMUX3_0",
"CLK_PMV_IMUX42_0",
"CLK_PMV_IMUX5_0",
"CLK_FEED_SE2A0",
"CLK_FEED_NW4END2",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_PMV_CLK0_0",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_WW2A0",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_LH3",
"CLK_FEED_MONITOR_N",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_NW4END0",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_EE4B0",
"CLK_FEED_LH11",
"CLK_PMV_FAN4_0",
"CLK_FEED_NW2A0",
"CLK_FEED_SW4A2",
"CLK_FEED_NW4A2",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_WW4END0",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_SW2A3",
"CLK_FEED_WW4C0",
"CLK_FEED_SW4END1",
"CLK_FEED_LH12",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_IMUX16_0",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_PMV_IMUX4_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_NW4END0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_PMV_IMUX40_0",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_PMV_IMUX34_0",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_NE4C0",
"CLK_FEED_WW4END1",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_ER1BEG1",
"CLK_PMV_IMUX25_0",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_EE4A0",
"CLK_FEED_SW2A0",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_FEED_NW4A3",
"CLK_PMV_BYP7_0",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_GCLK25",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX42_0",
"CLK_FEED_SW4A2",
"CLK_FEED_EE4C0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_EL1BEG2",
"CLK_FEED_WR1END3",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_MONITOR_N",
"CLK_PMV_IMUX3_0",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_PMV_BYP1_0",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_EE2A3",
"CLK_FEED_WW2A3",
"CLK_FEED_WW2END1",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_WW2END2",
"CLK_PMV_IMUX41_0",
"CLK_FEED_SW4A1",
"CLK_FEED_SE4C1",
"CLK_PMV_IMUX26_0",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_EE4B0",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_WW4A2",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_R_CK_GCLK15",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_CK_GCLK29",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_EE2A1",
"CLK_FEED_NE2A0",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_EE4A3",
"CLK_FEED_LH12",
"CLK_FEED_EE2BEG3",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG2",
"CLK_FEED_LH7",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_NW4END3",
"CLK_PMV_FAN0_0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_IMUX15_0",
"CLK_FEED_EE4C0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_PMV_IMUX33_0",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_PMV_IMUX21_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_NE2A2",
"CLK_FEED_WW2A0",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX24_0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_PMV_IMUX1_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX27_0",
"CLK_FEED_LH7",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_EE4A1",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_FEED_NW4A1",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_SW4END3",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_WW4END2",
"CLK_FEED_EL1BEG0",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG0",
"CLK_FEED_WW4C2",
"CLK_FEED_WR1END2",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_ER1BEG0",
"CLK_PMV_IMUX12_0",
"CLK_FEED_WW4C1",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_SE4BEG3",
"CLK_FEED_SW4END2",
"CLK_PMV_IMUX22_0",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK20",
"CLK_FEED_SE2A3",
"CLK_FEED_EE2A1",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_EE4A3",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_R_CK_GCLK19",
"CLK_PMV_IMUX45_0",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_WW2A1",
"CLK_PMV_IMUX9_0",
"CLK_PMV_IMUX7_0",
"CLK_PMV_IMUX39_0",
"CLK_FEED_CK_GCLK17",
"CLK_PMV_CTRL0_0",
"CLK_PMV_IMUX23_0",
"CLK_PMV_IMUX18_0",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_PMV2_A1",
"CLK_FEED_EE4B3",
"CLK_PMV_IMUX14_0",
"CLK_FEED_EE4C1",
"CLK_FEED_SW2A2",
"CLK_FEED_NE4C1",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_PMV2_ODIV4",
"CLK_FEED_SE2A1",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_WW4C3",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_EE4BEG0",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_WW4A0",
"CLK_PMV_IMUX44_0",
"CLK_FEED_WW2A2",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_GCLK31",
"CLK_PMV_CTRL1_0",
"CLK_PMV2_ODIV2",
"CLK_FEED_SW4END3",
"CLK_PMV_IMUX13_0",
"CLK_FEED_NE4BEG1",
"CLK_FEED_R_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_EE4C2",
"CLK_PMV_IMUX6_0",
"CLK_FEED_EE4BEG3",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_WW4B3",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_IMUX28_0",
"CLK_PMV2_A2",
"CLK_FEED_NE4BEG0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_SE4C0",
"CLK_FEED_CK_GCLK13",
"CLK_FEED_WW4A3",
"CLK_FEED_EE2BEG0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_BYP0_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_EE2BEG2",
"CLK_PMV_IMUX29_0",
"CLK_FEED_EE4BEG1",
"CLK_PMV_IMUX10_0",
"CLK_PMV_IMUX1_0",
"CLK_FEED_LH2",
"CLK_PMV_FAN3_0",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_PMV_IMUX39_0",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_SW4END1",
"CLK_FEED_WW2A3",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_SE4C1",
"CLK_FEED_SW2A0",
"CLK_FEED_EE2A3",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK5",
"CLK_PMV_IMUX38_0",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_IMUX22_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX0_0",
"CLK_PMV_FAN7_0",
"CLK_FEED_EE4C2",
"CLK_FEED_LH10",
"CLK_PMV_IMUX28_0",
"CLK_FEED_NE4C1",
"CLK_FEED_ER1BEG0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_IMUX16_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_SE4BEG1",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH1",
"CLK_FEED_WL1END0",
"CLK_FEED_SW4A3",
"CLK_PMV_IMUX6_0",
"CLK_FEED_CK_GCLK13",
"CLK_PMV_IMUX33_0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_LH4",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_NE4C0",
"CLK_FEED_NE2A2",
"CLK_PMV_IMUX9_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_BYP3_0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW4B0",
"CLK_FEED_WW4C3",
"CLK_FEED_EE4C1",
"CLK_FEED_WW4C2",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_ER1BEG2",
"CLK_FEED_WL1END3",
"CLK_FEED_SE2A3",
"CLK_PMV_FAN1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_EE4BEG2",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_IMUX8_0",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_WW4B2",
"CLK_PMV_IMUX26_0",
"CLK_FEED_SE4C2",
"CLK_FEED_CK_GCLK10",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_PMV_BYP1_0",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_ER1BEG1",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_SE4C3",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_NW2A1",
"CLK_PMV_IMUX21_0",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX12_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_CK_GCLK14",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_SW2A1",
"CLK_PMV_IMUX4_0",
"CLK_FEED_EE2BEG0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_MONITOR_P",
"CLK_FEED_NE2A3",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_SW2A1"
"CLK_FEED_LH5",
"CLK_FEED_EE4C3",
"CLK_FEED_WR1END2",
"CLK_PMV_BYP7_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_CK_GCLK22",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_SW4A1",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX18_0",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK2",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WW4C0",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_SW2A3",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_IMUX25_0",
"CLK_FEED_WW4A3",
"CLK_FEED_WW2END1",
"CLK_PMV_IMUX23_0",
"CLK_FEED_CK_GCLK20",
"CLK_PMV_IMUX32_0",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_WW2A1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4B3",
"CLK_FEED_NW4A3",
"CLK_FEED_NW4A1",
"CLK_FEED_NW4END1",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_EE4A0",
"CLK_FEED_WL1END1",
"CLK_FEED_EE2BEG1",
"CLK_FEED_WW2END0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_PMV2_ODIV2",
"CLK_FEED_SE4BEG0"
],
"tile_type": "CLK_PMV2_SVT",
"sites": []
"sites": [],
"pips": {},
"tile_type": "CLK_PMV2_SVT"
}

684
artix7/tile_type_CLK_PMVIOB.json
View File

@ -1,359 +1,359 @@
{
"pips": {},
"wires": [
"CLK_FEED_WL1END0",
"CLK_PMV_FAN3_0",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_NE2A3",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_SW4A0",
"CLK_FEED_SE4BEG1",
"CLK_PMV_FAN7_0",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_NE2A0",
"CLK_FEED_SW4A3",
"CLK_FEED_NW2A0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_BYP5_0",
"CLK_FEED_NE4BEG3",
"CLK_PMVIOB_A1",
"CLK_FEED_SE4BEG3",
"CLK_PMV_IMUX5_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_LH10",
"CLK_FEED_SE4C3",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_R_CK_GCLK14",
"CLK_PMV_FAN1_0",
"CLK_FEED_NW2A2",
"CLK_PMVIOB_A0",
"CLK_FEED_NW4END2",
"CLK_PMV_IMUX32_0",
"CLK_PMV_BYP3_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_LH9",
"CLK_FEED_NW4END1",
"CLK_FEED_LH4",
"CLK_PMV_IMUX37_0",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_FEED_NW4A2",
"CLK_FEED_EE2BEG1",
"CLK_PMV_IMUX2_0",
"CLK_FEED_EE4BEG1",
"CLK_FEED_CK_GCLK30",
"CLK_PMVIOB_ODIV2",
"CLK_PMV_IMUX8_0",
"CLK_FEED_CK_GCLK22",
"CLK_FEED_CK_GCLK16",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_FAN0_0",
"CLK_FEED_LH1",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX31_0",
"CLK_FEED_LH5",
"CLK_FEED_EE2A0",
"CLK_FEED_WW4B0",
"CLK_PMV_BYP2_0",
"CLK_FEED_SE4BEG2",
"CLK_FEED_NW4END3",
"CLK_FEED_NE4BEG2",
"CLK_PMVIOB_O",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_CLK1_0",
"CLK_FEED_NE4C3",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_EE2BEG2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK0",
"CLK_PMV_CLK0_0",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_ER1BEG3",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH2",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_LH8",
"CLK_FEED_LH3",
"CLK_FEED_NW2A1",
"CLK_FEED_LH11",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_PMV_IMUX35_0",
"CLK_PMV_IMUX0_0",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_WL1END3",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_ER1BEG2",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_EL1BEG3",
"CLK_FEED_R_CK_GCLK16",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_EE4BEG2",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_GCLK19",
"CLK_PMV_IMUX38_0",
"CLK_PMV_IMUX10_0",
"CLK_FEED_CK_GCLK11",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_EE2BEG3",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_WL1END1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_EE4B2",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_R_CK_GCLK28",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_PMV_IMUX15_0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX29_0",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_EE4C3",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_FEED_NW4A0",
"CLK_FEED_WW2END0",
"CLK_FEED_SE2A0",
"CLK_FEED_LH6",
"CLK_FEED_MONITOR_P",
"CLK_FEED_SE4C2",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_PMV_BYP0_0",
"CLK_FEED_EE4B3",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX44_0",
"CLK_PMV_BYP2_0",
"CLK_FEED_R_CK_GCLK12",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK12",
"CLK_PMV_BYP5_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_PMV_IMUX27_0",
"CLK_FEED_EE4BEG0",
"CLK_FEED_WW2A2",
"CLK_FEED_WW2END3",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_WW4B2",
"CLK_FEED_R_CK_GCLK27",
"CLK_PMV_FAN4_0",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4C1",
"CLK_FEED_LH6",
"CLK_FEED_EL1BEG0",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_WR1END1",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_EE4A1",
"CLK_FEED_WW4END1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_PMV_IMUX7_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_EL1BEG2",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_R_CK_GCLK4",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_PMV_IMUX14_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_GCLK0",
"CLK_PMV_IMUX35_0",
"CLK_FEED_EE2A0",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_LH8",
"CLK_FEED_SW4A0",
"CLK_FEED_NE4C3",
"CLK_FEED_SE2A1",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4C0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_WW4END2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_PMV_CLK1_0",
"CLK_FEED_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_PMVIOB_O",
"CLK_PMV_IMUX34_0",
"CLK_FEED_EL1BEG3",
"CLK_FEED_NE4BEG2",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_FEED_WR1END3",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_SW2A2",
"CLK_FEED_LH9",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_IMUX40_0",
"CLK_FEED_WW4A2",
"CLK_PMV_IMUX24_0",
"CLK_FEED_R_CK_GCLK5",
"CLK_PMV_IMUX3_0",
"CLK_PMV_IMUX42_0",
"CLK_PMV_IMUX5_0",
"CLK_FEED_SE2A0",
"CLK_FEED_NW4END2",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_PMV_CLK0_0",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_WW2A0",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_LH3",
"CLK_FEED_MONITOR_N",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_NW4END0",
"CLK_PMVIOB_ODIV2",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_EE4B0",
"CLK_FEED_LH11",
"CLK_PMV_FAN4_0",
"CLK_FEED_NW2A0",
"CLK_FEED_SW4A2",
"CLK_FEED_NW4A2",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_WW4END0",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_SW2A3",
"CLK_FEED_WW4C0",
"CLK_FEED_SW4END1",
"CLK_FEED_LH12",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_IMUX16_0",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_PMV_IMUX4_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_NW4END0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_PMV_IMUX40_0",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_PMV_IMUX34_0",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_NE4C0",
"CLK_FEED_WW4END1",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_ER1BEG1",
"CLK_PMV_IMUX25_0",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_EE4A0",
"CLK_FEED_SW2A0",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_FEED_NW4A3",
"CLK_PMV_BYP7_0",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_GCLK25",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX42_0",
"CLK_FEED_SW4A2",
"CLK_FEED_EE4C0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_EL1BEG2",
"CLK_FEED_WR1END3",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_MONITOR_N",
"CLK_PMV_IMUX3_0",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_PMV_BYP1_0",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_EE2A3",
"CLK_PMVIOB_EN",
"CLK_FEED_WW2A3",
"CLK_FEED_WW2END1",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_WW2END2",
"CLK_PMV_IMUX41_0",
"CLK_FEED_SW4A1",
"CLK_FEED_SE4C1",
"CLK_PMV_IMUX26_0",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_EE4B0",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_WW4A2",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_R_CK_GCLK15",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_CK_GCLK29",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_EE2A1",
"CLK_FEED_NE2A0",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_EE4A3",
"CLK_FEED_LH12",
"CLK_FEED_EE2BEG3",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG2",
"CLK_FEED_LH7",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_NW4END3",
"CLK_PMV_FAN0_0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_IMUX15_0",
"CLK_FEED_EE4C0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_PMV_IMUX33_0",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_PMV_IMUX21_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_NE2A2",
"CLK_FEED_WW2A0",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX24_0",
"CLK_PMV_IMUX1_0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX27_0",
"CLK_FEED_LH7",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_EE4A1",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_FEED_NW4A1",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_SW4END3",
"CLK_FEED_R_CK_GCLK24",
"CLK_PMVIOB_ODIV4",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_WW4END2",
"CLK_FEED_EL1BEG0",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG0",
"CLK_FEED_WW4C2",
"CLK_FEED_WR1END2",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_ER1BEG0",
"CLK_PMV_IMUX12_0",
"CLK_FEED_WW4C1",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_SE4BEG3",
"CLK_FEED_SW4END2",
"CLK_PMV_IMUX22_0",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK20",
"CLK_FEED_SE2A3",
"CLK_FEED_EE2A1",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_EE4A3",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_R_CK_GCLK19",
"CLK_PMV_IMUX45_0",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_WW2A1",
"CLK_PMV_IMUX9_0",
"CLK_PMV_IMUX7_0",
"CLK_PMV_IMUX39_0",
"CLK_FEED_CK_GCLK17",
"CLK_PMV_CTRL0_0",
"CLK_PMV_IMUX23_0",
"CLK_PMV_IMUX18_0",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_FEED_EE4B3",
"CLK_PMV_IMUX14_0",
"CLK_FEED_EE4C1",
"CLK_FEED_SW2A2",
"CLK_FEED_NE4C1",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_SE2A1",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_WW4C3",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_EE4BEG0",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_WW4A0",
"CLK_PMV_IMUX44_0",
"CLK_FEED_WW2A2",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_GCLK31",
"CLK_PMV_CTRL1_0",
"CLK_FEED_SW4END3",
"CLK_PMV_IMUX13_0",
"CLK_FEED_NE4BEG1",
"CLK_FEED_R_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_EE4C2",
"CLK_PMV_IMUX6_0",
"CLK_FEED_EE4BEG3",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_WW4B3",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_IMUX28_0",
"CLK_FEED_NE4BEG0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_SE4C0",
"CLK_FEED_CK_GCLK13",
"CLK_FEED_WW4A3",
"CLK_FEED_EE2BEG0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_BYP0_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_EE2BEG2",
"CLK_PMVIOB_ODIV4",
"CLK_PMV_IMUX29_0",
"CLK_FEED_EE4BEG1",
"CLK_PMV_IMUX10_0",
"CLK_PMV_IMUX1_0",
"CLK_FEED_LH2",
"CLK_PMV_FAN3_0",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_PMV_IMUX39_0",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_SW4END1",
"CLK_FEED_WW2A3",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_SE4C1",
"CLK_FEED_SW2A0",
"CLK_FEED_EE2A3",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK5",
"CLK_PMV_IMUX38_0",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_IMUX22_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX0_0",
"CLK_PMV_FAN7_0",
"CLK_FEED_EE4C2",
"CLK_FEED_LH10",
"CLK_PMV_IMUX28_0",
"CLK_FEED_NE4C1",
"CLK_FEED_ER1BEG0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_IMUX16_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_SE4BEG1",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH1",
"CLK_FEED_WL1END0",
"CLK_FEED_SW4A3",
"CLK_PMV_IMUX6_0",
"CLK_FEED_CK_GCLK13",
"CLK_PMV_IMUX33_0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_LH4",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_NE4C0",
"CLK_FEED_NE2A2",
"CLK_PMV_IMUX9_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_BYP3_0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW4B0",
"CLK_FEED_WW4C3",
"CLK_FEED_EE4C1",
"CLK_PMVIOB_A0",
"CLK_FEED_WW4C2",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_ER1BEG2",
"CLK_FEED_WL1END3",
"CLK_FEED_SE2A3",
"CLK_PMV_FAN1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_EE4BEG2",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_IMUX8_0",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_WW4B2",
"CLK_PMV_IMUX26_0",
"CLK_FEED_SE4C2",
"CLK_FEED_CK_GCLK10",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_PMV_BYP1_0",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_ER1BEG1",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_SE4C3",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_GCLK19",
"CLK_PMVIOB_A1",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_NW2A1",
"CLK_PMV_IMUX21_0",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX12_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_PMVIOB_EN",
"CLK_FEED_CK_GCLK14",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_SW2A1",
"CLK_PMV_IMUX4_0",
"CLK_FEED_EE2BEG0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_MONITOR_P",
"CLK_FEED_NE2A3",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_SW2A1"
"CLK_FEED_LH5",
"CLK_FEED_EE4C3",
"CLK_FEED_WR1END2",
"CLK_PMV_BYP7_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_CK_GCLK22",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_SW4A1",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX18_0",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK2",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WW4C0",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_SW2A3",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_IMUX25_0",
"CLK_FEED_WW4A3",
"CLK_FEED_WW2END1",
"CLK_PMV_IMUX23_0",
"CLK_FEED_CK_GCLK20",
"CLK_PMV_IMUX32_0",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_WW2A1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4B3",
"CLK_FEED_NW4A3",
"CLK_FEED_NW4A1",
"CLK_FEED_NW4END1",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_EE4A0",
"CLK_FEED_WL1END1",
"CLK_FEED_EE2BEG1",
"CLK_FEED_WW2END0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_FEED_SE4BEG0"
],
"tile_type": "CLK_PMVIOB",
"sites": []
"sites": [],
"pips": {},
"tile_type": "CLK_PMVIOB"
}

116
artix7/tile_type_CLK_TERM.json
View File

@ -1,71 +1,71 @@
{
"pips": {},
"wires": [
"CLK_TERM_R_GCLK11",
"CLK_TERM_GCLK21",
"CLK_TERM_R_GCLK3",
"CLK_TERM_R_GCLK9",
"CLK_TERM_R_GCLK30",
"CLK_TERM_GCLK25",
"CLK_TERM_R_GCLK4",
"CLK_TERM_GCLK16",
"CLK_TERM_GCLK12",
"CLK_TERM_R_GCLK15",
"CLK_TERM_R_GCLK16",
"CLK_TERM_R_GCLK23",
"CLK_TERM_R_GCLK1",
"CLK_TERM_GCLK7",
"CLK_TERM_R_GCLK19",
"CLK_TERM_GCLK4",
"CLK_TERM_GCLK22",
"CLK_TERM_GCLK9",
"CLK_TERM_GCLK8",
"CLK_TERM_GCLK13",
"CLK_TERM_GCLK29",
"CLK_TERM_GCLK5",
"CLK_TERM_GCLK20",
"CLK_TERM_R_GCLK28",
"CLK_TERM_R_GCLK0",
"CLK_TERM_GCLK19",
"CLK_TERM_R_GCLK24",
"CLK_TERM_GCLK1",
"CLK_TERM_R_GCLK10",
"CLK_TERM_GCLK31",
"CLK_TERM_GCLK30",
"CLK_TERM_GCLK15",
"CLK_TERM_R_GCLK18",
"CLK_TERM_GCLK24",
"CLK_TERM_GCLK20",
"CLK_TERM_GCLK6",
"CLK_TERM_GCLK11",
"CLK_TERM_GCLK2",
"CLK_TERM_GCLK18",
"CLK_TERM_R_GCLK7",
"CLK_TERM_R_GCLK29",
"CLK_TERM_GCLK31",
"CLK_TERM_R_GCLK10",
"CLK_TERM_R_GCLK9",
"CLK_TERM_R_GCLK13",
"CLK_TERM_R_GCLK19",
"CLK_TERM_GCLK8",
"CLK_TERM_GCLK0",
"CLK_TERM_GCLK27",
"CLK_TERM_GCLK29",
"CLK_TERM_R_GCLK17",
"CLK_TERM_GCLK9",
"CLK_TERM_R_GCLK22",
"CLK_TERM_R_GCLK30",
"CLK_TERM_GCLK3",
"CLK_TERM_R_GCLK1",
"CLK_TERM_R_GCLK15",
"CLK_TERM_R_GCLK25",
"CLK_TERM_GCLK26",
"CLK_TERM_GCLK23",
"CLK_TERM_R_GCLK31",
"CLK_TERM_R_GCLK14",
"CLK_TERM_GCLK15",
"CLK_TERM_GCLK28",
"CLK_TERM_R_GCLK20",
"CLK_TERM_GCLK14",
"CLK_TERM_R_GCLK29",
"CLK_TERM_R_GCLK2",
"CLK_TERM_R_GCLK6",
"CLK_TERM_R_GCLK27",
"CLK_TERM_GCLK17",
"CLK_TERM_R_GCLK7",
"CLK_TERM_R_GCLK8",
"CLK_TERM_GCLK24",
"CLK_TERM_R_GCLK24",
"CLK_TERM_GCLK12",
"CLK_TERM_R_GCLK5",
"CLK_TERM_R_GCLK21",
"CLK_TERM_GCLK2",
"CLK_TERM_GCLK10",
"CLK_TERM_GCLK18",
"CLK_TERM_GCLK17",
"CLK_TERM_R_GCLK23",
"CLK_TERM_GCLK30",
"CLK_TERM_GCLK25",
"CLK_TERM_R_GCLK2",
"CLK_TERM_GCLK4",
"CLK_TERM_R_GCLK28",
"CLK_TERM_R_GCLK6",
"CLK_TERM_R_GCLK11",
"CLK_TERM_GCLK7",
"CLK_TERM_R_GCLK0",
"CLK_TERM_R_GCLK12",
"CLK_TERM_R_GCLK18",
"CLK_TERM_GCLK3",
"CLK_TERM_GCLK5",
"CLK_TERM_GCLK22",
"CLK_TERM_GCLK16",
"CLK_TERM_GCLK13",
"CLK_TERM_R_GCLK20",
"CLK_TERM_R_GCLK8",
"CLK_TERM_R_GCLK14",
"CLK_TERM_R_GCLK26",
"CLK_TERM_GCLK27",
"CLK_TERM_R_GCLK25",
"CLK_TERM_R_GCLK17",
"CLK_TERM_GCLK0"
"CLK_TERM_GCLK11",
"CLK_TERM_GCLK10",
"CLK_TERM_GCLK19",
"CLK_TERM_R_GCLK16",
"CLK_TERM_R_GCLK31",
"CLK_TERM_GCLK14",
"CLK_TERM_R_GCLK27",
"CLK_TERM_R_GCLK4",
"CLK_TERM_GCLK28",
"CLK_TERM_GCLK21",
"CLK_TERM_R_GCLK21",
"CLK_TERM_R_GCLK3"
],
"tile_type": "CLK_TERM",
"sites": []
"sites": [],
"pips": {},
"tile_type": "CLK_TERM"
}

10424
artix7/tile_type_CMT_FIFO_L.json
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10424
artix7/tile_type_CMT_FIFO_R.json
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434
artix7/tile_type_CMT_PMV.json
View File

@ -1,230 +1,230 @@
{
"pips": {},
"wires": [
"CMT_PMV_IMUX39",
"CMT_PMV_CTRL1",
"CMT_PMV_SW4A1",
"CMT_PMV_SE4BEG3",
"CMT_PMV_IMUX3",
"CMT_PMV_BYP1",
"CMT_PMV_EE4B3",
"CMT_PMV_WR1END3",
"CMT_PMV_SE2A3",
"CMT_PMV_LOGIC_OUTS2",
"CMT_PMV_BYP7",
"CMT_PMV_NW2A2",
"CMT_PMV_NE4BEG0",
"CMT_PMV_LH3",
"CMT_PMV_WW4B1",
"CMT_PMV_IMUX28",
"CMT_PMV_LH7",
"CMT_PMV_ER1BEG3",
"L_TERM_INT_PHASER_TO_IO_ICLKDIV",
"CMT_PMV_IMUX41",
"CMT_PMV_EE4BEG2",
"CMT_PMV_WW4A0",
"CMT_PMV_IMUX31",
"CMT_PMV_WL1END2",
"CMT_PMV_IMUX45",
"CMT_PMV_LH12",
"CMT_PMV_EE4A0",
"CMT_PMV_BYP5",
"CMT_PMV_IMUX25",
"CMT_PMV_EE4BEG0",
"CMT_PMV_MONITOR_P",
"CMT_PMV_IMUX11",
"CMT_PMV_EE2A3",
"CMT_PMV_LOGIC_OUTS8",
"CMT_PMV_LOGIC_OUTS7",
"CMT_PMV_EE4BEG3",
"CMT_PMV_EE2BEG1",
"CMT_PMV_IMUX40",
"CMT_PMV_NE2A1",
"CMT_PMV_SW4END3",
"CMT_PMV_LOGIC_OUTS22",
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90",
"CMT_PMV_ER1BEG1",
"CMT_PMV_EE2BEG3",
"CMT_PMV_EE4A2",
"CMT_PMV_EL1BEG3",
"CMT_PMV_IMUX35",
"CMT_PMV_SE4BEG1",
"CMT_PMV_NW4END1",
"CMT_PMV_IMUX42",
"CMT_PMV_IMUX26",
"CMT_PMV_WW2END3",
"CMT_PMV_BYP2",
"CMT_PMV_EL1BEG0",
"CMT_PMV_EE2A2",
"CMT_PMV_IMUX6",
"CMT_PMV_NE2A2",
"CMT_PMV_IMUX5",
"CMT_PMV_EL1BEG2",
"CMT_PMV_IMUX18",
"CMT_PMV_LOGIC_OUTS14",
"CMT_PMV_FAN1",
"CMT_PMV_IMUX2",
"CMT_PMV_LOGIC_OUTS1",
"CMT_PMV_WW2A0",
"CMT_PMV_NE2A3",
"CMT_PMV_LOGIC_OUTS13",
"CMT_PMV_IMUX4",
"CMT_PMV_NW4END0",
"CMT_PMV_IMUX36",
"CMT_PMV_FAN2",
"CMT_PMV_IMUX22",
"CMT_PMV_NE4C2",
"CMT_PMV_WL1END0",
"CMT_PMV_EE4C3",
"CMT_PMV_EE2A1",
"CMT_PMV_LOGIC_OUTS20",
"L_TERM_INT_PHASER_TO_IO_OCLK",
"CMT_PMV_SE2A1",
"CMT_PMV_LOGIC_OUTS3",
"CMT_PMV_LH6",
"CMT_PMV_SW4END2",
"CMT_PMV_WW4END0",
"CMT_PMV_LOGIC_OUTS9",
"CMT_PMV_WW2END0",
"CMT_PMV_SE4C3",
"CMT_PMV_IMUX12",
"CMT_PMV_LOGIC_OUTS15",
"CMT_PMV_FAN6",
"CMT_PMV_FAN7",
"CMT_PMV_LH10",
"CMT_PMV_WW4A1",
"CMT_PMV_NW2A3",
"CMT_PMV_LOGIC_OUTS23",
"CMT_PMV_SW4END3",
"CMT_PMV_ER1BEG2",
"CMT_PMV_WW4C3",
"CMT_PMV_LOGIC_OUTS21",
"CMT_PMV_WW2A1",
"CMT_PMV_SW4A0",
"L_TERM_INT_PHASER_TO_IO_OCLKDIV",
"CMT_PMV_WL1END3",
"CMT_PMV_LOGIC_OUTS16",
"CMT_PMV_LH8",
"CMT_PMV_LOGIC_OUTS4",
"CMT_PMV_SW4A2",
"CMT_PMV_WW2A2",
"CMT_PMV_SW2A3",
"CMT_PMV_WW4A2",
"CMT_PMV_WL1END1",
"CMT_PMV_EE4A1",
"CMT_PMV_IMUX43",
"CMT_PMV_WW4A3",
"CMT_PMV_SE4C1",
"CMT_PMV_IMUX20",
"L_TERM_INT_PHASER_TO_IO_ICLK",
"CMT_PMV_NW4A2",
"CMT_PMV_SW2A2",
"CMT_PMV_LH2",
"CMT_PMV_WW2END2",
"CMT_PMV_LH5",
"CMT_PMV_CTRL0",
"CMT_PMV_NW2A0",
"CMT_PMV_FAN4",
"CMT_PMV_IMUX33",
"CMT_PMV_NE4BEG3",
"CMT_PMV_LOGIC_OUTS19",
"CMT_PMV_IMUX13",
"CMT_PMV_SW2A1",
"CMT_PMV_IMUX44",
"CMT_PMV_NE4C1",
"CMT_PMV_IMUX46",
"CMT_PMV_NE4C0",
"CMT_PMV_WW4END1",
"CMT_PMV_IMUX9",
"CMT_PMV_SE2A2",
"CMT_PMV_WW4C2",
"CMT_PMV_BYP6",
"CMT_PMV_EE4BEG1",
"CMT_PMV_NE4BEG1",
"CMT_PMV_WR1END2",
"CMT_PMV_EE4B0",
"CMT_PMV_WW4END3",
"CMT_PMV_ER1BEG0",
"CMT_PMV_BYP3",
"CMT_PMV_FAN3",
"CMT_PMV_NW4END3",
"CMT_PMV_IMUX38",
"CMT_PMV_FAN0",
"CMT_PMV_EE4C1",
"CMT_PMV_SE4BEG0",
"CMT_PMV_BYP4",
"CMT_PMV_IMUX27",
"CMT_PMV_WW2A3",
"CMT_PMV_IMUX29",
"CMT_PMV_WW4B3",
"CMT_PMV_LOGIC_OUTS10",
"CMT_PMV_EE4B2",
"CMT_PMV_NW4END2",
"CMT_PMV_MONITOR_N",
"CMT_PMV_WW4C0",
"CMT_PMV_LOGIC_OUTS11",
"CMT_PMV_IMUX21",
"CMT_PMV_IMUX1",
"CMT_PMV_IMUX7",
"CMT_PMV_NW4A0",
"CMT_PMV_SW2A0",
"CMT_PMV_BYP0",
"CMT_PMV_CLK0",
"CMT_PMV_NE2A0",
"CMT_PMV_IMUX47",
"CMT_PMV_EE4B1",
"CMT_PMV_LOGIC_OUTS17",
"CMT_PMV_WW4B0",
"CMT_PMV_WR1END1",
"CMT_PMV_LOGIC_OUTS12",
"CMT_PMV_SE4BEG2",
"CMT_PMV_IMUX14",
"CMT_PMV_SE4C0",
"CMT_PMV_WW4C1",
"CMT_PMV_EL1BEG1",
"CMT_PMV_CLK1",
"CMT_PMV_FAN5",
"CMT_PMV_EE4C2",
"CMT_PMV_LH6",
"CMT_PMV_IMUX17",
"CMT_PMV_NW4A1",
"CMT_PMV_LOGIC_OUTS5",
"CMT_PMV_IMUX16",
"CMT_PMV_IMUX10",
"CMT_PMV_LOGIC_OUTS18",
"CMT_PMV_IMUX30",
"CMT_PMV_SW4A3",
"CMT_PMV_SW4END1",
"CMT_PMV_IMUX8",
"CMT_PMV_WW4END2",
"CMT_PMV_EE2A0",
"CMT_PMV_EE2BEG0",
"CMT_PMV_IMUX37",
"CMT_PMV_WW4C3",
"CMT_PMV_NE2A3",
"CMT_PMV_WW2A3",
"CMT_PMV_EE2A2",
"CMT_PMV_IMUX32",
"CMT_PMV_SE2A0",
"CMT_PMV_IMUX19",
"CMT_PMV_LH9",
"CMT_PMV_NE4C3",
"CMT_PMV_LH4",
"CMT_PMV_NW4A3",
"CMT_PMV_SE4C2",
"CMT_PMV_IMUX46",
"CMT_PMV_SE4C0",
"CMT_PMV_IMUX38",
"CMT_PMV_WR1END1",
"CMT_PMV_SW4A3",
"CMT_PMV_SW2A0",
"CMT_PMV_SW4A2",
"CMT_PMV_BYP7",
"CMT_PMV_BYP6",
"CMT_PMV_IMUX22",
"L_TERM_INT_PHASER_TO_IO_OCLKDIV",
"CMT_PMV_IMUX0",
"CMT_PMV_NE4BEG2",
"CMT_PMV_LOGIC_OUTS0",
"CMT_PMV_IMUX24",
"CMT_PMV_WR1END0",
"CMT_PMV_EE4C0",
"CMT_PMV_IMUX34",
"CMT_PMV_IMUX15",
"CMT_PMV_EE2BEG2",
"CMT_PMV_NW2A3",
"CMT_PMV_WW4END0",
"CMT_PMV_IMUX4",
"CMT_PMV_LOGIC_OUTS13",
"CMT_PMV_IMUX30",
"CMT_PMV_IMUX10",
"CMT_PMV_IMUX45",
"CMT_PMV_WR1END3",
"CMT_PMV_EE4B0",
"CMT_PMV_LOGIC_OUTS22",
"CMT_PMV_LOGIC_OUTS14",
"CMT_PMV_IMUX3",
"CMT_PMV_IMUX26",
"CMT_PMV_LH3",
"CMT_PMV_IMUX23",
"CMT_PMV_SW4END0",
"CMT_PMV_WW4B2",
"CMT_PMV_LOGIC_OUTS6",
"CMT_PMV_NW2A1",
"CMT_PMV_WW2END1",
"CMT_PMV_LH1",
"CMT_PMV_EL1BEG0",
"CMT_PMV_LOGIC_OUTS21",
"CMT_PMV_FAN2",
"CMT_PMV_IMUX28",
"CMT_PMV_WW2A0",
"CMT_PMV_NW4A0",
"CMT_PMV_WW4END1",
"CMT_PMV_BYP3",
"CMT_PMV_IMUX29",
"CMT_PMV_WL1END1",
"CMT_PMV_SW4END1",
"CMT_PMV_LOGIC_OUTS16",
"CMT_PMV_IMUX35",
"CMT_PMV_LOGIC_OUTS15",
"CMT_PMV_EE2A0",
"CMT_PMV_EE4A3",
"CMT_PMV_LH11"
"CMT_PMV_NW2A2",
"CMT_PMV_IMUX24",
"CMT_PMV_IMUX44",
"CMT_PMV_LOGIC_OUTS5",
"CMT_PMV_BYP5",
"CMT_PMV_LOGIC_OUTS3",
"CMT_PMV_WW4END2",
"CMT_PMV_WL1END3",
"CMT_PMV_EE2BEG3",
"CMT_PMV_IMUX7",
"CMT_PMV_WW2A2",
"CMT_PMV_IMUX9",
"CMT_PMV_SE4BEG0",
"CMT_PMV_EE4BEG1",
"CMT_PMV_IMUX27",
"CMT_PMV_EE4C3",
"CMT_PMV_IMUX36",
"CMT_PMV_IMUX21",
"CMT_PMV_WL1END2",
"CMT_PMV_LOGIC_OUTS18",
"CMT_PMV_WW4A0",
"CMT_PMV_FAN7",
"CMT_PMV_WW4C2",
"CMT_PMV_LH5",
"CMT_PMV_SW4END0",
"CMT_PMV_EE2BEG0",
"CMT_PMV_LOGIC_OUTS2",
"CMT_PMV_IMUX37",
"CMT_PMV_EE2BEG2",
"CMT_PMV_NW4END1",
"CMT_PMV_EE4BEG3",
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90",
"CMT_PMV_BYP4",
"CMT_PMV_BYP2",
"CMT_PMV_MONITOR_N",
"CMT_PMV_NE4C2",
"CMT_PMV_LOGIC_OUTS12",
"CMT_PMV_WW4A3",
"CMT_PMV_IMUX15",
"CMT_PMV_SE4C1",
"CMT_PMV_EL1BEG2",
"CMT_PMV_IMUX33",
"CMT_PMV_LOGIC_OUTS0",
"CMT_PMV_FAN1",
"CMT_PMV_NE4C0",
"CMT_PMV_IMUX14",
"CMT_PMV_IMUX20",
"CMT_PMV_NW4END2",
"CMT_PMV_SW4A1",
"CMT_PMV_IMUX8",
"CMT_PMV_LH2",
"CMT_PMV_IMUX6",
"CMT_PMV_IMUX2",
"CMT_PMV_LOGIC_OUTS1",
"CMT_PMV_ER1BEG0",
"CMT_PMV_SE2A3",
"CMT_PMV_LH7",
"CMT_PMV_LH10",
"CMT_PMV_LOGIC_OUTS20",
"CMT_PMV_EE4B3",
"CMT_PMV_EL1BEG3",
"L_TERM_INT_PHASER_TO_IO_ICLKDIV",
"CMT_PMV_EE4C1",
"CMT_PMV_WR1END2",
"CMT_PMV_IMUX16",
"CMT_PMV_WW4A1",
"CMT_PMV_WW4END3",
"CMT_PMV_ER1BEG3",
"CMT_PMV_SE4BEG2",
"CMT_PMV_CLK0",
"CMT_PMV_NE4BEG0",
"CMT_PMV_LOGIC_OUTS7",
"CMT_PMV_EE4C0",
"CMT_PMV_FAN0",
"CMT_PMV_NE2A1",
"CMT_PMV_WR1END0",
"CMT_PMV_NW2A1",
"CMT_PMV_IMUX34",
"CMT_PMV_CTRL1",
"L_TERM_INT_PHASER_TO_IO_ICLK",
"CMT_PMV_SW4A0",
"CMT_PMV_EE4BEG0",
"CMT_PMV_LH9",
"CMT_PMV_IMUX1",
"CMT_PMV_IMUX40",
"CMT_PMV_WW4C0",
"CMT_PMV_SE4C3",
"CMT_PMV_NE2A2",
"CMT_PMV_EE4A2",
"CMT_PMV_NE4BEG3",
"CMT_PMV_WW2END0",
"CMT_PMV_CTRL0",
"CMT_PMV_LH11",
"CMT_PMV_LH8",
"CMT_PMV_WW4B1",
"CMT_PMV_IMUX31",
"CMT_PMV_WW2END1",
"CMT_PMV_IMUX5",
"CMT_PMV_SW2A3",
"CMT_PMV_IMUX13",
"CMT_PMV_NW4A2",
"CMT_PMV_NW4END0",
"CMT_PMV_IMUX11",
"CMT_PMV_CLK1",
"CMT_PMV_MONITOR_P",
"CMT_PMV_LOGIC_OUTS9",
"CMT_PMV_IMUX19",
"CMT_PMV_EE4BEG2",
"CMT_PMV_LOGIC_OUTS10",
"CMT_PMV_SE2A1",
"CMT_PMV_FAN6",
"CMT_PMV_FAN5",
"CMT_PMV_EE4B2",
"CMT_PMV_EE2A1",
"CMT_PMV_LH12",
"CMT_PMV_IMUX18",
"CMT_PMV_LH4",
"CMT_PMV_NW4END3",
"CMT_PMV_EE2BEG1",
"CMT_PMV_WW2END3",
"CMT_PMV_WW4A2",
"CMT_PMV_BYP1",
"L_TERM_INT_PHASER_TO_IO_OCLK",
"CMT_PMV_EE4C2",
"CMT_PMV_NE4C3",
"CMT_PMV_NW2A0",
"CMT_PMV_NE4BEG1",
"CMT_PMV_SW4END2",
"CMT_PMV_NE4C1",
"CMT_PMV_LH1",
"CMT_PMV_EE4A0",
"CMT_PMV_WL1END0",
"CMT_PMV_ER1BEG1",
"CMT_PMV_WW2A1",
"CMT_PMV_IMUX42",
"CMT_PMV_EL1BEG1",
"CMT_PMV_NE4BEG2",
"CMT_PMV_EE4A1",
"CMT_PMV_SE2A2",
"CMT_PMV_SE4BEG3",
"CMT_PMV_WW4C1",
"CMT_PMV_IMUX43",
"CMT_PMV_LOGIC_OUTS6",
"CMT_PMV_BYP0",
"CMT_PMV_IMUX41",
"CMT_PMV_EE4B1",
"CMT_PMV_WW4B0",
"CMT_PMV_SE2A0",
"CMT_PMV_IMUX39",
"CMT_PMV_LOGIC_OUTS4",
"CMT_PMV_LOGIC_OUTS19",
"CMT_PMV_IMUX25",
"CMT_PMV_NW4A3",
"CMT_PMV_WW2END2",
"CMT_PMV_NE2A0",
"CMT_PMV_SW2A2",
"CMT_PMV_WW4B3",
"CMT_PMV_IMUX12",
"CMT_PMV_LOGIC_OUTS8",
"CMT_PMV_LOGIC_OUTS11",
"CMT_PMV_WW4B2",
"CMT_PMV_EE2A3",
"CMT_PMV_SW2A1",
"CMT_PMV_FAN3",
"CMT_PMV_SE4C2",
"CMT_PMV_IMUX47",
"CMT_PMV_SE4BEG1",
"CMT_PMV_LOGIC_OUTS17"
],
"tile_type": "CMT_PMV",
"sites": []
"sites": [],
"pips": {},
"tile_type": "CMT_PMV"
}

434
artix7/tile_type_CMT_PMV_L.json
View File

@ -1,230 +1,230 @@
{
"pips": {},
"wires": [
"CMT_PMV_IMUX39",
"CMT_PMV_CTRL1",
"CMT_PMV_SW4A1",
"CMT_PMV_SE4BEG3",
"CMT_PMV_IMUX3",
"CMT_PMV_BYP1",
"CMT_PMV_EE4B3",
"CMT_PMV_WR1END3",
"CMT_PMV_SE2A3",
"CMT_PMV_LOGIC_OUTS2",
"CMT_PMV_BYP7",
"CMT_PMV_NW2A2",
"CMT_PMV_NE4BEG0",
"CMT_PMV_LH3",
"CMT_PMV_WW4B1",
"CMT_PMV_IMUX28",
"CMT_PMV_LH7",
"CMT_PMV_ER1BEG3",
"L_TERM_INT_PHASER_TO_IO_ICLKDIV",
"CMT_PMV_IMUX41",
"CMT_PMV_EE4BEG2",
"CMT_PMV_WW4A0",
"CMT_PMV_IMUX31",
"CMT_PMV_WL1END2",
"CMT_PMV_IMUX45",
"CMT_PMV_LH12",
"CMT_PMV_EE4A0",
"CMT_PMV_BYP5",
"CMT_PMV_IMUX25",
"CMT_PMV_EE4BEG0",
"CMT_PMV_MONITOR_P",
"CMT_PMV_IMUX11",
"CMT_PMV_EE2A3",
"CMT_PMV_LOGIC_OUTS8",
"CMT_PMV_LOGIC_OUTS7",
"CMT_PMV_EE4BEG3",
"CMT_PMV_EE2BEG1",
"CMT_PMV_IMUX40",
"CMT_PMV_NE2A1",
"CMT_PMV_SW4END3",
"CMT_PMV_LOGIC_OUTS22",
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90",
"CMT_PMV_ER1BEG1",
"CMT_PMV_EE2BEG3",
"CMT_PMV_EE4A2",
"CMT_PMV_EL1BEG3",
"CMT_PMV_IMUX35",
"CMT_PMV_SE4BEG1",
"CMT_PMV_NW4END1",
"CMT_PMV_IMUX42",
"CMT_PMV_IMUX26",
"CMT_PMV_WW2END3",
"CMT_PMV_BYP2",
"CMT_PMV_EL1BEG0",
"CMT_PMV_EE2A2",
"CMT_PMV_IMUX6",
"CMT_PMV_NE2A2",
"CMT_PMV_IMUX5",
"CMT_PMV_EL1BEG2",
"CMT_PMV_IMUX18",
"CMT_PMV_LOGIC_OUTS14",
"CMT_PMV_FAN1",
"CMT_PMV_IMUX2",
"CMT_PMV_LOGIC_OUTS1",
"CMT_PMV_WW2A0",
"CMT_PMV_NE2A3",
"CMT_PMV_LOGIC_OUTS13",
"CMT_PMV_IMUX4",
"CMT_PMV_NW4END0",
"CMT_PMV_IMUX36",
"CMT_PMV_FAN2",
"CMT_PMV_IMUX22",
"CMT_PMV_NE4C2",
"CMT_PMV_WL1END0",
"CMT_PMV_EE4C3",
"CMT_PMV_EE2A1",
"CMT_PMV_LOGIC_OUTS20",
"L_TERM_INT_PHASER_TO_IO_OCLK",
"CMT_PMV_SE2A1",
"CMT_PMV_LOGIC_OUTS3",
"CMT_PMV_LH6",
"CMT_PMV_SW4END2",
"CMT_PMV_WW4END0",
"CMT_PMV_LOGIC_OUTS9",
"CMT_PMV_WW2END0",
"CMT_PMV_SE4C3",
"CMT_PMV_IMUX12",
"CMT_PMV_LOGIC_OUTS15",
"CMT_PMV_FAN6",
"CMT_PMV_FAN7",
"CMT_PMV_LH10",
"CMT_PMV_WW4A1",
"CMT_PMV_NW2A3",
"CMT_PMV_LOGIC_OUTS23",
"CMT_PMV_SW4END3",
"CMT_PMV_ER1BEG2",
"CMT_PMV_WW4C3",
"CMT_PMV_LOGIC_OUTS21",
"CMT_PMV_WW2A1",
"CMT_PMV_SW4A0",
"L_TERM_INT_PHASER_TO_IO_OCLKDIV",
"CMT_PMV_WL1END3",
"CMT_PMV_LOGIC_OUTS16",
"CMT_PMV_LH8",
"CMT_PMV_LOGIC_OUTS4",
"CMT_PMV_SW4A2",
"CMT_PMV_WW2A2",
"CMT_PMV_SW2A3",
"CMT_PMV_WW4A2",
"CMT_PMV_WL1END1",
"CMT_PMV_EE4A1",
"CMT_PMV_IMUX43",
"CMT_PMV_WW4A3",
"CMT_PMV_SE4C1",
"CMT_PMV_IMUX20",
"L_TERM_INT_PHASER_TO_IO_ICLK",
"CMT_PMV_NW4A2",
"CMT_PMV_SW2A2",
"CMT_PMV_LH2",
"CMT_PMV_WW2END2",
"CMT_PMV_LH5",
"CMT_PMV_CTRL0",
"CMT_PMV_NW2A0",
"CMT_PMV_FAN4",
"CMT_PMV_IMUX33",
"CMT_PMV_NE4BEG3",
"CMT_PMV_LOGIC_OUTS19",
"CMT_PMV_IMUX13",
"CMT_PMV_SW2A1",
"CMT_PMV_IMUX44",
"CMT_PMV_NE4C1",
"CMT_PMV_IMUX46",
"CMT_PMV_NE4C0",
"CMT_PMV_WW4END1",
"CMT_PMV_IMUX9",
"CMT_PMV_SE2A2",
"CMT_PMV_WW4C2",
"CMT_PMV_BYP6",
"CMT_PMV_EE4BEG1",
"CMT_PMV_NE4BEG1",
"CMT_PMV_WR1END2",
"CMT_PMV_EE4B0",
"CMT_PMV_WW4END3",
"CMT_PMV_ER1BEG0",
"CMT_PMV_BYP3",
"CMT_PMV_FAN3",
"CMT_PMV_NW4END3",
"CMT_PMV_IMUX38",
"CMT_PMV_FAN0",
"CMT_PMV_EE4C1",
"CMT_PMV_SE4BEG0",
"CMT_PMV_BYP4",
"CMT_PMV_IMUX27",
"CMT_PMV_WW2A3",
"CMT_PMV_IMUX29",
"CMT_PMV_WW4B3",
"CMT_PMV_LOGIC_OUTS10",
"CMT_PMV_EE4B2",
"CMT_PMV_NW4END2",
"CMT_PMV_MONITOR_N",
"CMT_PMV_WW4C0",
"CMT_PMV_LOGIC_OUTS11",
"CMT_PMV_IMUX21",
"CMT_PMV_IMUX1",
"CMT_PMV_IMUX7",
"CMT_PMV_NW4A0",
"CMT_PMV_SW2A0",
"CMT_PMV_BYP0",
"CMT_PMV_CLK0",
"CMT_PMV_NE2A0",
"CMT_PMV_IMUX47",
"CMT_PMV_EE4B1",
"CMT_PMV_LOGIC_OUTS17",
"CMT_PMV_WW4B0",
"CMT_PMV_WR1END1",
"CMT_PMV_LOGIC_OUTS12",
"CMT_PMV_SE4BEG2",
"CMT_PMV_IMUX14",
"CMT_PMV_SE4C0",
"CMT_PMV_WW4C1",
"CMT_PMV_EL1BEG1",
"CMT_PMV_CLK1",
"CMT_PMV_FAN5",
"CMT_PMV_EE4C2",
"CMT_PMV_LH6",
"CMT_PMV_IMUX17",
"CMT_PMV_NW4A1",
"CMT_PMV_LOGIC_OUTS5",
"CMT_PMV_IMUX16",
"CMT_PMV_IMUX10",
"CMT_PMV_LOGIC_OUTS18",
"CMT_PMV_IMUX30",
"CMT_PMV_SW4A3",
"CMT_PMV_SW4END1",
"CMT_PMV_IMUX8",
"CMT_PMV_WW4END2",
"CMT_PMV_EE2A0",
"CMT_PMV_EE2BEG0",
"CMT_PMV_IMUX37",
"CMT_PMV_WW4C3",
"CMT_PMV_NE2A3",
"CMT_PMV_WW2A3",
"CMT_PMV_EE2A2",
"CMT_PMV_IMUX32",
"CMT_PMV_SE2A0",
"CMT_PMV_IMUX19",
"CMT_PMV_LH9",
"CMT_PMV_NE4C3",
"CMT_PMV_LH4",
"CMT_PMV_NW4A3",
"CMT_PMV_SE4C2",
"CMT_PMV_IMUX46",
"CMT_PMV_SE4C0",
"CMT_PMV_IMUX38",
"CMT_PMV_WR1END1",
"CMT_PMV_SW4A3",
"CMT_PMV_SW2A0",
"CMT_PMV_SW4A2",
"CMT_PMV_BYP7",
"CMT_PMV_BYP6",
"CMT_PMV_IMUX22",
"L_TERM_INT_PHASER_TO_IO_OCLKDIV",
"CMT_PMV_IMUX0",
"CMT_PMV_NE4BEG2",
"CMT_PMV_LOGIC_OUTS0",
"CMT_PMV_IMUX24",
"CMT_PMV_WR1END0",
"CMT_PMV_EE4C0",
"CMT_PMV_IMUX34",
"CMT_PMV_IMUX15",
"CMT_PMV_EE2BEG2",
"CMT_PMV_NW2A3",
"CMT_PMV_WW4END0",
"CMT_PMV_IMUX4",
"CMT_PMV_LOGIC_OUTS13",
"CMT_PMV_IMUX30",
"CMT_PMV_IMUX10",
"CMT_PMV_IMUX45",
"CMT_PMV_WR1END3",
"CMT_PMV_EE4B0",
"CMT_PMV_LOGIC_OUTS22",
"CMT_PMV_LOGIC_OUTS14",
"CMT_PMV_IMUX3",
"CMT_PMV_IMUX26",
"CMT_PMV_LH3",
"CMT_PMV_IMUX23",
"CMT_PMV_SW4END0",
"CMT_PMV_WW4B2",
"CMT_PMV_LOGIC_OUTS6",
"CMT_PMV_NW2A1",
"CMT_PMV_WW2END1",
"CMT_PMV_LH1",
"CMT_PMV_EL1BEG0",
"CMT_PMV_LOGIC_OUTS21",
"CMT_PMV_FAN2",
"CMT_PMV_IMUX28",
"CMT_PMV_WW2A0",
"CMT_PMV_NW4A0",
"CMT_PMV_WW4END1",
"CMT_PMV_BYP3",
"CMT_PMV_IMUX29",
"CMT_PMV_WL1END1",
"CMT_PMV_SW4END1",
"CMT_PMV_LOGIC_OUTS16",
"CMT_PMV_IMUX35",
"CMT_PMV_LOGIC_OUTS15",
"CMT_PMV_EE2A0",
"CMT_PMV_EE4A3",
"CMT_PMV_LH11"
"CMT_PMV_NW2A2",
"CMT_PMV_IMUX24",
"CMT_PMV_IMUX44",
"CMT_PMV_LOGIC_OUTS5",
"CMT_PMV_BYP5",
"CMT_PMV_LOGIC_OUTS3",
"CMT_PMV_WW4END2",
"CMT_PMV_WL1END3",
"CMT_PMV_EE2BEG3",
"CMT_PMV_IMUX7",
"CMT_PMV_WW2A2",
"CMT_PMV_IMUX9",
"CMT_PMV_SE4BEG0",
"CMT_PMV_EE4BEG1",
"CMT_PMV_IMUX27",
"CMT_PMV_EE4C3",
"CMT_PMV_IMUX36",
"CMT_PMV_IMUX21",
"CMT_PMV_WL1END2",
"CMT_PMV_LOGIC_OUTS18",
"CMT_PMV_WW4A0",
"CMT_PMV_FAN7",
"CMT_PMV_WW4C2",
"CMT_PMV_LH5",
"CMT_PMV_SW4END0",
"CMT_PMV_EE2BEG0",
"CMT_PMV_LOGIC_OUTS2",
"CMT_PMV_IMUX37",
"CMT_PMV_EE2BEG2",
"CMT_PMV_NW4END1",
"CMT_PMV_EE4BEG3",
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90",
"CMT_PMV_BYP4",
"CMT_PMV_BYP2",
"CMT_PMV_MONITOR_N",
"CMT_PMV_NE4C2",
"CMT_PMV_LOGIC_OUTS12",
"CMT_PMV_WW4A3",
"CMT_PMV_IMUX15",
"CMT_PMV_SE4C1",
"CMT_PMV_EL1BEG2",
"CMT_PMV_IMUX33",
"CMT_PMV_LOGIC_OUTS0",
"CMT_PMV_FAN1",
"CMT_PMV_NE4C0",
"CMT_PMV_IMUX14",
"CMT_PMV_IMUX20",
"CMT_PMV_NW4END2",
"CMT_PMV_SW4A1",
"CMT_PMV_IMUX8",
"CMT_PMV_LH2",
"CMT_PMV_IMUX6",
"CMT_PMV_IMUX2",
"CMT_PMV_LOGIC_OUTS1",
"CMT_PMV_ER1BEG0",
"CMT_PMV_SE2A3",
"CMT_PMV_LH7",
"CMT_PMV_LH10",
"CMT_PMV_LOGIC_OUTS20",
"CMT_PMV_EE4B3",
"CMT_PMV_EL1BEG3",
"L_TERM_INT_PHASER_TO_IO_ICLKDIV",
"CMT_PMV_EE4C1",
"CMT_PMV_WR1END2",
"CMT_PMV_IMUX16",
"CMT_PMV_WW4A1",
"CMT_PMV_WW4END3",
"CMT_PMV_ER1BEG3",
"CMT_PMV_SE4BEG2",
"CMT_PMV_CLK0",
"CMT_PMV_NE4BEG0",
"CMT_PMV_LOGIC_OUTS7",
"CMT_PMV_EE4C0",
"CMT_PMV_FAN0",
"CMT_PMV_NE2A1",
"CMT_PMV_WR1END0",
"CMT_PMV_NW2A1",
"CMT_PMV_IMUX34",
"CMT_PMV_CTRL1",
"L_TERM_INT_PHASER_TO_IO_ICLK",
"CMT_PMV_SW4A0",
"CMT_PMV_EE4BEG0",
"CMT_PMV_LH9",
"CMT_PMV_IMUX1",
"CMT_PMV_IMUX40",
"CMT_PMV_WW4C0",
"CMT_PMV_SE4C3",
"CMT_PMV_NE2A2",
"CMT_PMV_EE4A2",
"CMT_PMV_NE4BEG3",
"CMT_PMV_WW2END0",
"CMT_PMV_CTRL0",
"CMT_PMV_LH11",
"CMT_PMV_LH8",
"CMT_PMV_WW4B1",
"CMT_PMV_IMUX31",
"CMT_PMV_WW2END1",
"CMT_PMV_IMUX5",
"CMT_PMV_SW2A3",
"CMT_PMV_IMUX13",
"CMT_PMV_NW4A2",
"CMT_PMV_NW4END0",
"CMT_PMV_IMUX11",
"CMT_PMV_CLK1",
"CMT_PMV_MONITOR_P",
"CMT_PMV_LOGIC_OUTS9",
"CMT_PMV_IMUX19",
"CMT_PMV_EE4BEG2",
"CMT_PMV_LOGIC_OUTS10",
"CMT_PMV_SE2A1",
"CMT_PMV_FAN6",
"CMT_PMV_FAN5",
"CMT_PMV_EE4B2",
"CMT_PMV_EE2A1",
"CMT_PMV_LH12",
"CMT_PMV_IMUX18",
"CMT_PMV_LH4",
"CMT_PMV_NW4END3",
"CMT_PMV_EE2BEG1",
"CMT_PMV_WW2END3",
"CMT_PMV_WW4A2",
"CMT_PMV_BYP1",
"L_TERM_INT_PHASER_TO_IO_OCLK",
"CMT_PMV_EE4C2",
"CMT_PMV_NE4C3",
"CMT_PMV_NW2A0",
"CMT_PMV_NE4BEG1",
"CMT_PMV_SW4END2",
"CMT_PMV_NE4C1",
"CMT_PMV_LH1",
"CMT_PMV_EE4A0",
"CMT_PMV_WL1END0",
"CMT_PMV_ER1BEG1",
"CMT_PMV_WW2A1",
"CMT_PMV_IMUX42",
"CMT_PMV_EL1BEG1",
"CMT_PMV_NE4BEG2",
"CMT_PMV_EE4A1",
"CMT_PMV_SE2A2",
"CMT_PMV_SE4BEG3",
"CMT_PMV_WW4C1",
"CMT_PMV_IMUX43",
"CMT_PMV_LOGIC_OUTS6",
"CMT_PMV_BYP0",
"CMT_PMV_IMUX41",
"CMT_PMV_EE4B1",
"CMT_PMV_WW4B0",
"CMT_PMV_SE2A0",
"CMT_PMV_IMUX39",
"CMT_PMV_LOGIC_OUTS4",
"CMT_PMV_LOGIC_OUTS19",
"CMT_PMV_IMUX25",
"CMT_PMV_NW4A3",
"CMT_PMV_WW2END2",
"CMT_PMV_NE2A0",
"CMT_PMV_SW2A2",
"CMT_PMV_WW4B3",
"CMT_PMV_IMUX12",
"CMT_PMV_LOGIC_OUTS8",
"CMT_PMV_LOGIC_OUTS11",
"CMT_PMV_WW4B2",
"CMT_PMV_EE2A3",
"CMT_PMV_SW2A1",
"CMT_PMV_FAN3",
"CMT_PMV_SE4C2",
"CMT_PMV_IMUX47",
"CMT_PMV_SE4BEG1",
"CMT_PMV_LOGIC_OUTS17"
],
"tile_type": "CMT_PMV_L",
"sites": []
"sites": [],
"pips": {},
"tile_type": "CMT_PMV_L"
}

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artix7/tile_type_CMT_TOP_L_LOWER_B.json
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artix7/tile_type_CMT_TOP_L_LOWER_T.json
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artix7/tile_type_CMT_TOP_L_UPPER_B.json
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