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Updating DB based on "Merge pull request #191 from mithro/master". 

See [Info File](Info.md) for details.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
Tim 'mithro' Ansell 2018-10-25 23:18:26 +00:00
parent c30598857a
commit 6f02e2fa4b
166 changed files with 1006535 additions and 990959 deletions
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349
Info.md
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@ -37,26 +37,27 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING).
# Details
Last updated on Wed Oct 24 23:57:13 UTC 2018 (2018-10-24T23:57:13+00:00).
Last updated on Thu Oct 25 23:18:25 UTC 2018 (2018-10-25T23:18:25+00:00).
Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [v0.0-902-g3247963](https://github.com/SymbiFlow/prjxray/commit/32479630be1a661d1cfd6e5e6f1961e64c263db7).
Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [v0.0-903-ga0cfca8](https://github.com/SymbiFlow/prjxray/commit/a0cfca860872a99ac81b223ee1e5e9ae567b9590).
Latest commit was;
```
commit 32479630be1a661d1cfd6e5e6f1961e64c263db7
Author: Tim 'mithro' Ansell <me@mith.ro>
Date: Wed Oct 24 16:49:20 2018 -0700
commit a0cfca860872a99ac81b223ee1e5e9ae567b9590
Merge: d33fdb7 3247963
Author: Tim Ansell <me@mith.ro>
Date: Wed Oct 24 17:00:19 2018 -0700
minitests/roi_harness: Remove hardcoded values in Makefile.
Merge pull request #191 from mithro/master
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
minitests/roi_harness: Add XRAY_PIN values valid for Arty.
```
## Database for [artix7](artix7/)
### Settings
Created using following [settings.sh (sha256: cb777c1e854d877556482ff2067eff348386ce627caa0ef5617a6e5dea01dc6a)](https://github.com/SymbiFlow/prjxray/blob/32479630be1a661d1cfd6e5e6f1961e64c263db7/database/artix7/settings.sh)
Created using following [settings.sh (sha256: cb777c1e854d877556482ff2067eff348386ce627caa0ef5617a6e5dea01dc6a)](https://github.com/SymbiFlow/prjxray/blob/a0cfca860872a99ac81b223ee1e5e9ae567b9590/database/artix7/settings.sh)
```shell
export XRAY_DATABASE="artix7"
export XRAY_PART="xc7a50tfgg484-1"
@ -101,13 +102,13 @@ Results have checksums;
* [`cd4000b96378f736d31686b381ebd4349898b3b8bd09606223c7ca48cb1a5aba ./artix7/harness/basys3/swbut/design.txt`](./artix7/harness/basys3/swbut/design.txt)
* [`4c0a815ab8943181331f7aa9ac77655a0a640d9a409a602e4f24f8feb5f905e9 ./artix7/harness/README.md`](./artix7/harness/README.md)
* [`69f298082e6c8e537d8348b9d4c01f582d0d86fdeddf1e6606b90e800994bcdd ./artix7/mask_bram_l.db`](./artix7/mask_bram_l.db)
* [`8fae8a634efb8929db28581b2acd436fd4c31a0bd241dd4643e5692e2da8e648 ./artix7/mask_bram_r.db`](./artix7/mask_bram_r.db)
* [`169a5dc2a069653f17dad854fff1895e3981bcd703109304f719d7f1b3a02ab1 ./artix7/mask_bram_r.db`](./artix7/mask_bram_r.db)
* [`5c274320294201935a3edccb43eca8e347ca1f0acded71ec388c794877d4b55b ./artix7/mask_clbll_l.db`](./artix7/mask_clbll_l.db)
* [`5c274320294201935a3edccb43eca8e347ca1f0acded71ec388c794877d4b55b ./artix7/mask_clbll_r.db`](./artix7/mask_clbll_r.db)
* [`5c274320294201935a3edccb43eca8e347ca1f0acded71ec388c794877d4b55b ./artix7/mask_clblm_l.db`](./artix7/mask_clblm_l.db)
* [`5c274320294201935a3edccb43eca8e347ca1f0acded71ec388c794877d4b55b ./artix7/mask_clblm_r.db`](./artix7/mask_clblm_r.db)
* [`69f298082e6c8e537d8348b9d4c01f582d0d86fdeddf1e6606b90e800994bcdd ./artix7/mask_dsp_l.db`](./artix7/mask_dsp_l.db)
* [`8fae8a634efb8929db28581b2acd436fd4c31a0bd241dd4643e5692e2da8e648 ./artix7/mask_dsp_r.db`](./artix7/mask_dsp_r.db)
* [`169a5dc2a069653f17dad854fff1895e3981bcd703109304f719d7f1b3a02ab1 ./artix7/mask_dsp_r.db`](./artix7/mask_dsp_r.db)
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./artix7/mask_hclk_l.db`](./artix7/mask_hclk_l.db)
* [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
* [`6baea72435613b87334f95cfe2b1ab36da4d57ada20b71a7dd870715b3e430c4 ./artix7/ppips_clbll_l.db`](./artix7/ppips_clbll_l.db)
@ -118,173 +119,173 @@ Results have checksums;
* [`81e0696179a33bdf8d2279a53b406911a403d50224355e9ad29eccee01a70305 ./artix7/ppips_hclk_r.db`](./artix7/ppips_hclk_r.db)
* [`be617c15d1ec311b6249791414bbd69380fe90b476353cbb2fc2a7cb06f5029d ./artix7/ppips_int_l.db`](./artix7/ppips_int_l.db)
* [`a1423859c97a82dcfb114644f50b991db4ca7e0996e6d1ae4d2c97bfdfcb723d ./artix7/ppips_int_r.db`](./artix7/ppips_int_r.db)
* [`ce8aa28ad2ae2834d6182d6044cd0eae62da84551c486c1b04e3400116718f67 ./artix7/segbits_clbll_l.db`](./artix7/segbits_clbll_l.db)
* [`087a5f7c98aa864b1a1232660806ecbd2f4fc1a963f387821ddab47d9c358d2c ./artix7/segbits_clbll_r.db`](./artix7/segbits_clbll_r.db)
* [`e2b4f7eda0ee7cc02db131660a9677e3264ab2ec2d1bdc833fa9218fbe62f97f ./artix7/segbits_clblm_l.db`](./artix7/segbits_clblm_l.db)
* [`d67044a5aeac20f746130c86c3a104fb7173f012325aeb181c19c9adaba3dbae ./artix7/segbits_clblm_r.db`](./artix7/segbits_clblm_r.db)
* [`3b359f4fa09bb224b88ce7c3060b890a611bf1d68319b3dabeed5157d3f42bb8 ./artix7/segbits_clbll_l.db`](./artix7/segbits_clbll_l.db)
* [`d21b75b8912c30de5e1ab0256bdb7dbb0590d205c36fcfca11ce522d84854eef ./artix7/segbits_clbll_r.db`](./artix7/segbits_clbll_r.db)
* [`816ae2c85b352788bcccf62bdfff1935a9d4871eb975196b0cc2d07f25ef0068 ./artix7/segbits_clblm_l.db`](./artix7/segbits_clblm_l.db)
* [`4108286bcffee65beea5574e8f068a74c0321bab27349eb312376ed71cfc3010 ./artix7/segbits_clblm_r.db`](./artix7/segbits_clblm_r.db)
* [`20f7bf469951b04a56e5e140b6327470750b08960643353384b35baf85eb9117 ./artix7/segbits_hclk_l.db`](./artix7/segbits_hclk_l.db)
* [`5e22f758a04eab3185b2453c9994aa2fa48f50ca8a6b49bf82e8fc4351f23a5c ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
* [`08dee581e565abbd09db559f9226139ba5a253f8aec4f3492152d8df8a87bbab ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
* [`be5f0c64ee17ad010dfea5125200216b2c69a558477a80133d043ed466e565be ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
* [`13bc58bf4a42029adf4f9b06ffd7c9436e2294bf4fdc16cdaa70505c28a2a7b7 ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
* [`cb777c1e854d877556482ff2067eff348386ce627caa0ef5617a6e5dea01dc6a ./artix7/settings.sh`](./artix7/settings.sh)
* [`719d5ba5500fd77e2f07a161c67c6988999abdd7006db0187c8cbdcb04af44b8 ./artix7/site_type_BSCAN.json`](./artix7/site_type_BSCAN.json)
* [`bb7ad365e043f69cbfcb943afb4943ccf732ea876ac8b07c926cb28007e65bbb ./artix7/site_type_BUFGCTRL.json`](./artix7/site_type_BUFGCTRL.json)
* [`a48f00785f54cbe2ca3ea567ceb02bf25d9d13fc868537ea8c720faf4331ad39 ./artix7/site_type_BUFHCE.json`](./artix7/site_type_BUFHCE.json)
* [`6cb08677bcd99755d90f2df53630c3dc9c0b5d63c10c85aeef88a47ace492a93 ./artix7/site_type_BUFIO.json`](./artix7/site_type_BUFIO.json)
* [`5688ee246f3f3e736e0c0b2d96e3338e72119f1584e4447d4a8fbfe19ad0290e ./artix7/site_type_BUFMRCE.json`](./artix7/site_type_BUFMRCE.json)
* [`dfdf5a8dba3a9e03a7c74baf3bf6cdedeb3b6284d1c602b51a8076c551f940c6 ./artix7/site_type_BUFR.json`](./artix7/site_type_BUFR.json)
* [`a7b5800d4648666eaf72226199f1f7d4f93b2e69aa8d46e60883ea4b617f6d9e ./artix7/site_type_CAPTURE.json`](./artix7/site_type_CAPTURE.json)
* [`c78abb27787d2e81a93a5b264187a250f5ec035f004c09fa03858ed322f27886 ./artix7/site_type_DCIRESET.json`](./artix7/site_type_DCIRESET.json)
* [`57a442cefa8bc14d804ba6694ca7a81e1b601f4acd30d9c0e90d5b4a9db9087a ./artix7/site_type_DNA_PORT.json`](./artix7/site_type_DNA_PORT.json)
* [`01bf735ad5e616c1e177edeb549f69b6f47e869af8d58ac5acf17ca715ea0475 ./artix7/site_type_DSP48E1.json`](./artix7/site_type_DSP48E1.json)
* [`6eab82a31e033f73042853568f7d2b2c58574d1246393f6171a91796d00cb009 ./artix7/site_type_EFUSE_USR.json`](./artix7/site_type_EFUSE_USR.json)
* [`942b9bda74fc803bbc3c2c4ca1f468018e14f323dd2222c8bcf9506c5b5d15e5 ./artix7/site_type_FIFO18E1.json`](./artix7/site_type_FIFO18E1.json)
* [`e62595ccfb6649d74705597ed3dd6772a44f65c13f2ecc1fb4839c35f4b80662 ./artix7/site_type_FRAME_ECC.json`](./artix7/site_type_FRAME_ECC.json)
* [`fc9aa800af2b598c9da95a1d0a7cd1aa368978954c67ada00d153dac2dba0870 ./artix7/site_type_GTPE2_CHANNEL.json`](./artix7/site_type_GTPE2_CHANNEL.json)
* [`d0fe43e07827ac8662a939d79f23a975dffef400dc3a7308580c02352379e111 ./artix7/site_type_GTPE2_COMMON.json`](./artix7/site_type_GTPE2_COMMON.json)
* [`23f8ebf5ab129a2d4a8dd2f2246e2ca963b969aa95a3d8cc3b2cbc581cdce035 ./artix7/site_type_IBUFDS_GTE2.json`](./artix7/site_type_IBUFDS_GTE2.json)
* [`062968a37351ac566c60232cd5f618c145f76f2dca8fe16ba37dd05650ca9ec1 ./artix7/site_type_ICAP.json`](./artix7/site_type_ICAP.json)
* [`f1c204574ca89912b1f2919aa7eda4fbedafacc44814612a3efcded392c194e2 ./artix7/site_type_IDELAYCTRL.json`](./artix7/site_type_IDELAYCTRL.json)
* [`3e5a5a083444d1f0722a80ce21bb43e16606c3007aab7f441044c4aa1f1226a3 ./artix7/site_type_IDELAYE2.json`](./artix7/site_type_IDELAYE2.json)
* [`c2886064c75316bff38b1aa03b60f24b1a646f96f918a2b9fbd2c1d904094f37 ./artix7/site_type_ILOGICE3.json`](./artix7/site_type_ILOGICE3.json)
* [`e20dd0d79a5544f65c0064ab03c7647a6e187bfb94341f57e444593e9eafbc73 ./artix7/site_type_IN_FIFO.json`](./artix7/site_type_IN_FIFO.json)
* [`449635c5afeb495eb1c0f80db8793d2414e06d84086e26cd545a707e74ea3575 ./artix7/site_type_IOB33.json`](./artix7/site_type_IOB33.json)
* [`1368e7129596d2d28b513271c2b4c234a02135d98d0f7cdcc2d8b051561f1893 ./artix7/site_type_IOB33M.json`](./artix7/site_type_IOB33M.json)
* [`62391d653ecf1901c6e1d5d287e7de3b10b83fd01ae087bacf6b66cf7454beb2 ./artix7/site_type_IOB33S.json`](./artix7/site_type_IOB33S.json)
* [`2272f38176d4642a903727400d07f05b2e2f2789a446746d8cba0ce3efe46f74 ./artix7/site_type_IPAD.json`](./artix7/site_type_IPAD.json)
* [`bd89171e213d5a48cb0b0b259f4d87c93e61f37ef91bb8cbcd36e1edba957c0f ./artix7/site_type_MMCME2_ADV.json`](./artix7/site_type_MMCME2_ADV.json)
* [`c46ad6bdb62ad4de869f99521322f8a770592752ed17930eb1cbfdfc65cf3b69 ./artix7/site_type_OLOGICE3.json`](./artix7/site_type_OLOGICE3.json)
* [`b12f99c0eb9701d8995d421676c1699492ef88a155245a779be9569649c6617b ./artix7/site_type_OPAD.json`](./artix7/site_type_OPAD.json)
* [`97535aee9434b6b11a4f3d61ff3c0600206db0fc03ac8d75a9558f19c4fc8f5e ./artix7/site_type_OUT_FIFO.json`](./artix7/site_type_OUT_FIFO.json)
* [`b5f1988c0f167df0a2fdde664ed9a4fd8b6628c06e0e7fab9a1f5050eb4a466e ./artix7/site_type_PCIE_2_1.json`](./artix7/site_type_PCIE_2_1.json)
* [`47cec6b60c551a15721c6da588c14f3484be755d588f90d296ea7a11d04d46ba ./artix7/site_type_PHASER_IN_PHY.json`](./artix7/site_type_PHASER_IN_PHY.json)
* [`bb157302ba77dabd09614c88b959c9541150a0914b30c7a9c57f69d6c35d107b ./artix7/site_type_PHASER_OUT_PHY.json`](./artix7/site_type_PHASER_OUT_PHY.json)
* [`3b3b43e156ec1c4dc3c194eac174b87c2928a3ab28b3042cac446049610560b5 ./artix7/site_type_PHASER_REF.json`](./artix7/site_type_PHASER_REF.json)
* [`e2c65ca031e4f50f1cc72ab519daeb8c0564efa6fee6a0c92969a7c945357358 ./artix7/site_type_PHY_CONTROL.json`](./artix7/site_type_PHY_CONTROL.json)
* [`b1cfea0c3fc9a36a1ef6b3664af04d254aeb0a085ca2ae9ae8b84c104724ff27 ./artix7/site_type_PLLE2_ADV.json`](./artix7/site_type_PLLE2_ADV.json)
* [`7641e6cbe65165dd0f67ce0ab1650a737683d37dde8c9aa798d665c99fc3d8c2 ./artix7/site_type_PMV2.json`](./artix7/site_type_PMV2.json)
* [`3f8e9ada0f370ff1b40de2868064f7276fe73727fcfd6b725658ffbd57dcb8bf ./artix7/site_type_RAMB18E1.json`](./artix7/site_type_RAMB18E1.json)
* [`3aeb5f2a82ab0ed60295da343d05a4ca02f8d1774940b68659c495ec2de5daac ./artix7/site_type_RAMBFIFO36E1.json`](./artix7/site_type_RAMBFIFO36E1.json)
* [`1359e0ef3a2891cd173d9e8fd4306f445048484b4fb84acd83bd73b6be6a35d3 ./artix7/site_type_SLICEL.json`](./artix7/site_type_SLICEL.json)
* [`93437b1d74625a1e627b5b9c20c1598e67fe4d265b218b8e8db6fdeac7f5345e ./artix7/site_type_SLICEM.json`](./artix7/site_type_SLICEM.json)
* [`69d0f7f4b92699b729766dcde4f2467c9d5d1f91093de2119729b295b91637d6 ./artix7/site_type_STARTUP.json`](./artix7/site_type_STARTUP.json)
* [`1503bd8cd2bec47dd55ffad89ddc82e804dfd2c61e65c8770bc368ad7be9c8fa ./artix7/site_type_TIEOFF.json`](./artix7/site_type_TIEOFF.json)
* [`ac84a3db9159a0419d620dc2abb89e7f96de654239927a7400f9ed1fc41b977b ./artix7/site_type_USR_ACCESS.json`](./artix7/site_type_USR_ACCESS.json)
* [`78f4f1888dd814586b25e1008f59e0c0f094edeec8716e3acf962bc8ff13c9c1 ./artix7/site_type_XADC.json`](./artix7/site_type_XADC.json)
* [`55bf341c1e05591dc68c29d5a4a3887ce7d7d83b1413d056ae31cbed5b2ceacf ./artix7/tileconn.json`](./artix7/tileconn.json)
* [`252a413af7d6bcc43aa55374acd45fbc5f15d1149a95b90494660d5581a88883 ./artix7/tilegrid.json`](./artix7/tilegrid.json)
* [`fbf9a61be612301cff451f2838fda1331bd271f86e4ad7a46635443f0a864464 ./artix7/tile_type_BRAM_INT_INTERFACE_L.json`](./artix7/tile_type_BRAM_INT_INTERFACE_L.json)
* [`9ecd392e781177913a73cc1fa7e45ceb5a9773948fe5d9f11835683dbb7b13ca ./artix7/tile_type_BRAM_INT_INTERFACE_R.json`](./artix7/tile_type_BRAM_INT_INTERFACE_R.json)
* [`c1d01ef9bfb2533b487b73bbbe0906990fea5640c7dadba04293c0b0074ff91b ./artix7/tile_type_BRAM_L.json`](./artix7/tile_type_BRAM_L.json)
* [`457e498e91bb77772a54d5a8afc666fcbd9a6e7a9acb32a3d5115c830afec5d7 ./artix7/tile_type_BRAM_R.json`](./artix7/tile_type_BRAM_R.json)
* [`a13fddea8cd377ee4b783bead9ff50cac0e5801531c76607eb2ec66ecd6a67bb ./artix7/tile_type_BRKH_BRAM.json`](./artix7/tile_type_BRKH_BRAM.json)
* [`45c79e6fb0b495cff13416f6432904cdd01f470e751cfb4df1ef0ab6c2211e96 ./artix7/tile_type_BRKH_B_TERM_INT.json`](./artix7/tile_type_BRKH_B_TERM_INT.json)
* [`56ec8fba5a5b60edfe4856ff0de807eff3133e47b04fba38598b8689512a14bc ./artix7/tile_type_BRKH_CLB.json`](./artix7/tile_type_BRKH_CLB.json)
* [`23bfbe9b4c732c6d51898cd73e8b4973fe283e6a34596663be7f1eafb17cd55d ./artix7/tile_type_BRKH_CLK.json`](./artix7/tile_type_BRKH_CLK.json)
* [`c392b0992733376bca89170108f25bc519cd06b1c2a7728a587851ec10a31b9c ./artix7/tile_type_BRKH_CMT.json`](./artix7/tile_type_BRKH_CMT.json)
* [`053b695a0caa573d233e594e05b8de80eb9811b1b9449aa7727d29d985003217 ./artix7/tile_type_BRKH_DSP_L.json`](./artix7/tile_type_BRKH_DSP_L.json)
* [`086e76a9b644fde9f16830a0cc8c2e69b0e5ceacc3bff301e296cab6e46def5d ./artix7/tile_type_BRKH_DSP_R.json`](./artix7/tile_type_BRKH_DSP_R.json)
* [`cd3292cd07e35176dbefb646091d16baaaec74c736bc1adb843a0190f51d24af ./artix7/tile_type_BRKH_GTX.json`](./artix7/tile_type_BRKH_GTX.json)
* [`783d3d6baa2d053c918135919f638b5ff32e2b6e6c8a08efaea319456b8f0a7e ./artix7/tile_type_BRKH_INT.json`](./artix7/tile_type_BRKH_INT.json)
* [`8da1c4f26f810b32ad36183bfaf4d297c0bba54654dbdf0598d1dbb567689738 ./artix7/tile_type_BRKH_TERM_INT.json`](./artix7/tile_type_BRKH_TERM_INT.json)
* [`bba1dbca008dd4848a28786bf4615f3c1c808bf6cf954b1d9361e071cfb79927 ./artix7/tile_type_B_TERM_INT.json`](./artix7/tile_type_B_TERM_INT.json)
* [`0a3cddc74a5e6ab37cf4a7c1deaf523b70d31fe321575f3f41eb1178cb72b69b ./artix7/tile_type_CFG_CENTER_BOT.json`](./artix7/tile_type_CFG_CENTER_BOT.json)
* [`701d86922f2e283b19d3aec708dfc2d2943b765f910e106388d6ec5ea2ae4d80 ./artix7/tile_type_CFG_CENTER_MID.json`](./artix7/tile_type_CFG_CENTER_MID.json)
* [`500c4949209a249f8998c1ca28c51f55995b5d8bbba6875806368e3b4dc68e83 ./artix7/tile_type_CFG_CENTER_TOP.json`](./artix7/tile_type_CFG_CENTER_TOP.json)
* [`af4b4675ea714d3b7518297d2a4075dc8fdfb3fcc651b12b4f742b2cd6f46445 ./artix7/tile_type_CLBLL_L.json`](./artix7/tile_type_CLBLL_L.json)
* [`3dc18dec76cf080a3ab430eeeb966308565025f8144f9032e312fa51a8947020 ./artix7/tile_type_CLBLL_R.json`](./artix7/tile_type_CLBLL_R.json)
* [`73426d37d590fadbdb25d65eecfaf5ac9940f9722d115a22cfb87282fd6eddf8 ./artix7/tile_type_CLBLM_L.json`](./artix7/tile_type_CLBLM_L.json)
* [`2c033c3a5bece3055e38144c3897c8a55a83a1a344ec432aa77e6f751c9e75b1 ./artix7/tile_type_CLBLM_R.json`](./artix7/tile_type_CLBLM_R.json)
* [`587d08841fdde19107be139169b561d120974f9092f741b37eabe5ddea15b641 ./artix7/tile_type_CLK_BUFG_BOT_R.json`](./artix7/tile_type_CLK_BUFG_BOT_R.json)
* [`de8913143bf5b996e57d02d75710b7372a761d4f900036a75b03496797cee9e4 ./artix7/tile_type_CLK_BUFG_REBUF.json`](./artix7/tile_type_CLK_BUFG_REBUF.json)
* [`6c6693b97f6d461b9815e05fc7a20b0b00fb3c19301711be04226496057a204b ./artix7/tile_type_CLK_BUFG_TOP_R.json`](./artix7/tile_type_CLK_BUFG_TOP_R.json)
* [`c9532a45b785d3533e2033969e029f13062ecc42b805c0d2b23ee218ceab45eb ./artix7/tile_type_CLK_FEED.json`](./artix7/tile_type_CLK_FEED.json)
* [`1c632ab0754f6227a8dbafd07a0e02bda0911cabd245dce22b78ff4e02645d36 ./artix7/tile_type_CLK_HROW_BOT_R.json`](./artix7/tile_type_CLK_HROW_BOT_R.json)
* [`be9d7e276eae46e1610b0dc43e15c94d2f62eb6621841de19193322faf7f965d ./artix7/tile_type_CLK_HROW_TOP_R.json`](./artix7/tile_type_CLK_HROW_TOP_R.json)
* [`70c631e800c0cc9805008ce98ef6cf24f39adc6a52609f3cf60a6779b0e6cedf ./artix7/tile_type_CLK_MTBF2.json`](./artix7/tile_type_CLK_MTBF2.json)
* [`43951c358c372eec561ab8c85bc32a2fb587b12aae11df3ff267b63f35737e9a ./artix7/tile_type_CLK_PMV2.json`](./artix7/tile_type_CLK_PMV2.json)
* [`9e20005e5e7f408baf72be5dc81afb67a955025a7dcf326e0cdb55c7998c5c0b ./artix7/tile_type_CLK_PMV2_SVT.json`](./artix7/tile_type_CLK_PMV2_SVT.json)
* [`906947ad12479e10b27b425aec2436dea8805ea450c51b1078292db31b864408 ./artix7/tile_type_CLK_PMVIOB.json`](./artix7/tile_type_CLK_PMVIOB.json)
* [`20375dee2190e4fd7c14649ed1b8d3530f77707b55384f91f2653765591927ef ./artix7/tile_type_CLK_PMV.json`](./artix7/tile_type_CLK_PMV.json)
* [`73efe99e80904057c04de32e440cb43ded9c650c7df7bd60d5c0a0a33763a8e8 ./artix7/tile_type_CLK_TERM.json`](./artix7/tile_type_CLK_TERM.json)
* [`506844d8f2ba25985a75da70b91923e8291185b378db5e519ce3b6f9796888b6 ./artix7/tile_type_CMT_FIFO_L.json`](./artix7/tile_type_CMT_FIFO_L.json)
* [`372e0e8c12570745bb871ba1a3af507e5a2ec7221a2737d6bf25ff81b42062a5 ./artix7/tile_type_CMT_FIFO_R.json`](./artix7/tile_type_CMT_FIFO_R.json)
* [`a8c3d0926852c2d75ed88ac4da930b1deb1a388f7bbe7c7c2d32b2ca8cf85d27 ./artix7/tile_type_CMT_PMV.json`](./artix7/tile_type_CMT_PMV.json)
* [`11804b256e364ae6fe0c2df27b84b266f50287516d47824f5dc8a43a8dc93f7c ./artix7/tile_type_CMT_PMV_L.json`](./artix7/tile_type_CMT_PMV_L.json)
* [`c8115d9218adc87294f5adc8215a3364ec85e24b391b4bf75d0045b85568226d ./artix7/tile_type_CMT_TOP_L_LOWER_B.json`](./artix7/tile_type_CMT_TOP_L_LOWER_B.json)
* [`25fe320f8407a75982acc46a025676f27a6be2efaa34e5770adb52a9241ed95f ./artix7/tile_type_CMT_TOP_L_LOWER_T.json`](./artix7/tile_type_CMT_TOP_L_LOWER_T.json)
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* [`84c14df1c55d309511cedd7fcd613a282cd303fc02094b9dcae4c57c0c9954ab ./artix7/tile_type_CMT_TOP_R_LOWER_B.json`](./artix7/tile_type_CMT_TOP_R_LOWER_B.json)
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* [`801471c567005d6a9bcf9d3ff721e25971059f0436339d89e470c659b2d7b16f ./artix7/tile_type_CMT_TOP_R_UPPER_B.json`](./artix7/tile_type_CMT_TOP_R_UPPER_B.json)
* [`753feebf0d24ba3b1e758035842cbb1a064b4de3e16e8cb95df829031beee92f ./artix7/tile_type_CMT_TOP_R_UPPER_T.json`](./artix7/tile_type_CMT_TOP_R_UPPER_T.json)
* [`f2d9f69bd40843d8344bc13d5aefd5ddbb76dc71627711b821e57e8fa43bbcbb ./artix7/tile_type_DSP_L.json`](./artix7/tile_type_DSP_L.json)
* [`542e02a3773906f1094c2a6bc4aa2ac4a722abf29952ecd2d32d56960c09146c ./artix7/tile_type_DSP_R.json`](./artix7/tile_type_DSP_R.json)
* [`a62a62d9154122081360f5dd3d0663ff6117e76983ed15fe7907f549cbe3478e ./artix7/tile_type_GTP_CHANNEL_0.json`](./artix7/tile_type_GTP_CHANNEL_0.json)
* [`58ef6c05c0a1bb99cced08583946c485273bb68bf4af5f3c3d7f0644e573ec79 ./artix7/tile_type_GTP_CHANNEL_1.json`](./artix7/tile_type_GTP_CHANNEL_1.json)
* [`6c5f62d5baf00bab7c75b0ffe6d95329a67c9b9b3385bb5e26fa213a190153be ./artix7/tile_type_GTP_CHANNEL_2.json`](./artix7/tile_type_GTP_CHANNEL_2.json)
* [`9fee55da6f1f89e69f10caa41a536727f1be944dd44e8f5c544a35666f20efe6 ./artix7/tile_type_GTP_CHANNEL_3.json`](./artix7/tile_type_GTP_CHANNEL_3.json)
* [`b9cffc2e886d5dee8f23e48c9c983f7d9935f34df8dd3d2a18a32b592554c2e6 ./artix7/tile_type_GTP_COMMON.json`](./artix7/tile_type_GTP_COMMON.json)
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* [`85c6b7ac250bbeb1fe16926c0b9fe3ebde3abc150c95c68e07dcb0edb54b967f ./artix7/tile_type_HCLK_DSP_R.json`](./artix7/tile_type_HCLK_DSP_R.json)
* [`3e31fcf205a9c67f5a24be910469e8b8760514278d13750dc999fe32c77edfad ./artix7/tile_type_HCLK_FEEDTHRU_1.json`](./artix7/tile_type_HCLK_FEEDTHRU_1.json)
* [`5d07288892cd1a21f8523e3c685ca2ac0247bf8271805b002a2787636049254c ./artix7/tile_type_HCLK_FEEDTHRU_2.json`](./artix7/tile_type_HCLK_FEEDTHRU_2.json)
* [`7df47db37e12f3784ab35c17380d080d274deca72e9d34fe6df62b759d42dcd2 ./artix7/tile_type_HCLK_FIFO_L.json`](./artix7/tile_type_HCLK_FIFO_L.json)
* [`fa3811fac61d8faa25a02abf59c1f503742564810bd017881dd7d5761e518b96 ./artix7/tile_type_HCLK_GTX.json`](./artix7/tile_type_HCLK_GTX.json)
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* [`af19906dbd78dd5c685994cfec1858eccbc324063fd8f4a60c208deecb615419 ./artix7/tile_type_VBRK_EXT.json`](./artix7/tile_type_VBRK_EXT.json)
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* [`b24c32758a7c21185e2b9689b4ac65f8f00e43e8ec46aac79a8233b3d3fd36c6 ./artix7/tile_type_VFRAME.json`](./artix7/tile_type_VFRAME.json)
* [`3f6ab41214df9776a9cd8ea63cca60adab925abf08a3204549fa956ef87270de ./artix7/site_type_BSCAN.json`](./artix7/site_type_BSCAN.json)
* [`b1e326e9c93fa1d239423b681aa22a1f999994280a6ef94626eafeb855d93571 ./artix7/site_type_BUFGCTRL.json`](./artix7/site_type_BUFGCTRL.json)
* [`04a2cffb41ec815914fc361cb527df69cb36e4db74f25de6792c59f6ce97f6d3 ./artix7/site_type_BUFHCE.json`](./artix7/site_type_BUFHCE.json)
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* [`a696906513f868f89c4429f00e6c0451336544ad23b9033df6d3f75370b87183 ./artix7/tile_type_HCLK_DSP_L.json`](./artix7/tile_type_HCLK_DSP_L.json)
* [`c2bb2ba94a8d789c22856014cb5257b9bd7f1c93b9d9c4bf2865188d5a5891b1 ./artix7/tile_type_HCLK_DSP_R.json`](./artix7/tile_type_HCLK_DSP_R.json)
* [`836677a427eb6530e5808d8bdf26b03b7a27ac786615a8c2ca6f84941dff3d74 ./artix7/tile_type_HCLK_FEEDTHRU_1.json`](./artix7/tile_type_HCLK_FEEDTHRU_1.json)
* [`7c9c6a027ebd89f54b57ba9a135d9eb1843a80a1e707ef37c64d3fead885c17e ./artix7/tile_type_HCLK_FEEDTHRU_2.json`](./artix7/tile_type_HCLK_FEEDTHRU_2.json)
* [`881869baa9874c48fa3d11b78cd8fac446202a3bff4ebf30c9413640ba26ac39 ./artix7/tile_type_HCLK_FIFO_L.json`](./artix7/tile_type_HCLK_FIFO_L.json)
* [`6954fd8e515e8beed9ce26f65abf3269b119fdb86b7247a0082c1618fc0d5e4d ./artix7/tile_type_HCLK_GTX.json`](./artix7/tile_type_HCLK_GTX.json)
* [`d3e5b322b3847e5ca61436500fbffec6f9eee2ba813e3b4e997ebb501318ab38 ./artix7/tile_type_HCLK_INT_INTERFACE.json`](./artix7/tile_type_HCLK_INT_INTERFACE.json)
* [`6b4850191cb040d640a4e99e4727c47b305cc9bee828143c0ddf02fc73ade8f8 ./artix7/tile_type_HCLK_IOB.json`](./artix7/tile_type_HCLK_IOB.json)
* [`02b7b54a7ec81534bef46ab8c57c7eb232ddde7b7434f14705857ba4dfef6cab ./artix7/tile_type_HCLK_IOI3.json`](./artix7/tile_type_HCLK_IOI3.json)
* [`86d4dc44b7ada38f320144986f77dadd48ab1441868f982e75f9f6b8f8f6e694 ./artix7/tile_type_HCLK_L_BOT_UTURN.json`](./artix7/tile_type_HCLK_L_BOT_UTURN.json)
* [`226a6787452e47288a68f7458e367ec0a39ed7925b6404ac789b32dc2fe006ed ./artix7/tile_type_HCLK_L.json`](./artix7/tile_type_HCLK_L.json)
* [`e4f0a9a1594a425ff5a99f84a2f34515b61ba1323a815b08dd57bd947eb7b545 ./artix7/tile_type_HCLK_R_BOT_UTURN.json`](./artix7/tile_type_HCLK_R_BOT_UTURN.json)
* [`d87c6ac4b94c69d5bab4c12996d95d4389ab0a2a615e7397e1dd96c75c7a40d4 ./artix7/tile_type_HCLK_R.json`](./artix7/tile_type_HCLK_R.json)
* [`33ea81f2555030771b7bd44c6619ca0e5583433da0e01ee0e2930e5a1f33d60e ./artix7/tile_type_HCLK_TERM_GTX.json`](./artix7/tile_type_HCLK_TERM_GTX.json)
* [`81875ea3bce1aa1cdb2cc73b48d39911807bc2948b81a062f7d587c8dc43e13b ./artix7/tile_type_HCLK_TERM.json`](./artix7/tile_type_HCLK_TERM.json)
* [`30cc3e3002a88010d7031cf128a37149c9ba05fb862ed4f2761543f7c0e76117 ./artix7/tile_type_HCLK_VBRK.json`](./artix7/tile_type_HCLK_VBRK.json)
* [`4ff9d85171843ed8854c4991e5f425b4f83d6125fad1d523547ff49e1327c093 ./artix7/tile_type_HCLK_VFRAME.json`](./artix7/tile_type_HCLK_VFRAME.json)
* [`5fb8b135a485853e88853d5d88044eaa8a2cbcdd4cd8c2192276e4dbbc79c2dc ./artix7/tile_type_INT_FEEDTHRU_1.json`](./artix7/tile_type_INT_FEEDTHRU_1.json)
* [`69046907543c5d2821690b8217a2f6c4d94ada5cbbc446c1c3f3121bb8bf5a63 ./artix7/tile_type_INT_FEEDTHRU_2.json`](./artix7/tile_type_INT_FEEDTHRU_2.json)
* [`e2a128688fa2cb0dcf0d9a2865d1be99e709ca79f032c5012ef0d0a456f8672e ./artix7/tile_type_INT_INTERFACE_L.json`](./artix7/tile_type_INT_INTERFACE_L.json)
* [`14354fb555d1a48ba80df13a75fc3a6d10bbcaf164ee4bba4ad168d5b0b30a66 ./artix7/tile_type_INT_INTERFACE_R.json`](./artix7/tile_type_INT_INTERFACE_R.json)
* [`ddc6f7153fc2c363a568f744fbf934971f978a02bc16d797d8e364cfd75526ca ./artix7/tile_type_INT_L.json`](./artix7/tile_type_INT_L.json)
* [`92f8d11bfac53f072a60176dd88db65eafc72836b94ef32fbbdf62566dbc58d1 ./artix7/tile_type_INT_R.json`](./artix7/tile_type_INT_R.json)
* [`77b19fbc668f84f06bf5eb97fd57c5384736e2bd421066a5f1153f3c4a0c5218 ./artix7/tile_type_IO_INT_INTERFACE_L.json`](./artix7/tile_type_IO_INT_INTERFACE_L.json)
* [`db8165acebe5ab2f999947e47671aa2ecc2c4c55fca01477e972feedf8743a95 ./artix7/tile_type_IO_INT_INTERFACE_R.json`](./artix7/tile_type_IO_INT_INTERFACE_R.json)
* [`a74a5d13a115b33869f44a586df07fdbbe220cf7b4b5127631465908dd2b0704 ./artix7/tile_type_LIOB33.json`](./artix7/tile_type_LIOB33.json)
* [`0aa3ef5d5cfa96f983d34caa2622d717b5246d6527b8d99bc1e696085d2489e5 ./artix7/tile_type_LIOB33_SING.json`](./artix7/tile_type_LIOB33_SING.json)
* [`298c949bf1d572fb1d887107e938a53f57d8d9df2c3cec6f5e83120379ccee37 ./artix7/tile_type_LIOI3.json`](./artix7/tile_type_LIOI3.json)
* [`57f8b4bd7596ba9205151f1590bb31951224f5725a2064d8157b5e90014aef2d ./artix7/tile_type_LIOI3_SING.json`](./artix7/tile_type_LIOI3_SING.json)
* [`b39aed9f4ee86472202ee8e986e378e6a517d9985927c3dbf1efdf6138887f6b ./artix7/tile_type_LIOI3_TBYTESRC.json`](./artix7/tile_type_LIOI3_TBYTESRC.json)
* [`6dfa1fd318de1a04abc2601c53ce5a8d62f518c7116475eb9057bc121860d70a ./artix7/tile_type_LIOI3_TBYTETERM.json`](./artix7/tile_type_LIOI3_TBYTETERM.json)
* [`0d9afa21f52f65fb0d541dba5a530e8ccbec906c5b58683648896f3092a52310 ./artix7/tile_type_L_TERM_INT.json`](./artix7/tile_type_L_TERM_INT.json)
* [`7f1088bfbf484521a6316c918b75c9e84dd32e7846e6a32499d3fb6c842732f1 ./artix7/tile_type_MONITOR_BOT.json`](./artix7/tile_type_MONITOR_BOT.json)
* [`333f69423f69afee987546623ab07298f166fb958fccafd51cf57a22eea04cdd ./artix7/tile_type_MONITOR_MID.json`](./artix7/tile_type_MONITOR_MID.json)
* [`c86dc3f82a8c0d2dd19c41c993f2ee3ebe18c19a7ae63c0cab2bfc8f4fd48f66 ./artix7/tile_type_MONITOR_TOP.json`](./artix7/tile_type_MONITOR_TOP.json)
* [`6b16e9202757be322b72cdcd73f45a1e61252444ef4ee6557272fc8361d87557 ./artix7/tile_type_NULL.json`](./artix7/tile_type_NULL.json)
* [`f5f3dcd3a4cb9ccb9e2a5774372eeba4f07dfe58ff3b6c38729c6b2c801ddfc8 ./artix7/tile_type_PCIE_BOT.json`](./artix7/tile_type_PCIE_BOT.json)
* [`9e07f51515ad2162c9921af8837a5d75923721395832cd0e83e3ac16b37b135d ./artix7/tile_type_PCIE_INT_INTERFACE_L.json`](./artix7/tile_type_PCIE_INT_INTERFACE_L.json)
* [`9c62f669675e111af20f6b42602a36ed961ca7eb8dcbc1e5a849772a2a040063 ./artix7/tile_type_PCIE_INT_INTERFACE_R.json`](./artix7/tile_type_PCIE_INT_INTERFACE_R.json)
* [`e39fb1e8b8c9d0d9da3307a260fee2bf05ad0f6dfa9456b90a031893b7131e2e ./artix7/tile_type_PCIE_NULL.json`](./artix7/tile_type_PCIE_NULL.json)
* [`30e27f1479d7cd53afa17cc4f68da1c334072c05121bb5d00558aa95d1950b51 ./artix7/tile_type_PCIE_TOP.json`](./artix7/tile_type_PCIE_TOP.json)
* [`80437b8acb8a79337e8604d2766a332b7816d8c7fbe1af5861da0a9189e27279 ./artix7/tile_type_RIOB33.json`](./artix7/tile_type_RIOB33.json)
* [`9e082720755498836ae16cb09db4a3deb7915b57cf717a53bcfb59b49d4a980a ./artix7/tile_type_RIOB33_SING.json`](./artix7/tile_type_RIOB33_SING.json)
* [`c558aadec95a82ba7f5fd7ebee72eff73f4f59ae45cf837481f017ae752f90df ./artix7/tile_type_RIOI3.json`](./artix7/tile_type_RIOI3.json)
* [`3a774afda9268b4b78c94d97f2c82b61537aa16dced637ca4e69ec42a8ac3a74 ./artix7/tile_type_RIOI3_SING.json`](./artix7/tile_type_RIOI3_SING.json)
* [`ff45bb72c86e2b1e88af816947d699e9d908c73e041d25a096036bbc396ce631 ./artix7/tile_type_RIOI3_TBYTESRC.json`](./artix7/tile_type_RIOI3_TBYTESRC.json)
* [`7a1281adf9833c32c2b64ad874598a09b8a14578e8d14e2ab5dd7efab65b05ad ./artix7/tile_type_RIOI3_TBYTETERM.json`](./artix7/tile_type_RIOI3_TBYTETERM.json)
* [`149e968062620a4cb5e16e85098b9f7240a64cb50e437fbd8f437ee031d82904 ./artix7/tile_type_R_TERM_INT_GTX.json`](./artix7/tile_type_R_TERM_INT_GTX.json)
* [`7fdd280c9986b37a81b9f1963679a2fb71f4426108e301f419d1f8817a3ccde3 ./artix7/tile_type_R_TERM_INT.json`](./artix7/tile_type_R_TERM_INT.json)
* [`13025cce4075e992a43f68e5ad8b59dba49ffdafd7735b5e81b7a416e34706c8 ./artix7/tile_type_TERM_CMT.json`](./artix7/tile_type_TERM_CMT.json)
* [`23fc2dd5d45bd155822efb3b40b885999b389ddddc1bd50b6ea1e6ae09b0d2a8 ./artix7/tile_type_T_TERM_INT.json`](./artix7/tile_type_T_TERM_INT.json)
* [`8e5aa8d4838cbb4c8da2cd821fecf563e945ec8b55bfccfdbeee615e0e076389 ./artix7/tile_type_VBRK_EXT.json`](./artix7/tile_type_VBRK_EXT.json)
* [`6331c61d466365b90461b3f907fc150388566d478c935076f72e853eb31e3b23 ./artix7/tile_type_VBRK.json`](./artix7/tile_type_VBRK.json)
* [`19035b8ca97a918c6029371c3caed0a81d0874582dbe82396c3b9fe03abb606a ./artix7/tile_type_VFRAME.json`](./artix7/tile_type_VFRAME.json)
* [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d ./artix7/xc7a35tcpg236-1.yaml`](./artix7/xc7a35tcpg236-1.yaml)
* [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d ./artix7/xc7a35tcsg324-1.yaml`](./artix7/xc7a35tcsg324-1.yaml)
* [`41c360b1e2f7e08b9051f1160a34954ce4c05a445a07f226f1f4059caf1fa1d3 ./artix7/xc7a50tfgg484-1.yaml`](./artix7/xc7a50tfgg484-1.yaml)
@ -293,7 +294,7 @@ Results have checksums;
### Settings
Created using following [settings.sh (sha256: 2daf6a69dd6d20df7b1273ff43c5c340abe36f8229d297646865edcfd91eff18)](https://github.com/SymbiFlow/prjxray/blob/32479630be1a661d1cfd6e5e6f1961e64c263db7/database/kintex7/settings.sh)
Created using following [settings.sh (sha256: 2daf6a69dd6d20df7b1273ff43c5c340abe36f8229d297646865edcfd91eff18)](https://github.com/SymbiFlow/prjxray/blob/a0cfca860872a99ac81b223ee1e5e9ae567b9590/database/kintex7/settings.sh)
```shell
export XRAY_DATABASE="kintex7"
export XRAY_PART="xc7k70tfbg676-2"

5
artix7/mask_bram_r.db
View File

@ -6,6 +6,7 @@ bit 00_06
bit 00_07
bit 00_09
bit 00_10
bit 00_100
bit 00_101
bit 00_102
bit 00_103
@ -58,6 +59,7 @@ bit 00_158
bit 00_161
bit 00_162
bit 00_163
bit 00_164
bit 00_165
bit 00_166
bit 00_167
@ -112,6 +114,7 @@ bit 00_222
bit 00_225
bit 00_226
bit 00_227
bit 00_228
bit 00_229
bit 00_23
bit 00_230
@ -165,6 +168,7 @@ bit 00_289
bit 00_29
bit 00_290
bit 00_291
bit 00_292
bit 00_293
bit 00_294
bit 00_295
@ -190,6 +194,7 @@ bit 00_319
bit 00_33
bit 00_34
bit 00_35
bit 00_36
bit 00_37
bit 00_38
bit 00_39

5
artix7/mask_dsp_r.db
View File

@ -6,6 +6,7 @@ bit 00_06
bit 00_07
bit 00_09
bit 00_10
bit 00_100
bit 00_101
bit 00_102
bit 00_103
@ -58,6 +59,7 @@ bit 00_158
bit 00_161
bit 00_162
bit 00_163
bit 00_164
bit 00_165
bit 00_166
bit 00_167
@ -112,6 +114,7 @@ bit 00_222
bit 00_225
bit 00_226
bit 00_227
bit 00_228
bit 00_229
bit 00_23
bit 00_230
@ -165,6 +168,7 @@ bit 00_289
bit 00_29
bit 00_290
bit 00_291
bit 00_292
bit 00_293
bit 00_294
bit 00_295
@ -190,6 +194,7 @@ bit 00_319
bit 00_33
bit 00_34
bit 00_35
bit 00_36
bit 00_37
bit 00_38
bit 00_39

1
artix7/segbits_clbll_l.db
View File

@ -306,6 +306,7 @@ CLBLL_L.SLICEL_X0.D5FF.MUX.B 30_54
CLBLL_L.SLICEL_X0.D5FF.ZINI 31_51
CLBLL_L.SLICEL_X0.D5FF.ZRST 01_55
CLBLL_L.SLICEL_X0.D5FFMUX.IN_A 30_55
CLBLL_L.SLICEL_X0.D5FFMUX.IN_B !22_55 !23_55 !24_55 25_55 30_54
CLBLL_L.SLICEL_X0.D5FFMUX.IN_B 30_54
CLBLL_L.SLICEL_X0.DFF.DMUX.CY !30_59 !30_61 30_60 30_62
CLBLL_L.SLICEL_X0.DFF.DMUX.DX !30_59 !30_60 !30_62 30_61

1
artix7/segbits_clbll_r.db
View File

@ -306,6 +306,7 @@ CLBLL_R.SLICEL_X0.D5FF.MUX.B 30_54
CLBLL_R.SLICEL_X0.D5FF.ZINI 31_51
CLBLL_R.SLICEL_X0.D5FF.ZRST 01_55
CLBLL_R.SLICEL_X0.D5FFMUX.IN_A 30_55
CLBLL_R.SLICEL_X0.D5FFMUX.IN_B !22_55 !23_55 !24_55 25_55 30_54
CLBLL_R.SLICEL_X0.D5FFMUX.IN_B 30_54
CLBLL_R.SLICEL_X0.DFF.DMUX.CY !30_59 !30_61 30_60 30_62
CLBLL_R.SLICEL_X0.DFF.DMUX.DX !30_59 !30_60 !30_62 30_61

1
artix7/segbits_clblm_l.db
View File

@ -695,6 +695,7 @@ CLBLM_L.SLICEM_X0.D5FF.MUX.B 30_54
CLBLM_L.SLICEM_X0.D5FF.ZINI 31_51
CLBLM_L.SLICEM_X0.D5FF.ZRST 01_55
CLBLM_L.SLICEM_X0.D5FFMUX.IN_A 30_55
CLBLM_L.SLICEM_X0.D5FFMUX.IN_B !22_55 !23_55 !24_55 25_55 30_54
CLBLM_L.SLICEM_X0.D5FFMUX.IN_B 30_54
CLBLM_L.SLICEM_X0.DFF.DMUX.CY !30_59 !30_61 30_60 30_62
CLBLM_L.SLICEM_X0.DFF.DMUX.DX !30_59 !30_60 !30_62 30_61

1
artix7/segbits_clblm_r.db
View File

@ -695,6 +695,7 @@ CLBLM_R.SLICEM_X0.D5FF.MUX.B 30_54
CLBLM_R.SLICEM_X0.D5FF.ZINI 31_51
CLBLM_R.SLICEM_X0.D5FF.ZRST 01_55
CLBLM_R.SLICEM_X0.D5FFMUX.IN_A 30_55
CLBLM_R.SLICEM_X0.D5FFMUX.IN_B !22_55 !23_55 !24_55 25_55 30_54
CLBLM_R.SLICEM_X0.D5FFMUX.IN_B 30_54
CLBLM_R.SLICEM_X0.DFF.DMUX.CY !30_59 !30_61 30_60 30_62
CLBLM_R.SLICEM_X0.DFF.DMUX.DX !30_59 !30_60 !30_62 30_61

1
artix7/segbits_int_r.db
View File

@ -728,6 +728,7 @@ INT_R.FAN_ALT6.EL1END1 !22_24 16_24 23_24 24_24 25_24
INT_R.FAN_ALT6.ER1END1 !23_24 17_24 22_24 24_24 25_24
INT_R.FAN_ALT6.FAN_BOUNCE1 !22_24 20_24 23_24 24_24 25_24
INT_R.FAN_ALT6.FAN_BOUNCE7 !23_24 20_24 22_24 24_24 25_24
INT_R.FAN_ALT6.GFAN0 !22_24 !23_24 !24_24 00_36 21_24 25_24
INT_R.FAN_ALT6.GFAN0 !22_24 !23_24 !24_24 21_24 25_24
INT_R.FAN_ALT6.LOGIC_OUTS1 !23_24 21_24 22_24 24_24 25_24
INT_R.FAN_ALT6.LOGIC_OUTS13 !22_24 21_24 23_24 24_24 25_24

40
artix7/site_type_BSCAN.json
View File

@ -1,39 +1,39 @@
{
"type": "BSCAN",
"site_pips": {},
"site_pins": {
"RESET": {
"direction": "OUT"
},
"TMS": {
"direction": "OUT"
},
"TDO": {
"direction": "IN"
},
"SEL": {
"direction": "OUT"
},
"TDI": {
"direction": "OUT"
},
"RUNTEST": {
"SEL": {
"direction": "OUT"
},
"CAPTURE": {
"direction": "OUT"
},
"DRCK": {
"SHIFT": {
"direction": "OUT"
},
"TDO": {
"direction": "IN"
},
"RESET": {
"direction": "OUT"
},
"TCK": {
"direction": "OUT"
},
"SHIFT": {
"direction": "OUT"
},
"UPDATE": {
"direction": "OUT"
},
"DRCK": {
"direction": "OUT"
},
"RUNTEST": {
"direction": "OUT"
},
"TMS": {
"direction": "OUT"
}
},
"type": "BSCAN",
"site_pips": {}
}
}

138
artix7/site_type_BUFGCTRL.json
View File

@ -1,82 +1,82 @@
{
"type": "BUFGCTRL",
"site_pips": {
"CE0INV:CE0": {
"to_pin": "OUT",
"from_pin": "CE0"
},
"S0INV:S0_B": {
"to_pin": "OUT",
"from_pin": "S0_B"
},
"CE1INV:CE1_B": {
"to_pin": "OUT",
"from_pin": "CE1_B"
},
"IGNORE0INV:IGNORE0_B": {
"to_pin": "OUT",
"from_pin": "IGNORE0_B"
},
"CE1INV:CE1": {
"to_pin": "OUT",
"from_pin": "CE1"
},
"S0INV:S0": {
"to_pin": "OUT",
"from_pin": "S0"
},
"IGNORE1INV:IGNORE1": {
"to_pin": "OUT",
"from_pin": "IGNORE1"
},
"S1INV:S1": {
"to_pin": "OUT",
"from_pin": "S1"
},
"IGNORE1INV:IGNORE1_B": {
"to_pin": "OUT",
"from_pin": "IGNORE1_B"
},
"IGNORE0INV:IGNORE0": {
"to_pin": "OUT",
"from_pin": "IGNORE0"
},
"S1INV:S1_B": {
"to_pin": "OUT",
"from_pin": "S1_B"
},
"CE0INV:CE0_B": {
"to_pin": "OUT",
"from_pin": "CE0_B"
}
},
"site_pins": {
"O": {
"direction": "OUT"
},
"I0": {
"direction": "IN"
},
"IGNORE0": {
"direction": "IN"
},
"IGNORE1": {
"direction": "IN"
},
"S0": {
"direction": "IN"
},
"I1": {
"direction": "IN"
},
"CE1": {
"direction": "IN"
},
"CE0": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"IGNORE1": {
"direction": "IN"
},
"I0": {
"direction": "IN"
},
"I1": {
"direction": "IN"
},
"S1": {
"direction": "IN"
},
"S0": {
"direction": "IN"
},
"IGNORE0": {
"direction": "IN"
}
},
"type": "BUFGCTRL",
"site_pips": {
"CE0INV:CE0": {
"from_pin": "CE0",
"to_pin": "OUT"
},
"S0INV:S0": {
"from_pin": "S0",
"to_pin": "OUT"
},
"CE0INV:CE0_B": {
"from_pin": "CE0_B",
"to_pin": "OUT"
},
"S0INV:S0_B": {
"from_pin": "S0_B",
"to_pin": "OUT"
},
"IGNORE1INV:IGNORE1": {
"from_pin": "IGNORE1",
"to_pin": "OUT"
},
"IGNORE0INV:IGNORE0_B": {
"from_pin": "IGNORE0_B",
"to_pin": "OUT"
},
"CE1INV:CE1": {
"from_pin": "CE1",
"to_pin": "OUT"
},
"IGNORE0INV:IGNORE0": {
"from_pin": "IGNORE0",
"to_pin": "OUT"
},
"S1INV:S1_B": {
"from_pin": "S1_B",
"to_pin": "OUT"
},
"S1INV:S1": {
"from_pin": "S1",
"to_pin": "OUT"
},
"IGNORE1INV:IGNORE1_B": {
"from_pin": "IGNORE1_B",
"to_pin": "OUT"
},
"CE1INV:CE1_B": {
"from_pin": "CE1_B",
"to_pin": "OUT"
}
}
}

28
artix7/site_type_BUFHCE.json
View File

@ -1,24 +1,24 @@
{
"type": "BUFHCE",
"site_pips": {
"CEINV:CE_B": {
"to_pin": "OUT",
"from_pin": "CE_B"
},
"CEINV:CE": {
"to_pin": "OUT",
"from_pin": "CE"
}
},
"site_pins": {
"I": {
"direction": "IN"
},
"CE": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"I": {
"direction": "IN"
}
},
"type": "BUFHCE",
"site_pips": {
"CEINV:CE_B": {
"from_pin": "CE_B",
"to_pin": "OUT"
},
"CEINV:CE": {
"from_pin": "CE",
"to_pin": "OUT"
}
}
}

12
artix7/site_type_BUFIO.json
View File

@ -1,12 +1,12 @@
{
"type": "BUFIO",
"site_pips": {},
"site_pins": {
"O": {
"direction": "OUT"
},
"I": {
"direction": "IN"
},
"O": {
"direction": "OUT"
}
},
"type": "BUFIO",
"site_pips": {}
}
}

28
artix7/site_type_BUFMRCE.json
View File

@ -1,24 +1,24 @@
{
"type": "BUFMRCE",
"site_pips": {
"CEINV:CE_B": {
"to_pin": "OUT",
"from_pin": "CE_B"
},
"CEINV:CE": {
"to_pin": "OUT",
"from_pin": "CE"
}
},
"site_pins": {
"I": {
"direction": "IN"
},
"CE": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"I": {
"direction": "IN"
}
},
"type": "BUFMRCE",
"site_pips": {
"CEINV:CE_B": {
"from_pin": "CE_B",
"to_pin": "OUT"
},
"CEINV:CE": {
"from_pin": "CE",
"to_pin": "OUT"
}
}
}

12
artix7/site_type_BUFR.json
View File

@ -1,5 +1,10 @@
{
"type": "BUFR",
"site_pips": {},
"site_pins": {
"I": {
"direction": "IN"
},
"CE": {
"direction": "IN"
},
@ -8,11 +13,6 @@
},
"O": {
"direction": "OUT"
},
"I": {
"direction": "IN"
}
},
"type": "BUFR",
"site_pips": {}
}
}

12
artix7/site_type_CAPTURE.json
View File

@ -1,12 +1,12 @@
{
"type": "CAPTURE",
"site_pips": {},
"site_pins": {
"CLK": {
"direction": "IN"
},
"CAP": {
"direction": "IN"
},
"CLK": {
"direction": "IN"
}
},
"type": "CAPTURE",
"site_pips": {}
}
}

12
artix7/site_type_DCIRESET.json
View File

@ -1,12 +1,12 @@
{
"type": "DCIRESET",
"site_pips": {},
"site_pins": {
"LOCKED": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"LOCKED": {
"direction": "OUT"
}
},
"type": "DCIRESET",
"site_pips": {}
}
}

16
artix7/site_type_DNA_PORT.json
View File

@ -1,21 +1,21 @@
{
"type": "DNA_PORT",
"site_pips": {},
"site_pins": {
"CLK": {
"SHIFT": {
"direction": "IN"
},
"READ": {
"direction": "IN"
},
"DOUT": {
"direction": "OUT"
"CLK": {
"direction": "IN"
},
"DIN": {
"direction": "IN"
},
"SHIFT": {
"direction": "IN"
"DOUT": {
"direction": "OUT"
}
},
"type": "DNA_PORT",
"site_pips": {}
}
}

2434
artix7/site_type_DSP48E1.json
View File

File diff suppressed because it is too large Load Diff

138
artix7/site_type_EFUSE_USR.json
View File

@ -1,9 +1,8 @@
{
"type": "EFUSE_USR",
"site_pips": {},
"site_pins": {
"EFUSEUSR5": {
"direction": "OUT"
},
"EFUSEUSR26": {
"EFUSEUSR19": {
"direction": "OUT"
},
"EFUSEUSR23": {
@ -12,76 +11,25 @@
"EFUSEUSR7": {
"direction": "OUT"
},
"EFUSEUSR19": {
"EFUSEUSR5": {
"direction": "OUT"
},
"EFUSEUSR21": {
"direction": "OUT"
},
"EFUSEUSR9": {
"direction": "OUT"
},
"EFUSEUSR8": {
"direction": "OUT"
},
"EFUSEUSR29": {
"direction": "OUT"
},
"EFUSEUSR27": {
"direction": "OUT"
},
"EFUSEUSR13": {
"direction": "OUT"
},
"EFUSEUSR3": {
"direction": "OUT"
},
"EFUSEUSR31": {
"direction": "OUT"
},
"EFUSEUSR2": {
"direction": "OUT"
},
"EFUSEUSR20": {
"direction": "OUT"
},
"EFUSEUSR16": {
"direction": "OUT"
},
"EFUSEUSR1": {
"direction": "OUT"
},
"EFUSEUSR14": {
"direction": "OUT"
},
"EFUSEUSR17": {
"direction": "OUT"
},
"EFUSEUSR6": {
"direction": "OUT"
},
"EFUSEUSR28": {
"direction": "OUT"
},
"EFUSEUSR25": {
"direction": "OUT"
},
"EFUSEUSR4": {
"direction": "OUT"
},
"EFUSEUSR15": {
"direction": "OUT"
},
"EFUSEUSR30": {
"EFUSEUSR11": {
"direction": "OUT"
},
"EFUSEUSR22": {
"direction": "OUT"
},
"EFUSEUSR10": {
"EFUSEUSR2": {
"direction": "OUT"
},
"EFUSEUSR12": {
"EFUSEUSR27": {
"direction": "OUT"
},
"EFUSEUSR3": {
"direction": "OUT"
},
"EFUSEUSR9": {
"direction": "OUT"
},
"EFUSEUSR24": {
@ -90,13 +38,65 @@
"EFUSEUSR0": {
"direction": "OUT"
},
"EFUSEUSR11": {
"EFUSEUSR8": {
"direction": "OUT"
},
"EFUSEUSR20": {
"direction": "OUT"
},
"EFUSEUSR13": {
"direction": "OUT"
},
"EFUSEUSR26": {
"direction": "OUT"
},
"EFUSEUSR31": {
"direction": "OUT"
},
"EFUSEUSR10": {
"direction": "OUT"
},
"EFUSEUSR14": {
"direction": "OUT"
},
"EFUSEUSR30": {
"direction": "OUT"
},
"EFUSEUSR21": {
"direction": "OUT"
},
"EFUSEUSR28": {
"direction": "OUT"
},
"EFUSEUSR6": {
"direction": "OUT"
},
"EFUSEUSR4": {
"direction": "OUT"
},
"EFUSEUSR15": {
"direction": "OUT"
},
"EFUSEUSR18": {
"direction": "OUT"
},
"EFUSEUSR1": {
"direction": "OUT"
},
"EFUSEUSR25": {
"direction": "OUT"
},
"EFUSEUSR29": {
"direction": "OUT"
},
"EFUSEUSR16": {
"direction": "OUT"
},
"EFUSEUSR17": {
"direction": "OUT"
},
"EFUSEUSR12": {
"direction": "OUT"
}
},
"type": "EFUSE_USR",
"site_pips": {}
}
}

872
artix7/site_type_FIFO18E1.json
View File

@ -1,117 +1,194 @@
{
"type": "FIFO18E1",
"site_pips": {
"RDCLKINV:RDCLK_B": {
"to_pin": "OUT",
"from_pin": "RDCLK_B"
},
"RSTINV:RST": {
"to_pin": "OUT",
"from_pin": "RST"
},
"RSTINV:RST_B": {
"to_pin": "OUT",
"from_pin": "RST_B"
},
"RDENINV:RDEN_B": {
"to_pin": "OUT",
"from_pin": "RDEN_B"
},
"WRENINV:WREN_B": {
"to_pin": "OUT",
"from_pin": "WREN_B"
},
"RDCLKINV:RDCLK": {
"to_pin": "OUT",
"from_pin": "RDCLK"
},
"RSTREGINV:RSTREG": {
"to_pin": "OUT",
"from_pin": "RSTREG"
},
"WRENINV:WREN": {
"to_pin": "OUT",
"from_pin": "WREN"
},
"RDRCLKINV:RDRCLK": {
"to_pin": "OUT",
"from_pin": "RDRCLK"
},
"RDRCLKINV:RDRCLK_B": {
"to_pin": "OUT",
"from_pin": "RDRCLK_B"
},
"WRCLKINV:WRCLK_B": {
"to_pin": "OUT",
"from_pin": "WRCLK_B"
},
"WRCLKINV:WRCLK": {
"to_pin": "OUT",
"from_pin": "WRCLK"
},
"RDENINV:RDEN": {
"to_pin": "OUT",
"from_pin": "RDEN"
},
"RSTREGINV:RSTREG_B": {
"to_pin": "OUT",
"from_pin": "RSTREG_B"
}
},
"site_pins": {
"RDCOUNT4": {
"DO21": {
"direction": "OUT"
},
"DIADI4": {
"direction": "IN"
},
"DO25": {
"direction": "OUT"
},
"DIADI0": {
"direction": "IN"
},
"DIADI1": {
"direction": "IN"
},
"DO17": {
"direction": "OUT"
},
"ADDRARDADDR7": {
"direction": "IN"
},
"ADDRARDADDR11": {
"direction": "IN"
},
"REGCE": {
"direction": "IN"
},
"WEBWE7": {
"direction": "IN"
},
"DO23": {
"direction": "OUT"
},
"ADDRBWRADDR3": {
"direction": "IN"
},
"WEA0": {
"direction": "IN"
},
"DIBDI0": {
"direction": "IN"
},
"RDCOUNT9": {
"direction": "OUT"
},
"ADDRARDADDR3": {
"direction": "IN"
},
"DIBDI10": {
"direction": "IN"
},
"EMPTY": {
"RDRCLK": {
"direction": "IN"
},
"DO9": {
"direction": "OUT"
},
"WRCOUNT11": {
"DO22": {
"direction": "OUT"
},
"DO6": {
"RDCOUNT0": {
"direction": "OUT"
},
"DO5": {
"ADDRBWRADDR1": {
"direction": "IN"
},
"WRCOUNT2": {
"direction": "OUT"
},
"WEBWE6": {
"direction": "IN"
},
"DO26": {
"direction": "OUT"
},
"WRCOUNT9": {
"direction": "OUT"
},
"ADDRBWRADDR12": {
"direction": "IN"
},
"DO11": {
"direction": "OUT"
},
"WRCOUNT10": {
"direction": "OUT"
},
"ADDRARDADDR8": {
"direction": "IN"
},
"ADDRBWRADDR0": {
"DIADI10": {
"direction": "IN"
},
"ADDRBTIEHIGH1": {
"direction": "IN"
},
"ADDRARDADDR4": {
"direction": "IN"
},
"DIPADIP0": {
"direction": "IN"
},
"WRCOUNT0": {
"DO24": {
"direction": "OUT"
},
"DIADI6": {
"ADDRARDADDR3": {
"direction": "IN"
},
"DIADI7": {
"REGCEB": {
"direction": "IN"
},
"DIADI12": {
"direction": "IN"
},
"WRCOUNT5": {
"RDCOUNT5": {
"direction": "OUT"
},
"ADDRBWRADDR4": {
"DO14": {
"direction": "OUT"
},
"DIADI11": {
"direction": "IN"
},
"REGCLKB": {
"direction": "IN"
"DO23": {
"direction": "OUT"
},
"ADDRATIEHIGH1": {
"direction": "IN"
},
"ADDRBWRADDR5": {
"direction": "IN"
},
"DIBDI1": {
"DIADI14": {
"direction": "IN"
},
"RSTRAMB": {
"direction": "IN"
},
"ADDRBWRADDR7": {
"RDCOUNT2": {
"direction": "OUT"
},
"WRCOUNT6": {
"direction": "OUT"
},
"WEA1": {
"direction": "IN"
},
"ADDRARDADDR13": {
"direction": "IN"
},
"WRCOUNT0": {
"direction": "OUT"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"DO19": {
"direction": "OUT"
},
"DO8": {
"direction": "OUT"
},
"DO5": {
"direction": "OUT"
},
"DIADI1": {
"direction": "IN"
},
"DIADI13": {
"direction": "IN"
},
"ADDRARDADDR7": {
"direction": "IN"
},
"ADDRBWRADDR5": {
"direction": "IN"
},
"DIPBDIP1": {
"direction": "IN"
},
"WEBWE7": {
"direction": "IN"
},
"ADDRBTIEHIGH0": {
"direction": "IN"
},
"DIADI6": {
"direction": "IN"
},
"DIADI5": {
"direction": "IN"
},
"RST": {
"direction": "IN"
},
"DIBDI7": {
@ -120,418 +197,341 @@
"FULL": {
"direction": "OUT"
},
"ADDRBWRADDR6": {
"direction": "IN"
},
"WEBWE0": {
"direction": "IN"
},
"ADDRBWRADDR13": {
"direction": "IN"
},
"RST": {
"direction": "IN"
},
"DOP2": {
"direction": "OUT"
},
"WEA2": {
"direction": "IN"
},
"DIBDI14": {
"direction": "IN"
},
"DIBDI6": {
"direction": "IN"
},
"ADDRBWRADDR1": {
"direction": "IN"
},
"DIPBDIP0": {
"direction": "IN"
},
"WEBWE2": {
"direction": "IN"
},
"RDERR": {
"direction": "OUT"
},
"ADDRARDADDR1": {
"direction": "IN"
},
"DIADI11": {
"direction": "IN"
},
"DIPBDIP1": {
"direction": "IN"
},
"ADDRBWRADDR2": {
"direction": "IN"
},
"ADDRARDADDR13": {
"direction": "IN"
},
"ADDRATIEHIGH0": {
"direction": "IN"
},
"DO0": {
"direction": "OUT"
},
"ADDRBWRADDR11": {
"direction": "IN"
},
"DO12": {
"direction": "OUT"
},
"DO2": {
"direction": "OUT"
},
"WEBWE3": {
"direction": "IN"
},
"DIBDI8": {
"direction": "IN"
},
"ADDRBWRADDR8": {
"direction": "IN"
},
"DIBDI3": {
"direction": "IN"
},
"DO9": {
"direction": "OUT"
},
"RDCOUNT1": {
"direction": "OUT"
},
"RDCOUNT6": {
"direction": "OUT"
},
"ADDRARDADDR0": {
"direction": "IN"
},
"ADDRARDADDR5": {
"direction": "IN"
},
"DIBDI11": {
"direction": "IN"
},
"WRCOUNT3": {
"direction": "OUT"
},
"DO16": {
"direction": "OUT"
},
"RSTREGB": {
"direction": "IN"
},
"RDCOUNT0": {
"direction": "OUT"
},
"DO8": {
"direction": "OUT"
},
"DIADI8": {
"direction": "IN"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"WEA3": {
"direction": "IN"
},
"WEBWE5": {
"direction": "IN"
},
"DO18": {
"direction": "OUT"
},
"ADDRBWRADDR9": {
"direction": "IN"
},
"WEBWE6": {
"direction": "IN"
},
"WRCOUNT6": {
"direction": "OUT"
},
"RDCOUNT11": {
"direction": "OUT"
},
"DO24": {
"direction": "OUT"
},
"DO20": {
"direction": "OUT"
},
"RDRCLK": {
"direction": "IN"
},
"ADDRARDADDR9": {
"direction": "IN"
},
"DOP0": {
"direction": "OUT"
},
"DIADI2": {
"direction": "IN"
},
"DO19": {
"direction": "OUT"
},
"DIPADIP1": {
"direction": "IN"
},
"RDCOUNT8": {
"direction": "OUT"
},
"DO3": {
"direction": "OUT"
},
"DOP1": {
"direction": "OUT"
},
"ADDRBWRADDR12": {
"direction": "IN"
},
"DO14": {
"direction": "OUT"
},
"DIADI10": {
"direction": "IN"
},
"DIBDI4": {
"direction": "IN"
},
"DO4": {
"direction": "OUT"
},
"WRCOUNT10": {
"direction": "OUT"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
"DIADI13": {
"direction": "IN"
},
"DIADI14": {
"direction": "IN"
},
"ADDRBTIEHIGH0": {
"direction": "IN"
},
"DIBDI2": {
"direction": "IN"
},
"ADDRARDADDR2": {
"direction": "IN"
},
"DO31": {
"ADDRARDADDR5": {
"direction": "IN"
},
"DIBDI15": {
"direction": "IN"
},
"WEBWE4": {
"direction": "IN"
},
"DO3": {
"direction": "OUT"
},
"WRCOUNT2": {
"DOP0": {
"direction": "OUT"
},
"DIADI15": {
"DO18": {
"direction": "OUT"
},
"DOP2": {
"direction": "OUT"
},
"ADDRBWRADDR8": {
"direction": "IN"
},
"ADDRARDADDR0": {
"direction": "IN"
},
"DIADI3": {
"direction": "IN"
},
"RDCLK": {
"direction": "IN"
},
"DO22": {
"ADDRBWRADDR0": {
"direction": "IN"
},
"RSTREG": {
"direction": "IN"
},
"DO25": {
"direction": "OUT"
},
"REGCEB": {
"ADDRBWRADDR6": {
"direction": "IN"
},
"DIBDI0": {
"direction": "IN"
},
"DO12": {
"direction": "OUT"
},
"DO16": {
"direction": "OUT"
},
"DIADI12": {
"direction": "IN"
},
"RSTREGB": {
"direction": "IN"
},
"DIBDI8": {
"direction": "IN"
},
"WEA3": {
"direction": "IN"
},
"DO10": {
"direction": "OUT"
},
"WRCOUNT1": {
"direction": "OUT"
},
"RDCOUNT6": {
"direction": "OUT"
},
"DO31": {
"direction": "OUT"
},
"DIBDI3": {
"direction": "IN"
},
"ADDRBWRADDR2": {
"direction": "IN"
},
"DIADI15": {
"direction": "IN"
},
"EMPTY": {
"direction": "OUT"
},
"DIBDI5": {
"direction": "IN"
},
"ADDRBWRADDR3": {
"direction": "IN"
},
"DIADI4": {
"direction": "IN"
},
"DO1": {
"direction": "OUT"
},
"ADDRBWRADDR9": {
"direction": "IN"
},
"DOP1": {
"direction": "OUT"
},
"DO0": {
"direction": "OUT"
},
"WEBWE2": {
"direction": "IN"
},
"DO28": {
"direction": "OUT"
},
"WEBWE1": {
"direction": "IN"
},
"RDCOUNT4": {
"direction": "OUT"
},
"WEBWE5": {
"direction": "IN"
},
"DIBDI9": {
"direction": "IN"
},
"WREN": {
"direction": "IN"
},
"RDCOUNT10": {
"direction": "OUT"
},
"DIPBDIP0": {
"direction": "IN"
},
"DIADI9": {
"direction": "IN"
},
"ADDRARDADDR11": {
"direction": "IN"
},
"RDCOUNT8": {
"direction": "OUT"
},
"RDCOUNT1": {
"direction": "OUT"
},
"ADDRARDADDR12": {
"direction": "IN"
},
"WRCLK": {
"direction": "IN"
},
"ADDRBWRADDR13": {
"direction": "IN"
},
"DO17": {
"direction": "OUT"
},
"DIBDI1": {
"direction": "IN"
},
"DO30": {
"direction": "OUT"
},
"DIBDI14": {
"direction": "IN"
},
"ADDRARDADDR10": {
"direction": "IN"
},
"REGCLKB": {
"direction": "IN"
},
"DO27": {
"direction": "OUT"
},
"DIBDI12": {
"direction": "IN"
},
"DIADI7": {
"direction": "IN"
},
"REGCE": {
"direction": "IN"
},
"DIPADIP1": {
"direction": "IN"
},
"DO15": {
"direction": "OUT"
},
"DO29": {
"direction": "OUT"
},
"DO11": {
"DIADI0": {
"direction": "IN"
},
"ADDRARDADDR4": {
"direction": "IN"
},
"DO6": {
"direction": "OUT"
},
"DIADI5": {
"direction": "IN"
},
"DIADI3": {
"direction": "IN"
},
"RSTREG": {
"DIADI8": {
"direction": "IN"
},
"DO7": {
"direction": "OUT"
},
"DIBDI12": {
"direction": "IN"
},
"WRERR": {
"direction": "OUT"
},
"WEBWE4": {
"direction": "IN"
},
"WEBWE1": {
"direction": "IN"
},
"DO10": {
"direction": "OUT"
},
"RDEN": {
"direction": "IN"
},
"WREN": {
"direction": "IN"
},
"DO26": {
"direction": "OUT"
},
"RDCOUNT7": {
"direction": "OUT"
},
"ADDRBWRADDR10": {
"direction": "IN"
},
"RDCOUNT3": {
"direction": "OUT"
},
"WRCOUNT7": {
"direction": "OUT"
},
"ADDRARDADDR6": {
"direction": "IN"
},
"WEA1": {
"direction": "IN"
},
"WRCOUNT9": {
"direction": "OUT"
},
"WRCOUNT4": {
"direction": "OUT"
},
"DIBDI13": {
"direction": "IN"
},
"DO27": {
"direction": "OUT"
},
"DIBDI15": {
"direction": "IN"
},
"DO30": {
"direction": "OUT"
},
"DIADI9": {
"direction": "IN"
},
"DIBDI5": {
"direction": "IN"
},
"DO13": {
"direction": "OUT"
},
"ADDRARDADDR12": {
"direction": "IN"
},
"ADDRARDADDR10": {
"direction": "IN"
},
"RDCOUNT5": {
"direction": "OUT"
},
"WRCOUNT8": {
"direction": "OUT"
},
"DIBDI9": {
"direction": "IN"
},
"WRCLK": {
"direction": "IN"
},
"DO1": {
"direction": "OUT"
},
"RDCOUNT2": {
"direction": "OUT"
},
"DO28": {
"direction": "OUT"
},
"RDCOUNT10": {
"ALMOSTEMPTY": {
"direction": "OUT"
},
"DOP3": {
"direction": "OUT"
},
"DO21": {
"ADDRARDADDR1": {
"direction": "IN"
},
"DIBDI4": {
"direction": "IN"
},
"ADDRATIEHIGH0": {
"direction": "IN"
},
"WEBWE0": {
"direction": "IN"
},
"ADDRBWRADDR11": {
"direction": "IN"
},
"WEBWE3": {
"direction": "IN"
},
"ADDRARDADDR6": {
"direction": "IN"
},
"ADDRATIEHIGH1": {
"direction": "IN"
},
"RDEN": {
"direction": "IN"
},
"WRCOUNT8": {
"direction": "OUT"
}
},
"type": "FIFO18E1",
"site_pips": {
"RDENINV:RDEN_B": {
"from_pin": "RDEN_B",
"to_pin": "OUT"
},
"WRENINV:WREN_B": {
"from_pin": "WREN_B",
"to_pin": "OUT"
"WEA0": {
"direction": "IN"
},
"WRCLKINV:WRCLK_B": {
"from_pin": "WRCLK_B",
"to_pin": "OUT"
"RDCOUNT7": {
"direction": "OUT"
},
"RSTREGINV:RSTREG": {
"from_pin": "RSTREG",
"to_pin": "OUT"
"DIPADIP0": {
"direction": "IN"
},
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
"WRCOUNT3": {
"direction": "OUT"
},
"RDCLKINV:RDCLK": {
"from_pin": "RDCLK",
"to_pin": "OUT"
"ADDRBWRADDR7": {
"direction": "IN"
},
"WRCLKINV:WRCLK": {
"from_pin": "WRCLK",
"to_pin": "OUT"
"DO4": {
"direction": "OUT"
},
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
"WRERR": {
"direction": "OUT"
},
"WRENINV:WREN": {
"from_pin": "WREN",
"to_pin": "OUT"
"ADDRBWRADDR10": {
"direction": "IN"
},
"RDRCLKINV:RDRCLK": {
"from_pin": "RDRCLK",
"to_pin": "OUT"
"WRCOUNT5": {
"direction": "OUT"
},
"RDENINV:RDEN": {
"from_pin": "RDEN",
"to_pin": "OUT"
"WRCOUNT4": {
"direction": "OUT"
},
"RDRCLKINV:RDRCLK_B": {
"from_pin": "RDRCLK_B",
"to_pin": "OUT"
"RDCOUNT11": {
"direction": "OUT"
},
"RSTREGINV:RSTREG_B": {
"from_pin": "RSTREG_B",
"to_pin": "OUT"
"ADDRBWRADDR4": {
"direction": "IN"
},
"RDCLKINV:RDCLK_B": {
"from_pin": "RDCLK_B",
"to_pin": "OUT"
"WRCOUNT11": {
"direction": "OUT"
},
"WRCOUNT7": {
"direction": "OUT"
},
"DIBDI13": {
"direction": "IN"
},
"DO2": {
"direction": "OUT"
},
"RDCOUNT9": {
"direction": "OUT"
},
"ADDRARDADDR9": {
"direction": "IN"
},
"DIBDI2": {
"direction": "IN"
},
"DO20": {
"direction": "OUT"
},
"DIBDI11": {
"direction": "IN"
},
"RDCOUNT3": {
"direction": "OUT"
},
"ADDRBTIEHIGH1": {
"direction": "IN"
},
"DO13": {
"direction": "OUT"
},
"DIBDI6": {
"direction": "IN"
},
"WEA2": {
"direction": "IN"
},
"RDERR": {
"direction": "OUT"
}
}
}

262
artix7/site_type_FRAME_ECC.json
View File

@ -1,171 +1,171 @@
{
"type": "FRAME_ECC",
"site_pips": {},
"site_pins": {
"SYNWORD1": {
"direction": "OUT"
},
"ECCERRORSINGLE": {
"direction": "OUT"
},
"SYNDROME10": {
"FAR18": {
"direction": "OUT"
},
"SYNWORD3": {
"direction": "OUT"
},
"FAR14": {
"direction": "OUT"
},
"FAR22": {
"direction": "OUT"
},
"FAR12": {
"direction": "OUT"
},
"ECCERROR": {
"direction": "OUT"
},
"FAR1": {
"direction": "OUT"
},
"FAR10": {
"direction": "OUT"
},
"FAR19": {
"direction": "OUT"
},
"SYNBIT2": {
"direction": "OUT"
},
"FAR13": {
"direction": "OUT"
},
"SYNDROME2": {
"direction": "OUT"
},
"SYNDROME4": {
"direction": "OUT"
},
"SYNDROME11": {
"direction": "OUT"
},
"FAR21": {
"direction": "OUT"
},
"FAR5": {
"direction": "OUT"
},
"FAR3": {
"FAR2": {
"direction": "OUT"
},
"FAR20": {
"direction": "OUT"
},
"SYNDROME0": {
"SYNDROME5": {
"direction": "OUT"
},
"FAR18": {
"FAR6": {
"direction": "OUT"
},
"SYNDROME3": {
"direction": "OUT"
},
"FAR15": {
"direction": "OUT"
},
"FAR8": {
"direction": "OUT"
},
"SYNDROME1": {
"direction": "OUT"
},
"SYNBIT4": {
"direction": "OUT"
},
"SYNDROME9": {
"direction": "OUT"
},
"CRCERROR": {
"direction": "OUT"
},
"FAR17": {
"direction": "OUT"
},
"SYNBIT3": {
"direction": "OUT"
},
"SYNWORD4": {
"direction": "OUT"
},
"FAR25": {
"direction": "OUT"
},
"FAR0": {
"direction": "OUT"
},
"FAR16": {
"direction": "OUT"
},
"SYNWORD6": {
"FAR10": {
"direction": "OUT"
},
"SYNDROME12": {
"direction": "OUT"
},
"SYNWORD5": {
"direction": "OUT"
},
"FAR4": {
"direction": "OUT"
},
"SYNDROME5": {
"direction": "OUT"
},
"SYNWORD2": {
"direction": "OUT"
},
"FAR2": {
"direction": "OUT"
},
"SYNWORD0": {
"direction": "OUT"
},
"FAR9": {
"direction": "OUT"
},
"FAR11": {
"direction": "OUT"
},
"SYNDROME8": {
"direction": "OUT"
},
"SYNDROME7": {
"FAR15": {
"direction": "OUT"
},
"FAR14": {
"direction": "OUT"
},
"SYNDROME1": {
"direction": "OUT"
},
"SYNWORD6": {
"direction": "OUT"
},
"FAR0": {
"direction": "OUT"
},
"SYNWORD1": {
"direction": "OUT"
},
"FAR3": {
"direction": "OUT"
},
"SYNBIT4": {
"direction": "OUT"
},
"FAR23": {
"direction": "OUT"
},
"SYNDROME6": {
"direction": "OUT"
},
"FAR7": {
"direction": "OUT"
},
"FAR24": {
"direction": "OUT"
},
"SYNBIT1": {
"CRCERROR": {
"direction": "OUT"
},
"SYNDROMEVALID": {
"direction": "OUT"
},
"SYNBIT3": {
"direction": "OUT"
},
"SYNDROME2": {
"direction": "OUT"
},
"SYNDROME10": {
"direction": "OUT"
},
"FAR13": {
"direction": "OUT"
},
"FAR21": {
"direction": "OUT"
},
"SYNBIT2": {
"direction": "OUT"
},
"FAR22": {
"direction": "OUT"
},
"ECCERROR": {
"direction": "OUT"
},
"FAR11": {
"direction": "OUT"
},
"FAR16": {
"direction": "OUT"
},
"SYNWORD5": {
"direction": "OUT"
},
"SYNWORD4": {
"direction": "OUT"
},
"FAR7": {
"direction": "OUT"
},
"SYNDROME0": {
"direction": "OUT"
},
"SYNDROME3": {
"direction": "OUT"
},
"FAR12": {
"direction": "OUT"
},
"SYNDROME7": {
"direction": "OUT"
},
"FAR5": {
"direction": "OUT"
},
"SYNDROME9": {
"direction": "OUT"
},
"FAR1": {
"direction": "OUT"
},
"SYNWORD2": {
"direction": "OUT"
},
"FAR24": {
"direction": "OUT"
},
"FAR9": {
"direction": "OUT"
},
"SYNWORD0": {
"direction": "OUT"
},
"FAR8": {
"direction": "OUT"
},
"FAR17": {
"direction": "OUT"
},
"SYNBIT0": {
"direction": "OUT"
},
"FAR6": {
"FAR25": {
"direction": "OUT"
},
"SYNDROME6": {
"direction": "OUT"
},
"SYNDROME4": {
"direction": "OUT"
},
"FAR4": {
"direction": "OUT"
},
"SYNDROME11": {
"direction": "OUT"
},
"ECCERRORSINGLE": {
"direction": "OUT"
},
"SYNBIT1": {
"direction": "OUT"
},
"FAR19": {
"direction": "OUT"
}
},
"type": "FRAME_ECC",
"site_pips": {}
}
}

3400
artix7/site_type_GTPE2_CHANNEL.json
View File

File diff suppressed because it is too large Load Diff

880
artix7/site_type_GTPE2_COMMON.json
View File

@ -1,234 +1,394 @@
{
"site_pins": {
"PLL0OUTCLK": {
"direction": "OUT"
"type": "GTPE2_COMMON",
"site_pips": {
"DRPCLKINV:DRPCLK": {
"to_pin": "OUT",
"from_pin": "DRPCLK"
},
"PLL1LOCKDETCLKINV:PLL1LOCKDETCLK_B": {
"to_pin": "OUT",
"from_pin": "PLL1LOCKDETCLK_B"
},
"PLL0LOCKDETCLKINV:PLL0LOCKDETCLK_B": {
"to_pin": "OUT",
"from_pin": "PLL0LOCKDETCLK_B"
},
"PMASCANCLK0INV:PMASCANCLK0_B": {
"to_pin": "OUT",
"from_pin": "PMASCANCLK0_B"
},
"PLLCLKSPAREINV:PLLCLKSPARE": {
"to_pin": "OUT",
"from_pin": "PLLCLKSPARE"
},
"DRPCLKINV:DRPCLK_B": {
"to_pin": "OUT",
"from_pin": "DRPCLK_B"
},
"PLLCLKSPAREINV:PLLCLKSPARE_B": {
"to_pin": "OUT",
"from_pin": "PLLCLKSPARE_B"
},
"PLL0LOCKDETCLKINV:PLL0LOCKDETCLK": {
"to_pin": "OUT",
"from_pin": "PLL0LOCKDETCLK"
},
"GTGREFCLK0INV:GTGREFCLK0_B": {
"to_pin": "OUT",
"from_pin": "GTGREFCLK0_B"
},
"GTGREFCLK0INV:GTGREFCLK0": {
"to_pin": "OUT",
"from_pin": "GTGREFCLK0"
},
"GTGREFCLK1INV:GTGREFCLK1": {
"to_pin": "OUT",
"from_pin": "GTGREFCLK1"
},
"PMASCANCLK1INV:PMASCANCLK1_B": {
"to_pin": "OUT",
"from_pin": "PMASCANCLK1_B"
},
"GTGREFCLK1INV:GTGREFCLK1_B": {
"to_pin": "OUT",
"from_pin": "GTGREFCLK1_B"
},
"PMASCANCLK0INV:PMASCANCLK0": {
"to_pin": "OUT",
"from_pin": "PMASCANCLK0"
},
"PMASCANCLK1INV:PMASCANCLK1": {
"to_pin": "OUT",
"from_pin": "PMASCANCLK1"
},
"PLL1LOCKDETCLKINV:PLL1LOCKDETCLK": {
"to_pin": "OUT",
"from_pin": "PLL1LOCKDETCLK"
}
},
"site_pins": {
"DRPDI5": {
"direction": "IN"
},
"PLLRSVD20": {
"direction": "IN"
},
"DMONITOROUT0": {
"DRPDO6": {
"direction": "OUT"
},
"PLL1REFCLKSEL1": {
"direction": "IN"
},
"DRPDI0": {
"direction": "IN"
},
"PLL0FBCLKLOST": {
"PMARSVDOUT9": {
"direction": "OUT"
},
"GTWESTREFCLK0": {
"DRPDI15": {
"direction": "IN"
},
"PMASCANIN3": {
"direction": "IN"
},
"DRPDI3": {
"direction": "IN"
},
"PMASCANCLK0": {
"direction": "IN"
},
"PLLRSVD113": {
"direction": "IN"
},
"PMARSVDOUT12": {
"direction": "OUT"
},
"PMARSVD1": {
"direction": "IN"
},
"PLLRSVD16": {
"direction": "IN"
},
"PLL0REFCLKSEL2": {
"direction": "IN"
},
"PMARSVDOUT10": {
"direction": "OUT"
},
"BGMONITORENB": {
"direction": "IN"
},
"PLLRSVD111": {
"direction": "IN"
},
"PLLRSVD10": {
"direction": "IN"
},
"BGRCALOVRD3": {
"direction": "IN"
},
"DRPADDR6": {
"direction": "IN"
},
"PLLCLKSPARE": {
"direction": "IN"
},
"REFCLKOUTMONITOR0": {
"direction": "OUT"
},
"DRPDI4": {
"direction": "IN"
},
"PMARSVD0": {
"direction": "IN"
},
"DRPDI7": {
"direction": "IN"
},
"DRPDI6": {
"direction": "IN"
},
"GTREFCLK1": {
"direction": "IN"
},
"PLLRSVD19": {
"direction": "IN"
},
"DMONITOROUT6": {
"direction": "OUT"
},
"PMARSVDOUT1": {
"direction": "OUT"
},
"DMONITOROUT2": {
"direction": "OUT"
},
"DRPDI11": {
"direction": "IN"
},
"DRPDI12": {
"direction": "IN"
},
"PLL0REFCLKSEL0": {
"direction": "IN"
},
"PMARSVD7": {
"direction": "IN"
},
"PMASCANIN1": {
"direction": "IN"
},
"PMARSVDOUT4": {
"direction": "OUT"
},
"PMARSVDOUT5": {
"direction": "OUT"
},
"DRPADDR4": {
"direction": "IN"
},
"PLLRSVD24": {
"direction": "IN"
},
"DRPDO7": {
"direction": "OUT"
},
"DRPDI8": {
"direction": "IN"
},
"BGRCALOVRDENB": {
"direction": "IN"
},
"DMONITOROUT1": {
"direction": "OUT"
},
"DRPDI13": {
"direction": "IN"
},
"PLLRSVD15": {
"direction": "IN"
},
"PLLRSVD17": {
"direction": "IN"
},
"PLL1REFCLKLOST": {
"direction": "OUT"
},
"PLL1RESET": {
"direction": "IN"
},
"DMONITOROUT7": {
"direction": "OUT"
},
"PLLRSVD114": {
"direction": "IN"
},
"DRPDO3": {
"direction": "OUT"
},
"PMARSVDOUT7": {
"direction": "OUT"
},
"PLL0REFCLKLOST": {
"direction": "OUT"
},
"PLLRSVD22": {
"DMONITOROUT6": {
"direction": "OUT"
},
"PLL1REFCLKLOST": {
"direction": "OUT"
},
"BGRCALOVRDENB": {
"direction": "IN"
},
"PLL1OUTCLK": {
"DMONITOROUT2": {
"direction": "OUT"
},
"DRPDO8": {
"DRPDO4": {
"direction": "OUT"
},
"GTEASTREFCLK1": {
"PLLRSVD21": {
"direction": "IN"
},
"DRPDO11": {
"PMARSVDOUT1": {
"direction": "OUT"
},
"PLL1FBCLKLOST": {
"PMARSVDOUT2": {
"direction": "OUT"
},
"BGRCALOVRD2": {
"direction": "IN"
},
"DRPRDY": {
"PMARSVDOUT0": {
"direction": "OUT"
},
"DRPDO1": {
"direction": "OUT"
},
"PMASCANCLK1": {
"BGRCALOVRD1": {
"direction": "IN"
},
"QDPMASCANRSTEN": {
"direction": "IN"
},
"DRPDI14": {
"direction": "IN"
},
"PMARSVD1": {
"direction": "IN"
},
"DRPDO5": {
"direction": "OUT"
},
"PMASCANCLK0": {
"direction": "IN"
},
"PMASCANIN4": {
"direction": "IN"
},
"PMARSVDOUT10": {
"direction": "OUT"
},
"DRPDI13": {
"direction": "IN"
},
"BGPDB": {
"direction": "IN"
},
"DRPDO12": {
"direction": "OUT"
},
"REFCLKOUTMONITOR1": {
"direction": "OUT"
},
"PLL1REFCLKSEL0": {
"PMARSVD5": {
"direction": "IN"
},
"DRPDI9": {
"DRPADDR6": {
"direction": "IN"
},
"PMARSVDOUT15": {
"PLL1PD": {
"direction": "IN"
},
"DRPDI4": {
"direction": "IN"
},
"BGRCALOVRD4": {
"direction": "IN"
},
"GTREFCLK1": {
"direction": "IN"
},
"DRPDO14": {
"direction": "OUT"
},
"PMARSVDOUT0": {
"PLL0LOCKEN": {
"direction": "IN"
},
"PLLRSVD24": {
"direction": "IN"
},
"DRPADDR2": {
"direction": "IN"
},
"PMARSVDOUT13": {
"direction": "OUT"
},
"PMARSVDOUT4": {
"direction": "OUT"
},
"PLL0REFCLKSEL2": {
"direction": "IN"
},
"PLLRSVD12": {
"direction": "IN"
},
"PMASCANENB": {
"direction": "IN"
},
"PLLRSVD113": {
"direction": "IN"
},
"PMARSVDOUT7": {
"direction": "OUT"
},
"BGBYPASSB": {
"direction": "IN"
},
"PLL0REFCLKSEL1": {
"direction": "IN"
},
"PLLRSVD20": {
"direction": "IN"
},
"PMARSVDOUT3": {
"direction": "OUT"
},
"PLL1LOCKDETCLK": {
"DRPDO8": {
"direction": "OUT"
},
"PMASCANOUT1": {
"direction": "OUT"
},
"PMARSVDOUT12": {
"direction": "OUT"
},
"PMARSVDOUT8": {
"direction": "OUT"
},
"PMASCANOUT2": {
"direction": "OUT"
},
"RCALENB": {
"direction": "IN"
},
"PMARSVD0": {
"direction": "IN"
},
"DRPDI10": {
"direction": "IN"
},
"PLLRSVD114": {
"direction": "IN"
},
"PLL0LOCKDETCLK": {
"direction": "IN"
},
"PLL1LOCK": {
"direction": "OUT"
},
"DRPADDR3": {
"direction": "IN"
},
"QDPMASCANMODEB": {
"direction": "IN"
},
"PLL0OUTREFCLK": {
"direction": "OUT"
},
"DRPDI0": {
"direction": "IN"
},
"PMASCANIN1": {
"direction": "IN"
},
"GTGREFCLK1": {
"direction": "IN"
},
"PMARSVDOUT5": {
"direction": "OUT"
},
"DRPDO1": {
"direction": "OUT"
},
"BGMONITORENB": {
"direction": "IN"
},
"PMARSVD4": {
"direction": "IN"
},
"PLLRSVD15": {
"direction": "IN"
},
"PLLRSVD115": {
"direction": "IN"
},
"PMASCANOUT3": {
"direction": "OUT"
},
"PLL1REFCLKSEL1": {
"direction": "IN"
},
"DMONITOROUT1": {
"direction": "OUT"
},
"PMARSVD7": {
"direction": "IN"
},
"DRPDI3": {
"direction": "IN"
},
"GTGREFCLK0": {
"direction": "IN"
},
"DRPCLK": {
"direction": "IN"
},
"PMARSVD2": {
"direction": "IN"
},
"DMONITOROUT3": {
"direction": "OUT"
},
"DRPDI6": {
"direction": "IN"
},
"PLL0PD": {
"direction": "IN"
},
"PLL0REFCLKSEL0": {
"direction": "IN"
},
"DRPDI9": {
"direction": "IN"
},
"DRPDI2": {
"direction": "IN"
},
"DRPEN": {
"direction": "IN"
},
"PLL0LOCK": {
"direction": "OUT"
},
"PLLRSVD14": {
"direction": "IN"
},
"DRPDO9": {
"direction": "OUT"
},
"DRPDO14": {
"PLLRSVD16": {
"direction": "IN"
},
"GTEASTREFCLK0": {
"direction": "IN"
},
"DRPDO11": {
"direction": "OUT"
},
"PMARSVDOUT2": {
"PLL1OUTREFCLK": {
"direction": "OUT"
},
"PLLCLKSPARE": {
"direction": "IN"
},
"DRPDI11": {
"direction": "IN"
},
"PLL1OUTCLK": {
"direction": "OUT"
},
"DMONITOROUT7": {
"direction": "OUT"
},
"PMARSVD3": {
"direction": "IN"
},
"DRPADDR0": {
"direction": "IN"
},
"DRPADDR1": {
"direction": "IN"
},
"PLLRSVD111": {
"direction": "IN"
},
"PLL1LOCKDETCLK": {
"direction": "IN"
},
"PLL1LOCKEN": {
"direction": "IN"
},
"BGRCALOVRD3": {
"direction": "IN"
},
"PMASCANIN3": {
"direction": "IN"
},
"DRPDI12": {
"direction": "IN"
},
"PMARSVD6": {
"direction": "IN"
},
"DMONITOROUT0": {
"direction": "OUT"
},
"PMARSVDOUT14": {
@ -237,306 +397,146 @@
"GTREFCLK0": {
"direction": "IN"
},
"PLL1LOCKEN": {
"DRPDI7": {
"direction": "IN"
},
"DRPDO10": {
"direction": "OUT"
},
"GTGREFCLK0": {
"direction": "IN"
},
"PLLRSVD23": {
"direction": "IN"
},
"DRPDO4": {
"direction": "OUT"
},
"PMARSVDOUT11": {
"direction": "OUT"
},
"PLLRSVD11": {
"direction": "IN"
},
"PMARSVDOUT9": {
"direction": "OUT"
},
"DMONITOROUT3": {
"direction": "OUT"
},
"RCALENB": {
"direction": "IN"
},
"PMASCANOUT0": {
"direction": "OUT"
},
"BGRCALOVRD4": {
"direction": "IN"
},
"DRPDO5": {
"direction": "OUT"
},
"PLLRSVD14": {
"direction": "IN"
},
"DRPCLK": {
"direction": "IN"
},
"PMARSVD5": {
"direction": "IN"
},
"PMARSVD6": {
"direction": "IN"
},
"DRPEN": {
"direction": "IN"
},
"DRPADDR0": {
"direction": "IN"
},
"DRPADDR7": {
"direction": "IN"
},
"PMASCANIN2": {
"direction": "IN"
},
"PMARSVDOUT13": {
"direction": "OUT"
},
"DMONITOROUT5": {
"direction": "OUT"
},
"QDPMASCANRSTEN": {
"direction": "IN"
},
"DMONITOROUT4": {
"direction": "OUT"
},
"PMASCANOUT1": {
"direction": "OUT"
},
"DRPADDR5": {
"direction": "IN"
},
"DRPADDR1": {
"direction": "IN"
},
"PLL0LOCK": {
"PMARSVDOUT11": {
"direction": "OUT"
},
"BGRCALOVRD1": {
"GTEASTREFCLK1": {
"direction": "IN"
},
"PMASCANIN0": {
"PLLRSVD19": {
"direction": "IN"
},
"PMARSVD3": {
"direction": "IN"
},
"DRPWE": {
"direction": "IN"
},
"PLL1REFCLKSEL2": {
"direction": "IN"
},
"BGBYPASSB": {
"direction": "IN"
},
"PMARSVDOUT6": {
"direction": "OUT"
},
"GTEASTREFCLK0": {
"direction": "IN"
},
"PLL1OUTREFCLK": {
"direction": "OUT"
},
"DRPDI1": {
"direction": "IN"
},
"QDPMASCANMODEB": {
"direction": "IN"
},
"PLLRSVD21": {
"direction": "IN"
},
"DRPDO2": {
"direction": "OUT"
},
"DRPDO12": {
"direction": "OUT"
},
"PMASCANOUT4": {
"direction": "OUT"
},
"PMASCANENB": {
"direction": "IN"
},
"PLL0OUTREFCLK": {
"direction": "OUT"
},
"BGPDB": {
"direction": "IN"
},
"GTGREFCLK1": {
"direction": "IN"
},
"PLLRSVD115": {
"direction": "IN"
},
"DRPDI2": {
"direction": "IN"
},
"BGRCALOVRD0": {
"direction": "IN"
},
"DRPADDR2": {
"direction": "IN"
},
"DRPDI10": {
"direction": "IN"
},
"PLL0REFCLKSEL1": {
"direction": "IN"
},
"PMARSVD4": {
"direction": "IN"
},
"PLLRSVD12": {
"direction": "IN"
},
"DRPDI14": {
"direction": "IN"
},
"PLL1PD": {
"direction": "IN"
},
"PMASCANIN4": {
"direction": "IN"
},
"DRPDO0": {
"direction": "OUT"
},
"PLL0PD": {
"direction": "IN"
},
"PMARSVD2": {
"direction": "IN"
},
"PLL0LOCKDETCLK": {
"direction": "IN"
},
"PMASCANOUT3": {
"direction": "OUT"
},
"PMARSVDOUT8": {
"direction": "OUT"
},
"DRPDO15": {
"direction": "OUT"
},
"GTWESTREFCLK1": {
"direction": "IN"
},
"DRPDI15": {
"direction": "IN"
},
"PLL0LOCKEN": {
"direction": "IN"
},
"DRPADDR3": {
"direction": "IN"
},
"PMASCANOUT2": {
"direction": "OUT"
},
"PLLRSVD13": {
"direction": "IN"
},
"DRPDO6": {
"direction": "OUT"
},
"DRPDO13": {
"direction": "OUT"
},
"PLLRSVD112": {
"direction": "IN"
},
"PLLRSVD110": {
"direction": "IN"
},
"PLL0RESET": {
"direction": "IN"
},
"BGRCALOVRD0": {
"direction": "IN"
},
"PLLRSVD23": {
"direction": "IN"
},
"PLL0OUTCLK": {
"direction": "OUT"
},
"DRPADDR4": {
"direction": "IN"
},
"PLL1REFCLKSEL0": {
"direction": "IN"
},
"PMARSVDOUT15": {
"direction": "OUT"
},
"PMASCANIN2": {
"direction": "IN"
},
"DRPWE": {
"direction": "IN"
},
"PLL1RESET": {
"direction": "IN"
},
"PLLRSVD17": {
"direction": "IN"
},
"DRPDI8": {
"direction": "IN"
},
"DRPDO7": {
"direction": "OUT"
},
"PLL1REFCLKSEL2": {
"direction": "IN"
},
"DRPDO3": {
"direction": "OUT"
},
"GTWESTREFCLK1": {
"direction": "IN"
},
"DRPDO2": {
"direction": "OUT"
},
"DRPDO13": {
"direction": "OUT"
},
"PLLRSVD18": {
"direction": "IN"
}
},
"type": "GTPE2_COMMON",
"site_pips": {
"PMASCANCLK0INV:PMASCANCLK0_B": {
"from_pin": "PMASCANCLK0_B",
"to_pin": "OUT"
},
"PLL0LOCKDETCLKINV:PLL0LOCKDETCLK_B": {
"from_pin": "PLL0LOCKDETCLK_B",
"to_pin": "OUT"
"DRPDI1": {
"direction": "IN"
},
"PMASCANCLK0INV:PMASCANCLK0": {
"from_pin": "PMASCANCLK0",
"to_pin": "OUT"
"DMONITOROUT4": {
"direction": "OUT"
},
"GTGREFCLK1INV:GTGREFCLK1_B": {
"from_pin": "GTGREFCLK1_B",
"to_pin": "OUT"
"PMASCANOUT4": {
"direction": "OUT"
},
"PLL1LOCKDETCLKINV:PLL1LOCKDETCLK_B": {
"from_pin": "PLL1LOCKDETCLK_B",
"to_pin": "OUT"
"PLL1FBCLKLOST": {
"direction": "OUT"
},
"PLLCLKSPAREINV:PLLCLKSPARE_B": {
"from_pin": "PLLCLKSPARE_B",
"to_pin": "OUT"
"DRPDO0": {
"direction": "OUT"
},
"DRPCLKINV:DRPCLK": {
"from_pin": "DRPCLK",
"to_pin": "OUT"
"DRPRDY": {
"direction": "OUT"
},
"PMASCANCLK1INV:PMASCANCLK1": {
"from_pin": "PMASCANCLK1",
"to_pin": "OUT"
"PMARSVDOUT6": {
"direction": "OUT"
},
"DRPCLKINV:DRPCLK_B": {
"from_pin": "DRPCLK_B",
"to_pin": "OUT"
"PMASCANIN0": {
"direction": "IN"
},
"PLL1LOCKDETCLKINV:PLL1LOCKDETCLK": {
"from_pin": "PLL1LOCKDETCLK",
"to_pin": "OUT"
"PLLRSVD110": {
"direction": "IN"
},
"GTGREFCLK0INV:GTGREFCLK0_B": {
"from_pin": "GTGREFCLK0_B",
"to_pin": "OUT"
"REFCLKOUTMONITOR0": {
"direction": "OUT"
},
"PLLCLKSPAREINV:PLLCLKSPARE": {
"from_pin": "PLLCLKSPARE",
"to_pin": "OUT"
"DMONITOROUT5": {
"direction": "OUT"
},
"GTGREFCLK1INV:GTGREFCLK1": {
"from_pin": "GTGREFCLK1",
"to_pin": "OUT"
"PMASCANCLK1": {
"direction": "IN"
},
"PLL0LOCKDETCLKINV:PLL0LOCKDETCLK": {
"from_pin": "PLL0LOCKDETCLK",
"to_pin": "OUT"
"PLLRSVD10": {
"direction": "IN"
},
"PMASCANCLK1INV:PMASCANCLK1_B": {
"from_pin": "PMASCANCLK1_B",
"to_pin": "OUT"
"GTWESTREFCLK0": {
"direction": "IN"
},
"GTGREFCLK0INV:GTGREFCLK0": {
"from_pin": "GTGREFCLK0",
"to_pin": "OUT"
"PLLRSVD11": {
"direction": "IN"
},
"DRPDO10": {
"direction": "OUT"
},
"DRPADDR7": {
"direction": "IN"
},
"PLL0FBCLKLOST": {
"direction": "OUT"
},
"PLLRSVD22": {
"direction": "IN"
},
"PMASCANOUT0": {
"direction": "OUT"
},
"DRPDO15": {
"direction": "OUT"
},
"PLLRSVD112": {
"direction": "IN"
}
}
}

32
artix7/site_type_IBUFDS_GTE2.json
View File

@ -1,33 +1,33 @@
{
"type": "IBUFDS_GTE2",
"site_pips": {
"CLKTESTSIGINV:CLKTESTSIG_B": {
"to_pin": "OUT",
"from_pin": "CLKTESTSIG_B"
},
"CLKTESTSIGINV:CLKTESTSIG": {
"to_pin": "OUT",
"from_pin": "CLKTESTSIG"
}
},
"site_pins": {
"O": {
"direction": "OUT"
},
"CEB": {
"direction": "IN"
},
"I": {
"IB": {
"direction": "IN"
},
"CLKTESTSIG": {
"direction": "IN"
},
"IB": {
"I": {
"direction": "IN"
},
"CEB": {
"direction": "IN"
},
"ODIV2": {
"direction": "OUT"
}
},
"type": "IBUFDS_GTE2",
"site_pips": {
"CLKTESTSIGINV:CLKTESTSIG": {
"from_pin": "CLKTESTSIG",
"to_pin": "OUT"
},
"CLKTESTSIGINV:CLKTESTSIG_B": {
"from_pin": "CLKTESTSIG_B",
"to_pin": "OUT"
}
}
}

314
artix7/site_type_ICAP.json
View File

@ -1,123 +1,149 @@
{
"type": "ICAP",
"site_pips": {},
"site_pins": {
"O10": {
"direction": "OUT"
},
"I1": {
"direction": "IN"
},
"O31": {
"direction": "OUT"
},
"I6": {
"direction": "IN"
},
"O7": {
"direction": "OUT"
},
"I17": {
"direction": "IN"
},
"O25": {
"direction": "OUT"
},
"CLK": {
"direction": "IN"
},
"I5": {
"direction": "IN"
},
"I21": {
"direction": "IN"
},
"I26": {
"direction": "IN"
},
"I4": {
"direction": "IN"
},
"O4": {
"direction": "OUT"
},
"I30": {
"direction": "IN"
},
"I9": {
"direction": "IN"
},
"O1": {
"direction": "OUT"
},
"I16": {
"direction": "IN"
},
"I18": {
"direction": "IN"
},
"I7": {
"direction": "IN"
},
"O27": {
"direction": "OUT"
},
"O17": {
"direction": "OUT"
},
"I8": {
"direction": "IN"
},
"I19": {
"direction": "IN"
},
"O11": {
"direction": "OUT"
},
"I23": {
"direction": "IN"
},
"I28": {
"direction": "IN"
},
"RDWRB": {
"direction": "IN"
},
"O2": {
"direction": "OUT"
},
"O18": {
"direction": "OUT"
},
"I2": {
"direction": "IN"
},
"O0": {
"direction": "OUT"
},
"I13": {
"direction": "IN"
},
"I31": {
"direction": "IN"
},
"O8": {
"direction": "OUT"
},
"I10": {
"CSIB": {
"direction": "IN"
},
"I0": {
"direction": "IN"
},
"O19": {
"O26": {
"direction": "OUT"
},
"O4": {
"direction": "OUT"
},
"I3": {
"direction": "IN"
},
"I22": {
"direction": "IN"
},
"O16": {
"direction": "OUT"
},
"I24": {
"direction": "IN"
},
"O9": {
"direction": "OUT"
},
"I11": {
"direction": "IN"
},
"O7": {
"direction": "OUT"
},
"O3": {
"direction": "OUT"
},
"O13": {
"direction": "OUT"
},
"O23": {
"direction": "OUT"
},
"O6": {
"direction": "OUT"
},
"O10": {
"direction": "OUT"
},
"O11": {
"direction": "OUT"
},
"RDWRB": {
"direction": "IN"
},
"I28": {
"direction": "IN"
},
"I8": {
"direction": "IN"
},
"O27": {
"direction": "OUT"
},
"I9": {
"direction": "IN"
},
"I7": {
"direction": "IN"
},
"O8": {
"direction": "OUT"
},
"I12": {
"direction": "IN"
},
"I29": {
"direction": "IN"
},
"O24": {
"direction": "OUT"
},
"O23": {
"O31": {
"direction": "OUT"
},
"O30": {
"direction": "OUT"
},
"I21": {
"direction": "IN"
},
"I20": {
"direction": "IN"
},
"I31": {
"direction": "IN"
},
"I30": {
"direction": "IN"
},
"I1": {
"direction": "IN"
},
"I23": {
"direction": "IN"
},
"I26": {
"direction": "IN"
},
"O1": {
"direction": "OUT"
},
"O0": {
"direction": "OUT"
},
"O12": {
"direction": "OUT"
},
"O5": {
"direction": "OUT"
},
"O29": {
"direction": "OUT"
},
"O2": {
"direction": "OUT"
},
"I19": {
"direction": "IN"
},
"O25": {
"direction": "OUT"
},
"I6": {
"direction": "IN"
},
"I10": {
"direction": "IN"
},
"O21": {
"direction": "OUT"
},
"O18": {
"direction": "OUT"
},
"I15": {
@ -126,82 +152,56 @@
"O20": {
"direction": "OUT"
},
"I27": {
"O17": {
"direction": "OUT"
},
"I18": {
"direction": "IN"
},
"O9": {
"direction": "OUT"
},
"I29": {
"direction": "IN"
},
"O12": {
"direction": "OUT"
},
"O14": {
"direction": "OUT"
},
"I24": {
"direction": "IN"
},
"O6": {
"direction": "OUT"
},
"O22": {
"direction": "OUT"
},
"O5": {
"direction": "OUT"
},
"I22": {
"I2": {
"direction": "IN"
},
"O28": {
"direction": "OUT"
},
"O21": {
"direction": "OUT"
},
"O29": {
"direction": "OUT"
},
"I20": {
"I17": {
"direction": "IN"
},
"I12": {
"I5": {
"direction": "IN"
},
"O15": {
"O22": {
"direction": "OUT"
},
"O26": {
"direction": "OUT"
},
"I14": {
"I13": {
"direction": "IN"
},
"O16": {
"O14": {
"direction": "OUT"
},
"O30": {
"direction": "OUT"
},
"O3": {
"direction": "OUT"
},
"CSIB": {
"I4": {
"direction": "IN"
},
"I25": {
"direction": "IN"
},
"I11": {
"I16": {
"direction": "IN"
},
"I3": {
"O15": {
"direction": "OUT"
},
"O19": {
"direction": "OUT"
},
"I27": {
"direction": "IN"
},
"I14": {
"direction": "IN"
},
"CLK": {
"direction": "IN"
}
},
"type": "ICAP",
"site_pips": {}
}
}

22
artix7/site_type_IDELAYCTRL.json
View File

@ -1,13 +1,15 @@
{
"type": "IDELAYCTRL",
"site_pips": {},
"site_pins": {
"UPPULSEOUT": {
"direction": "OUT"
},
"OUTN65": {
"direction": "OUT"
"RST": {
"direction": "IN"
},
"OUTN1": {
"direction": "OUT"
"REFCLK": {
"direction": "IN"
},
"DNPULSEOUT": {
"direction": "OUT"
@ -15,13 +17,11 @@
"RDY": {
"direction": "OUT"
},
"REFCLK": {
"direction": "IN"
"OUTN1": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
"OUTN65": {
"direction": "OUT"
}
},
"type": "IDELAYCTRL",
"site_pips": {}
}
}

112
artix7/site_type_IDELAYE2.json
View File

@ -1,21 +1,48 @@
{
"type": "IDELAYE2",
"site_pips": {
"CINV:C_B": {
"to_pin": "OUT",
"from_pin": "C_B"
},
"IDATAININV:IDATAIN_B": {
"to_pin": "OUT",
"from_pin": "IDATAIN_B"
},
"DATAININV:DATAIN": {
"to_pin": "OUT",
"from_pin": "DATAIN"
},
"IDATAININV:IDATAIN": {
"to_pin": "OUT",
"from_pin": "IDATAIN"
},
"CINV:C": {
"to_pin": "OUT",
"from_pin": "C"
},
"DATAININV:DATAIN_B": {
"to_pin": "OUT",
"from_pin": "DATAIN_B"
}
},
"site_pins": {
"CE": {
"LDPIPEEN": {
"direction": "IN"
},
"CNTVALUEIN3": {
"CNTVALUEIN4": {
"direction": "IN"
},
"CINVCTRL": {
"IDATAIN": {
"direction": "IN"
},
"LD": {
"direction": "IN"
"CNTVALUEOUT0": {
"direction": "OUT"
},
"DATAOUT": {
"direction": "OUT"
},
"IFDLY0": {
"CNTVALUEIN3": {
"direction": "IN"
},
"REGRST": {
@ -24,77 +51,50 @@
"IFDLY1": {
"direction": "IN"
},
"CNTVALUEOUT0": {
"CNTVALUEOUT2": {
"direction": "OUT"
},
"IDATAIN": {
"direction": "IN"
},
"CNTVALUEIN0": {
"CINVCTRL": {
"direction": "IN"
},
"INC": {
"direction": "IN"
},
"CNTVALUEOUT1": {
"direction": "OUT"
},
"CNTVALUEOUT3": {
"direction": "OUT"
},
"C": {
"direction": "IN"
},
"IFDLY2": {
"direction": "IN"
},
"DATAIN": {
"direction": "IN"
},
"LDPIPEEN": {
"CE": {
"direction": "IN"
},
"CNTVALUEIN1": {
"direction": "IN"
},
"CNTVALUEIN4": {
"LD": {
"direction": "IN"
},
"CNTVALUEOUT4": {
"direction": "OUT"
},
"CNTVALUEOUT3": {
"direction": "OUT"
},
"DATAIN": {
"direction": "IN"
},
"CNTVALUEIN2": {
"direction": "IN"
},
"CNTVALUEOUT2": {
"C": {
"direction": "IN"
},
"CNTVALUEOUT1": {
"direction": "OUT"
},
"CNTVALUEOUT4": {
"direction": "OUT"
}
},
"type": "IDELAYE2",
"site_pips": {
"DATAININV:DATAIN_B": {
"from_pin": "DATAIN_B",
"to_pin": "OUT"
"CNTVALUEIN0": {
"direction": "IN"
},
"IDATAININV:IDATAIN_B": {
"from_pin": "IDATAIN_B",
"to_pin": "OUT"
"IFDLY0": {
"direction": "IN"
},
"DATAININV:DATAIN": {
"from_pin": "DATAIN",
"to_pin": "OUT"
},
"IDATAININV:IDATAIN": {
"from_pin": "IDATAIN",
"to_pin": "OUT"
},
"CINV:C": {
"from_pin": "C",
"to_pin": "OUT"
},
"CINV:C_B": {
"from_pin": "C_B",
"to_pin": "OUT"
"IFDLY2": {
"direction": "IN"
}
}
}

336
artix7/site_type_ILOGICE3.json
View File

@ -1,208 +1,208 @@
{
"type": "ILOGICE3",
"site_pips": {
"CLKBINV:CLKB_B": {
"to_pin": "OUT",
"from_pin": "CLKB_B"
},
"CLKINV:CLK": {
"to_pin": "OUT",
"from_pin": "CLK"
},
"ZHOLD_IFF_INV:D": {
"to_pin": "OUT",
"from_pin": "D"
},
"ZHOLD_FABRIC_INV:D_B": {
"to_pin": "OUT",
"from_pin": "D_B"
},
"D2OBYP_SEL:T": {
"to_pin": "OUT",
"from_pin": "T"
},
"CLKINV:CLK_B": {
"to_pin": "OUT",
"from_pin": "CLK_B"
},
"IDELMUXE3:2": {
"to_pin": "OUT",
"from_pin": "2"
},
"IFFMUX:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"D2OFFBYP_SEL:T": {
"to_pin": "OUT",
"from_pin": "T"
},
"IFFMUX:1": {
"to_pin": "OUT",
"from_pin": "1"
},
"CLKBINV:CLKB": {
"to_pin": "OUT",
"from_pin": "CLKB"
},
"IMUX:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"D2OFFBYP_SEL:GND": {
"to_pin": "OUT",
"from_pin": "GND"
},
"IFFDELMUXE3:1": {
"to_pin": "OUT",
"from_pin": "1"
},
"DINV:D_B": {
"to_pin": "OUT",
"from_pin": "D_B"
},
"IMUX:1": {
"to_pin": "OUT",
"from_pin": "1"
},
"IFFDELMUXE3:2": {
"to_pin": "OUT",
"from_pin": "2"
},
"ZHOLD_IFF_INV:D_B": {
"to_pin": "OUT",
"from_pin": "D_B"
},
"CE1USED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"IDELMUXE3:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"DINV:D": {
"to_pin": "OUT",
"from_pin": "D"
},
"ZHOLD_FABRIC_INV:D": {
"to_pin": "OUT",
"from_pin": "D"
},
"IFFDELMUXE3:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"REVUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"SRUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"IDELMUXE3:1": {
"to_pin": "OUT",
"from_pin": "1"
},
"D2OBYP_SEL:GND": {
"to_pin": "OUT",
"from_pin": "GND"
}
},
"site_pins": {
"REV": {
"direction": "IN"
},
"CLKDIVP": {
"direction": "IN"
},
"SHIFTIN2": {
"direction": "IN"
},
"OCLKB": {
"direction": "IN"
},
"CE2": {
"direction": "IN"
},
"OCLK": {
"direction": "IN"
},
"D": {
"direction": "IN"
},
"DDLY": {
"direction": "IN"
},
"DYNCLKSEL": {
"direction": "IN"
},
"CLK": {
"direction": "IN"
},
"DYNCLKDIVSEL": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"Q1": {
"direction": "OUT"
},
"Q5": {
"direction": "OUT"
},
"SR": {
"direction": "IN"
},
"Q8": {
"direction": "OUT"
},
"CLKDIV": {
"direction": "IN"
},
"TFB": {
"direction": "IN"
},
"CE1": {
"direction": "IN"
},
"SHIFTOUT2": {
"direction": "OUT"
},
"Q3": {
"direction": "OUT"
},
"Q4": {
"direction": "OUT"
},
"SHIFTOUT1": {
"direction": "OUT"
},
"Q2": {
"direction": "OUT"
},
"Q3": {
"direction": "OUT"
},
"OCLKB": {
"direction": "IN"
},
"CLKDIVP": {
"direction": "IN"
},
"CLKB": {
"direction": "IN"
},
"Q6": {
"BITSLIP": {
"direction": "IN"
},
"DYNCLKSEL": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"DYNCLKDIVPSEL": {
"REV": {
"direction": "IN"
},
"Q7": {
"direction": "OUT"
},
"DYNCLKDIVSEL": {
"direction": "IN"
},
"D": {
"direction": "IN"
},
"SHIFTIN1": {
"direction": "IN"
},
"SHIFTOUT1": {
"direction": "OUT"
},
"TFB": {
"direction": "IN"
},
"Q5": {
"direction": "OUT"
},
"OCLK": {
"direction": "IN"
},
"Q6": {
"direction": "OUT"
},
"SHIFTOUT2": {
"direction": "OUT"
},
"OFB": {
"direction": "IN"
},
"BITSLIP": {
"Q1": {
"direction": "OUT"
},
"SHIFTIN2": {
"direction": "IN"
}
},
"type": "ILOGICE3",
"site_pips": {
"IDELMUXE3:2": {
"from_pin": "2",
"to_pin": "OUT"
},
"IFFDELMUXE3:0": {
"from_pin": "0",
"to_pin": "OUT"
"SR": {
"direction": "IN"
},
"IMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
"CE2": {
"direction": "IN"
},
"ZHOLD_IFF_INV:D_B": {
"from_pin": "D_B",
"to_pin": "OUT"
"DYNCLKDIVPSEL": {
"direction": "IN"
},
"D2OFFBYP_SEL:T": {
"from_pin": "T",
"to_pin": "OUT"
"DDLY": {
"direction": "IN"
},
"IFFDELMUXE3:2": {
"from_pin": "2",
"to_pin": "OUT"
"CLK": {
"direction": "IN"
},
"ZHOLD_FABRIC_INV:D_B": {
"from_pin": "D_B",
"to_pin": "OUT"
},
"IFFDELMUXE3:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"IFFMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"ZHOLD_IFF_INV:D": {
"from_pin": "D",
"to_pin": "OUT"
},
"CLKBINV:CLKB": {
"from_pin": "CLKB",
"to_pin": "OUT"
},
"ZHOLD_FABRIC_INV:D": {
"from_pin": "D",
"to_pin": "OUT"
},
"D2OFFBYP_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"D2OBYP_SEL:T": {
"from_pin": "T",
"to_pin": "OUT"
},
"REVUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"DINV:D_B": {
"from_pin": "D_B",
"to_pin": "OUT"
},
"IFFMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"IMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"CLKBINV:CLKB_B": {
"from_pin": "CLKB_B",
"to_pin": "OUT"
},
"DINV:D": {
"from_pin": "D",
"to_pin": "OUT"
},
"IDELMUXE3:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"SRUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"D2OBYP_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"CLKINV:CLK_B": {
"from_pin": "CLK_B",
"to_pin": "OUT"
},
"CLKINV:CLK": {
"from_pin": "CLK",
"to_pin": "OUT"
},
"CE1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IDELMUXE3:0": {
"from_pin": "0",
"to_pin": "OUT"
"CLKDIV": {
"direction": "IN"
}
}
}

734
artix7/site_type_IN_FIFO.json
View File

@ -1,402 +1,230 @@
{
"type": "IN_FIFO",
"site_pips": {},
"site_pins": {
"Q57": {
"direction": "OUT"
},
"Q90": {
"direction": "OUT"
},
"Q26": {
"direction": "OUT"
},
"Q75": {
"direction": "OUT"
},
"Q15": {
"direction": "OUT"
},
"Q61": {
"direction": "OUT"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
"Q34": {
"direction": "OUT"
},
"Q50": {
"direction": "OUT"
},
"Q07": {
"direction": "OUT"
},
"D22": {
"SCANIN2": {
"direction": "IN"
},
"Q95": {
"direction": "OUT"
},
"Q65": {
"direction": "OUT"
},
"Q93": {
"direction": "OUT"
},
"Q40": {
"direction": "OUT"
},
"EMPTY": {
"direction": "OUT"
},
"D13": {
"direction": "IN"
},
"D54": {
"direction": "IN"
},
"D64": {
"direction": "IN"
},
"Q66": {
"direction": "OUT"
},
"D01": {
"direction": "IN"
},
"Q27": {
"direction": "OUT"
},
"D65": {
"direction": "IN"
},
"D52": {
"direction": "IN"
},
"D41": {
"direction": "IN"
},
"Q43": {
"direction": "OUT"
},
"Q32": {
"direction": "OUT"
},
"Q20": {
"direction": "OUT"
},
"D93": {
"direction": "IN"
},
"D51": {
"direction": "IN"
},
"Q80": {
"direction": "OUT"
},
"Q56": {
"direction": "OUT"
},
"D92": {
"direction": "IN"
},
"Q11": {
"direction": "OUT"
},
"Q53": {
"direction": "OUT"
},
"D82": {
"direction": "IN"
},
"D00": {
"direction": "IN"
},
"SCANOUT0": {
"direction": "OUT"
},
"Q73": {
"direction": "OUT"
},
"TESTMODEB": {
"direction": "IN"
},
"RESET": {
"direction": "IN"
},
"Q25": {
"direction": "OUT"
},
"D81": {
"direction": "IN"
},
"FULL": {
"direction": "OUT"
},
"Q60": {
"direction": "OUT"
},
"D42": {
"direction": "IN"
},
"D20": {
"direction": "IN"
},
"Q47": {
"direction": "OUT"
},
"D80": {
"direction": "IN"
},
"D66": {
"direction": "IN"
},
"Q62": {
"direction": "OUT"
},
"Q14": {
"direction": "OUT"
},
"Q63": {
"direction": "OUT"
},
"D30": {
"direction": "IN"
},
"Q84": {
"direction": "OUT"
},
"Q76": {
"direction": "OUT"
},
"Q74": {
"direction": "OUT"
},
"Q16": {
"direction": "OUT"
},
"D55": {
"direction": "IN"
},
"Q77": {
"direction": "OUT"
},
"D62": {
"direction": "IN"
},
"Q55": {
"direction": "OUT"
},
"Q05": {
"direction": "OUT"
},
"RDCLK": {
"direction": "IN"
},
"Q46": {
"direction": "OUT"
},
"Q23": {
"direction": "OUT"
},
"Q82": {
"direction": "OUT"
},
"Q12": {
"direction": "OUT"
},
"Q30": {
"direction": "OUT"
},
"D32": {
"direction": "IN"
},
"D56": {
"direction": "IN"
},
"Q87": {
"direction": "OUT"
},
"D03": {
"direction": "IN"
},
"Q33": {
"direction": "OUT"
},
"Q42": {
"direction": "OUT"
},
"D60": {
"direction": "IN"
},
"D31": {
"direction": "IN"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"Q17": {
"direction": "OUT"
},
"Q44": {
"direction": "OUT"
},
"Q01": {
"direction": "OUT"
},
"SCANIN1": {
"direction": "IN"
},
"D71": {
"direction": "IN"
},
"Q36": {
"direction": "OUT"
},
"Q85": {
"direction": "OUT"
},
"Q97": {
"direction": "OUT"
},
"Q94": {
"direction": "OUT"
},
"D67": {
"direction": "IN"
},
"Q35": {
"direction": "OUT"
},
"D02": {
"direction": "IN"
},
"Q06": {
"direction": "OUT"
},
"Q24": {
"direction": "OUT"
},
"Q54": {
"direction": "OUT"
},
"D72": {
"direction": "IN"
},
"Q51": {
"direction": "OUT"
},
"Q03": {
"direction": "OUT"
},
"Q45": {
"direction": "OUT"
},
"Q92": {
"direction": "OUT"
},
"SCANOUT1": {
"Q83": {
"direction": "OUT"
},
"Q67": {
"direction": "OUT"
},
"D50": {
"D31": {
"direction": "IN"
},
"Q86": {
"Q62": {
"direction": "OUT"
},
"Q96": {
"direction": "OUT"
},
"D83": {
"D12": {
"direction": "IN"
},
"Q41": {
"direction": "OUT"
},
"SCANOUT3": {
"direction": "OUT"
},
"D23": {
"D67": {
"direction": "IN"
},
"D73": {
"Q14": {
"direction": "OUT"
},
"D81": {
"direction": "IN"
},
"Q21": {
"direction": "OUT"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
"D13": {
"direction": "IN"
},
"D72": {
"direction": "IN"
},
"D61": {
"direction": "IN"
},
"Q81": {
"direction": "OUT"
},
"Q21": {
"D22": {
"direction": "IN"
},
"Q71": {
"direction": "OUT"
},
"Q83": {
"Q05": {
"direction": "OUT"
},
"D61": {
"direction": "IN"
},
"D21": {
"direction": "IN"
},
"Q00": {
"direction": "OUT"
},
"SCANOUT2": {
"direction": "OUT"
},
"D91": {
"direction": "IN"
},
"D10": {
"direction": "IN"
},
"D43": {
"direction": "IN"
},
"Q70": {
"direction": "OUT"
},
"D57": {
"direction": "IN"
},
"Q10": {
"Q32": {
"direction": "OUT"
},
"TESTREADDISB": {
"direction": "IN"
},
"TESTWRITEDISB": {
"direction": "IN"
},
"Q52": {
"Q10": {
"direction": "OUT"
},
"RDEN": {
"D20": {
"direction": "IN"
},
"WREN": {
"Q70": {
"direction": "OUT"
},
"SCANIN1": {
"direction": "IN"
},
"Q02": {
"SCANENB": {
"direction": "IN"
},
"D02": {
"direction": "IN"
},
"D80": {
"direction": "IN"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"Q37": {
"Q84": {
"direction": "OUT"
},
"Q71": {
"D73": {
"direction": "IN"
},
"Q43": {
"direction": "OUT"
},
"Q55": {
"direction": "OUT"
},
"Q13": {
"direction": "OUT"
},
"SCANOUT1": {
"direction": "OUT"
},
"Q22": {
"direction": "OUT"
},
"SCANOUT2": {
"direction": "OUT"
},
"TESTMODEB": {
"direction": "IN"
},
"D66": {
"direction": "IN"
},
"Q65": {
"direction": "OUT"
},
"Q47": {
"direction": "OUT"
},
"FULL": {
"direction": "OUT"
},
"Q15": {
"direction": "OUT"
},
"Q30": {
"direction": "OUT"
},
"D21": {
"direction": "IN"
},
"D92": {
"direction": "IN"
},
"Q04": {
"direction": "OUT"
},
"Q51": {
"direction": "OUT"
},
"D53": {
"direction": "IN"
},
"Q56": {
"direction": "OUT"
},
"Q90": {
"direction": "OUT"
},
"Q96": {
"direction": "OUT"
},
"D65": {
"direction": "IN"
},
"RDCLK": {
"direction": "IN"
},
"Q92": {
"direction": "OUT"
},
"D32": {
"direction": "IN"
},
"D60": {
"direction": "IN"
},
"Q27": {
"direction": "OUT"
},
"Q02": {
"direction": "OUT"
},
"Q64": {
"direction": "OUT"
},
"Q20": {
"direction": "OUT"
},
"D90": {
"direction": "IN"
},
"D40": {
"Q00": {
"direction": "OUT"
},
"Q87": {
"direction": "OUT"
},
"D42": {
"direction": "IN"
},
"Q31": {
"WREN": {
"direction": "IN"
},
"D51": {
"direction": "IN"
},
"D10": {
"direction": "IN"
},
"Q91": {
"direction": "OUT"
},
"Q61": {
"direction": "OUT"
},
"D01": {
"direction": "IN"
},
"D71": {
"direction": "IN"
},
"Q16": {
"direction": "OUT"
},
"Q57": {
"direction": "OUT"
},
"Q74": {
"direction": "OUT"
},
"Q34": {
"direction": "OUT"
},
"SCANIN0": {
@ -405,49 +233,221 @@
"D70": {
"direction": "IN"
},
"Q13": {
"Q66": {
"direction": "OUT"
},
"SCANIN3": {
"Q42": {
"direction": "OUT"
},
"Q11": {
"direction": "OUT"
},
"D91": {
"direction": "IN"
},
"D12": {
"direction": "IN"
},
"Q64": {
"Q80": {
"direction": "OUT"
},
"WRCLK": {
"direction": "IN"
},
"D53": {
"Q82": {
"direction": "OUT"
},
"D03": {
"direction": "IN"
},
"Q26": {
"direction": "OUT"
},
"SCANIN3": {
"direction": "IN"
},
"Q97": {
"direction": "OUT"
},
"Q06": {
"direction": "OUT"
},
"Q01": {
"direction": "OUT"
},
"D56": {
"direction": "IN"
},
"Q41": {
"direction": "OUT"
},
"Q73": {
"direction": "OUT"
},
"RESET": {
"direction": "IN"
},
"SCANOUT0": {
"direction": "OUT"
},
"Q50": {
"direction": "OUT"
},
"D43": {
"direction": "IN"
},
"Q95": {
"direction": "OUT"
},
"Q25": {
"direction": "OUT"
},
"D11": {
"direction": "IN"
},
"D54": {
"direction": "IN"
},
"Q86": {
"direction": "OUT"
},
"D55": {
"direction": "IN"
},
"Q53": {
"direction": "OUT"
},
"Q45": {
"direction": "OUT"
},
"D93": {
"direction": "IN"
},
"TESTWRITEDISB": {
"direction": "IN"
},
"Q63": {
"direction": "OUT"
},
"Q03": {
"direction": "OUT"
},
"Q54": {
"direction": "OUT"
},
"Q94": {
"direction": "OUT"
},
"D00": {
"direction": "IN"
},
"Q33": {
"direction": "OUT"
},
"D30": {
"direction": "IN"
},
"Q46": {
"direction": "OUT"
},
"D63": {
"direction": "IN"
},
"RDEN": {
"direction": "IN"
},
"EMPTY": {
"direction": "OUT"
},
"Q07": {
"direction": "OUT"
},
"D64": {
"direction": "IN"
},
"Q52": {
"direction": "OUT"
},
"Q85": {
"direction": "OUT"
},
"D50": {
"direction": "IN"
},
"Q44": {
"direction": "OUT"
},
"D52": {
"direction": "IN"
},
"Q60": {
"direction": "OUT"
},
"Q12": {
"direction": "OUT"
},
"Q93": {
"direction": "OUT"
},
"D33": {
"direction": "IN"
},
"SCANENB": {
"Q31": {
"direction": "OUT"
},
"Q23": {
"direction": "OUT"
},
"Q76": {
"direction": "OUT"
},
"D82": {
"direction": "IN"
},
"Q04": {
"Q75": {
"direction": "OUT"
},
"Q35": {
"direction": "OUT"
},
"Q24": {
"direction": "OUT"
},
"D57": {
"direction": "IN"
},
"Q77": {
"direction": "OUT"
},
"D40": {
"direction": "IN"
},
"Q40": {
"direction": "OUT"
},
"Q36": {
"direction": "OUT"
},
"Q72": {
"direction": "OUT"
},
"SCANIN2": {
"direction": "IN"
},
"D63": {
"direction": "IN"
},
"Q91": {
"Q37": {
"direction": "OUT"
},
"D62": {
"direction": "IN"
},
"SCANOUT3": {
"direction": "OUT"
},
"Q17": {
"direction": "OUT"
},
"D83": {
"direction": "IN"
},
"D23": {
"direction": "IN"
},
"D41": {
"direction": "IN"
}
},
"type": "IN_FIFO",
"site_pips": {}
}
}

122
artix7/site_type_IOB33.json
View File

@ -1,94 +1,94 @@
{
"type": "IOB33",
"site_pips": {
"PADOUTUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"IBUFDISABLE_SEL:GND": {
"to_pin": "OUT",
"from_pin": "GND"
},
"DIFFI_INUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"IBUFDISABLE_SEL:I": {
"to_pin": "OUT",
"from_pin": "I"
},
"INTERMDISABLE_SEL:GND": {
"to_pin": "OUT",
"from_pin": "GND"
},
"OUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"IUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"INTERMDISABLE_SEL:I": {
"to_pin": "OUT",
"from_pin": "I"
},
"TUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
}
},
"site_pins": {
"KEEPER_INT_EN": {
"T": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
},
"DIFFO_IN": {
"direction": "IN"
},
"PADOUT": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"INTERMDISABLE": {
"KEEPER_INT_EN": {
"direction": "IN"
},
"O_IN": {
"direction": "IN"
},
"T": {
"direction": "IN"
},
"PU_INT_EN": {
"direction": "IN"
},
"DIFFO_OUT": {
"direction": "OUT"
},
"PD_INT_EN": {
"direction": "IN"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"DIFFI_IN": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"I": {
"direction": "OUT"
},
"O_OUT": {
"direction": "OUT"
},
"DIFFI_IN": {
"DIFF_TERM_INT_EN": {
"direction": "IN"
}
},
"type": "IOB33",
"site_pips": {
"INTERMDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"OUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
"DIFFO_OUT": {
"direction": "OUT"
},
"DIFFI_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
"DIFFO_IN": {
"direction": "IN"
},
"IBUFDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
"I": {
"direction": "OUT"
},
"IBUFDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
"T_OUT": {
"direction": "OUT"
},
"TUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
"PADOUT": {
"direction": "OUT"
},
"PADOUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
"PD_INT_EN": {
"direction": "IN"
},
"IUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
"PU_INT_EN": {
"direction": "IN"
},
"INTERMDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
"INTERMDISABLE": {
"direction": "IN"
}
}
}

136
artix7/site_type_IOB33M.json
View File

@ -1,106 +1,106 @@
{
"type": "IOB33M",
"site_pips": {
"DIFFO_OUTUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"O_OUTUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"IBUFDISABLE_SEL:I": {
"to_pin": "OUT",
"from_pin": "I"
},
"INTERMDISABLE_SEL:GND": {
"to_pin": "OUT",
"from_pin": "GND"
},
"TUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"PADOUTUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"IBUFDISABLE_SEL:GND": {
"to_pin": "OUT",
"from_pin": "GND"
},
"INTERMDISABLE_SEL:I": {
"to_pin": "OUT",
"from_pin": "I"
},
"DIFFI_INUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"IUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"T_OUTUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"OUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
}
},
"site_pins": {
"KEEPER_INT_EN": {
"T": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
},
"DIFFO_IN": {
"direction": "IN"
},
"PADOUT": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"INTERMDISABLE": {
"KEEPER_INT_EN": {
"direction": "IN"
},
"O_IN": {
"direction": "IN"
},
"T": {
"DIFFO_OUT": {
"direction": "OUT"
},
"PD_INT_EN": {
"direction": "IN"
},
"PU_INT_EN": {
"DIFFI_IN": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"PD_INT_EN": {
"direction": "IN"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"DIFFO_OUT": {
"T_OUT": {
"direction": "OUT"
},
"DIFFO_IN": {
"direction": "IN"
},
"I": {
"direction": "OUT"
},
"O_OUT": {
"direction": "OUT"
},
"DIFFI_IN": {
"PADOUT": {
"direction": "OUT"
},
"PU_INT_EN": {
"direction": "IN"
}
},
"type": "IOB33M",
"site_pips": {
"INTERMDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"DIFFI_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"DIFFO_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"O_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"PADOUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T_OUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"INTERMDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
"INTERMDISABLE": {
"direction": "IN"
}
}
}

152
artix7/site_type_IOB33S.json
View File

@ -1,114 +1,114 @@
{
"type": "IOB33S",
"site_pips": {
"DIFFO_INUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"TINMUX:1": {
"to_pin": "OUT",
"from_pin": "1"
},
"IBUFDISABLE_SEL:I": {
"to_pin": "OUT",
"from_pin": "I"
},
"INTERMDISABLE_SEL:GND": {
"to_pin": "OUT",
"from_pin": "GND"
},
"OINMUX:1": {
"to_pin": "OUT",
"from_pin": "1"
},
"OUTMUX:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"OINMUX:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"OUTMUX:1": {
"to_pin": "OUT",
"from_pin": "1"
},
"PADOUTUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"IBUFDISABLE_SEL:GND": {
"to_pin": "OUT",
"from_pin": "GND"
},
"DIFFI_INUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"TINMUX:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"IUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"INTERMDISABLE_SEL:I": {
"to_pin": "OUT",
"from_pin": "I"
}
},
"site_pins": {
"KEEPER_INT_EN": {
"T": {
"direction": "IN"
},
"T_OUT": {
"direction": "OUT"
},
"DIFFO_IN": {
"direction": "IN"
},
"PADOUT": {
"direction": "OUT"
},
"IBUFDISABLE": {
"direction": "IN"
},
"INTERMDISABLE": {
"KEEPER_INT_EN": {
"direction": "IN"
},
"O_IN": {
"direction": "IN"
},
"T": {
"DIFFO_OUT": {
"direction": "OUT"
},
"PD_INT_EN": {
"direction": "IN"
},
"PU_INT_EN": {
"DIFFI_IN": {
"direction": "IN"
},
"T_IN": {
"direction": "IN"
},
"PD_INT_EN": {
"direction": "IN"
},
"DIFF_TERM_INT_EN": {
"direction": "IN"
},
"O": {
"direction": "IN"
},
"DIFFO_OUT": {
"T_OUT": {
"direction": "OUT"
},
"DIFFO_IN": {
"direction": "IN"
},
"I": {
"direction": "OUT"
},
"O_OUT": {
"direction": "OUT"
},
"DIFFI_IN": {
"PADOUT": {
"direction": "OUT"
},
"PU_INT_EN": {
"direction": "IN"
}
},
"type": "IOB33S",
"site_pips": {
"DIFFI_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUTMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"OINMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"PADOUTUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"DIFFO_INUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TINMUX:1": {
"from_pin": "1",
"to_pin": "OUT"
},
"INTERMDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"OINMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"INTERMDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:I": {
"from_pin": "I",
"to_pin": "OUT"
},
"IBUFDISABLE_SEL:GND": {
"from_pin": "GND",
"to_pin": "OUT"
},
"TINMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OUTMUX:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"IUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
"INTERMDISABLE": {
"direction": "IN"
}
}
}

6
artix7/site_type_IPAD.json
View File

@ -1,9 +1,9 @@
{
"type": "IPAD",
"site_pips": {},
"site_pins": {
"O": {
"direction": "OUT"
}
},
"type": "IPAD",
"site_pips": {}
}
}

920
artix7/site_type_MMCME2_ADV.json
View File

File diff suppressed because it is too large Load Diff

346
artix7/site_type_OLOGICE3.json
View File

@ -1,210 +1,210 @@
{
"type": "OLOGICE3",
"site_pips": {
"T2INV:T2": {
"to_pin": "OUT",
"from_pin": "T2"
},
"T1INV:T1_B": {
"to_pin": "OUT",
"from_pin": "T1_B"
},
"OQUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"OFBUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"T1USED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"D1INV:D1_B": {
"to_pin": "OUT",
"from_pin": "D1_B"
},
"TFBUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"CLKINV:CLK_B": {
"to_pin": "OUT",
"from_pin": "CLK_B"
},
"OCEUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"D1INV:D1": {
"to_pin": "OUT",
"from_pin": "D1"
},
"OREVUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"OSRUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"TQUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"D2INV:D2": {
"to_pin": "OUT",
"from_pin": "D2"
},
"O1USED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"CLKINV:CLK": {
"to_pin": "OUT",
"from_pin": "CLK"
},
"TMUX:T1": {
"to_pin": "OUT",
"from_pin": "T1"
},
"TSRUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"TREVUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"TCEUSED:0": {
"to_pin": "OUT",
"from_pin": "0"
},
"TMUX:TFF": {
"to_pin": "OUT",
"from_pin": "TFF"
},
"OMUX:D1": {
"to_pin": "OUT",
"from_pin": "D1"
},
"OMUX:OUTFF": {
"to_pin": "OUT",
"from_pin": "OUTFF"
},
"T1INV:T1": {
"to_pin": "OUT",
"from_pin": "T1"
},
"D2INV:D2_B": {
"to_pin": "OUT",
"from_pin": "D2_B"
},
"T2INV:T2_B": {
"to_pin": "OUT",
"from_pin": "T2_B"
}
},
"site_pins": {
"TCE": {
"direction": "IN"
},
"T3": {
"direction": "IN"
},
"REV": {
"direction": "IN"
},
"CLKDIVF": {
"direction": "IN"
},
"T1": {
"direction": "IN"
},
"T4": {
"direction": "IN"
},
"SHIFTIN2": {
"direction": "IN"
},
"CLK": {
"direction": "IN"
},
"TBYTEIN": {
"direction": "IN"
},
"D5": {
"direction": "IN"
},
"D8": {
"direction": "IN"
},
"SR": {
"direction": "IN"
},
"CLKDIVB": {
"direction": "IN"
},
"TQ": {
"direction": "OUT"
},
"TFB": {
"direction": "OUT"
},
"T2": {
"direction": "IN"
},
"D7": {
"D1": {
"direction": "IN"
},
"TBYTEOUT": {
"direction": "OUT"
},
"D6": {
"direction": "IN"
},
"D3": {
"direction": "IN"
},
"OFB": {
"D8": {
"direction": "IN"
},
"CLKDIVB": {
"direction": "IN"
},
"CLKB": {
"direction": "IN"
},
"REV": {
"direction": "IN"
},
"T1": {
"direction": "IN"
},
"D5": {
"direction": "IN"
},
"TFB": {
"direction": "OUT"
},
"SHIFTIN1": {
"direction": "IN"
},
"SHIFTOUT1": {
"direction": "OUT"
},
"T4": {
"direction": "IN"
},
"D4": {
"direction": "IN"
},
"TQ": {
"direction": "OUT"
},
"D2": {
"direction": "IN"
},
"T3": {
"direction": "IN"
},
"OCE": {
"direction": "IN"
},
"SHIFTOUT2": {
"direction": "OUT"
},
"OFB": {
"direction": "OUT"
},
"CLKDIVF": {
"direction": "IN"
},
"OQ": {
"direction": "OUT"
},
"SHIFTIN2": {
"direction": "IN"
},
"SR": {
"direction": "IN"
},
"IOCLKGLITCH": {
"direction": "OUT"
},
"CLKDIVFB": {
"direction": "IN"
},
"TBYTEOUT": {
"direction": "OUT"
},
"D1": {
"TCE": {
"direction": "IN"
},
"D4": {
"TBYTEIN": {
"direction": "IN"
},
"D6": {
"D7": {
"direction": "IN"
},
"OCE": {
"direction": "IN"
},
"CLKB": {
"direction": "IN"
},
"OQ": {
"direction": "OUT"
},
"SHIFTOUT1": {
"direction": "OUT"
},
"SHIFTIN1": {
"CLK": {
"direction": "IN"
},
"CLKDIV": {
"direction": "IN"
}
},
"type": "OLOGICE3",
"site_pips": {
"T2INV:T2_B": {
"from_pin": "T2_B",
"to_pin": "OUT"
},
"OMUX:D1": {
"from_pin": "D1",
"to_pin": "OUT"
},
"OSRUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T1INV:T1": {
"from_pin": "T1",
"to_pin": "OUT"
},
"T1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TMUX:TFF": {
"from_pin": "TFF",
"to_pin": "OUT"
},
"OMUX:OUTFF": {
"from_pin": "OUTFF",
"to_pin": "OUT"
},
"D2INV:D2": {
"from_pin": "D2",
"to_pin": "OUT"
},
"D2INV:D2_B": {
"from_pin": "D2_B",
"to_pin": "OUT"
},
"OREVUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T1INV:T1_B": {
"from_pin": "T1_B",
"to_pin": "OUT"
},
"TMUX:T1": {
"from_pin": "T1",
"to_pin": "OUT"
},
"TFBUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OCEUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TSRUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OQUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"D1INV:D1_B": {
"from_pin": "D1_B",
"to_pin": "OUT"
},
"O1USED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"TCEUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"OFBUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"T2INV:T2": {
"from_pin": "T2",
"to_pin": "OUT"
},
"TQUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"CLKINV:CLK": {
"from_pin": "CLK",
"to_pin": "OUT"
},
"CLKINV:CLK_B": {
"from_pin": "CLK_B",
"to_pin": "OUT"
},
"TREVUSED:0": {
"from_pin": "0",
"to_pin": "OUT"
},
"D1INV:D1": {
"from_pin": "D1",
"to_pin": "OUT"
}
}
}

6
artix7/site_type_OPAD.json
View File

@ -1,9 +1,9 @@
{
"type": "OPAD",
"site_pips": {},
"site_pins": {
"I": {
"direction": "IN"
}
},
"type": "OPAD",
"site_pips": {}
}
}

772
artix7/site_type_OUT_FIFO.json
View File

@ -1,453 +1,453 @@
{
"type": "OUT_FIFO",
"site_pips": {},
"site_pins": {
"Q57": {
"direction": "OUT"
},
"Q62": {
"direction": "OUT"
},
"Q61": {
"direction": "OUT"
},
"Q50": {
"direction": "OUT"
},
"Q66": {
"direction": "OUT"
},
"D46": {
"direction": "IN"
},
"D22": {
"direction": "IN"
},
"D41": {
"direction": "IN"
},
"Q65": {
"direction": "OUT"
},
"D20": {
"direction": "IN"
},
"Q93": {
"direction": "OUT"
},
"Q40": {
"direction": "OUT"
},
"EMPTY": {
"direction": "OUT"
},
"D13": {
"direction": "IN"
},
"D54": {
"direction": "IN"
},
"D64": {
"direction": "IN"
},
"D95": {
"direction": "IN"
},
"D01": {
"direction": "IN"
},
"Q13": {
"direction": "OUT"
},
"D52": {
"SCANIN2": {
"direction": "IN"
},
"Q83": {
"direction": "OUT"
},
"Q43": {
"direction": "OUT"
},
"D51": {
"direction": "IN"
},
"D36": {
"direction": "IN"
},
"Q20": {
"direction": "OUT"
},
"D93": {
"direction": "IN"
},
"D35": {
"direction": "IN"
},
"D37": {
"direction": "IN"
},
"Q80": {
"direction": "OUT"
},
"Q56": {
"direction": "OUT"
},
"D92": {
"direction": "IN"
},
"Q11": {
"direction": "OUT"
},
"D75": {
"direction": "IN"
},
"Q53": {
"direction": "OUT"
},
"D82": {
"direction": "IN"
},
"D62": {
"direction": "IN"
},
"SCANOUT0": {
"direction": "OUT"
},
"Q01": {
"direction": "OUT"
},
"Q73": {
"direction": "OUT"
},
"D24": {
"direction": "IN"
},
"D27": {
"direction": "IN"
},
"RESET": {
"direction": "IN"
},
"SCANOUT2": {
"direction": "OUT"
},
"D06": {
"direction": "IN"
},
"FULL": {
"direction": "OUT"
},
"Q60": {
"direction": "OUT"
},
"D42": {
"direction": "IN"
},
"D16": {
"direction": "IN"
},
"D80": {
"direction": "IN"
},
"D66": {
"direction": "IN"
},
"D00": {
"direction": "IN"
},
"D47": {
"direction": "IN"
},
"Q41": {
"direction": "OUT"
},
"D30": {
"direction": "IN"
},
"D55": {
"direction": "IN"
},
"Q63": {
"direction": "OUT"
},
"D61": {
"direction": "IN"
},
"TESTMODEB": {
"direction": "IN"
},
"D03": {
"direction": "IN"
},
"Q23": {
"direction": "OUT"
},
"Q82": {
"direction": "OUT"
},
"Q12": {
"direction": "OUT"
},
"Q30": {
"direction": "OUT"
},
"D05": {
"direction": "IN"
},
"D32": {
"direction": "IN"
},
"Q72": {
"direction": "OUT"
},
"D96": {
"direction": "IN"
},
"Q90": {
"direction": "OUT"
},
"Q55": {
"direction": "OUT"
},
"Q42": {
"direction": "OUT"
},
"D60": {
"direction": "IN"
},
"D14": {
"direction": "IN"
},
"D26": {
"direction": "IN"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"Q32": {
"direction": "OUT"
},
"SCANIN1": {
"direction": "IN"
},
"D71": {
"direction": "IN"
},
"D56": {
"direction": "IN"
},
"D67": {
"direction": "IN"
},
"D02": {
"direction": "IN"
},
"D07": {
"direction": "IN"
},
"SCANOUT1": {
"direction": "OUT"
},
"Q54": {
"direction": "OUT"
},
"D25": {
"direction": "IN"
},
"D72": {
"direction": "IN"
},
"Q51": {
"direction": "OUT"
},
"D44": {
"direction": "IN"
},
"SCANIN3": {
"direction": "IN"
},
"Q92": {
"direction": "OUT"
},
"Q33": {
"direction": "OUT"
},
"Q67": {
"direction": "OUT"
},
"D50": {
"direction": "IN"
},
"ALMOSTEMPTY": {
"direction": "OUT"
},
"D65": {
"direction": "IN"
},
"D17": {
"direction": "IN"
},
"D31": {
"direction": "IN"
},
"SCANOUT3": {
"D75": {
"direction": "IN"
},
"Q62": {
"direction": "OUT"
},
"D87": {
"D12": {
"direction": "IN"
},
"D23": {
"D67": {
"direction": "IN"
},
"D73": {
"direction": "IN"
},
"Q81": {
"direction": "OUT"
},
"Q21": {
"direction": "OUT"
},
"D91": {
"direction": "IN"
},
"RDCLK": {
"direction": "IN"
},
"D74": {
"direction": "IN"
},
"D21": {
"direction": "IN"
},
"Q00": {
"direction": "OUT"
},
"Q64": {
"direction": "OUT"
},
"D10": {
"direction": "IN"
},
"D43": {
"direction": "IN"
},
"Q70": {
"direction": "OUT"
},
"D57": {
"direction": "IN"
},
"D81": {
"direction": "IN"
},
"D15": {
"direction": "IN"
},
"D04": {
"direction": "IN"
},
"Q10": {
"direction": "OUT"
},
"Q03": {
"direction": "OUT"
},
"TESTREADDISB": {
"direction": "IN"
},
"TESTWRITEDISB": {
"direction": "IN"
},
"D85": {
"direction": "IN"
},
"Q52": {
"direction": "OUT"
},
"RDEN": {
"direction": "IN"
},
"WREN": {
"direction": "IN"
},
"Q02": {
"direction": "OUT"
},
"D97": {
"direction": "IN"
},
"D45": {
"direction": "IN"
},
"Q71": {
"direction": "OUT"
},
"D83": {
"direction": "IN"
},
"Q22": {
"Q53": {
"direction": "OUT"
},
"D90": {
"direction": "IN"
},
"D40": {
"ALMOSTEMPTY": {
"direction": "OUT"
},
"Q67": {
"direction": "OUT"
},
"D13": {
"direction": "IN"
},
"Q31": {
"D72": {
"direction": "IN"
},
"RDCLK": {
"direction": "IN"
},
"Q81": {
"direction": "OUT"
},
"D22": {
"direction": "IN"
},
"D46": {
"direction": "IN"
},
"Q82": {
"direction": "OUT"
},
"Q03": {
"direction": "OUT"
},
"D87": {
"direction": "IN"
},
"Q10": {
"direction": "OUT"
},
"Q21": {
"direction": "OUT"
},
"D20": {
"direction": "IN"
},
"Q70": {
"direction": "OUT"
},
"SCANIN1": {
"direction": "IN"
},
"SCANENB": {
"direction": "IN"
},
"D24": {
"direction": "IN"
},
"D80": {
"direction": "IN"
},
"ALMOSTFULL": {
"direction": "OUT"
},
"D44": {
"direction": "IN"
},
"D37": {
"direction": "IN"
},
"Q41": {
"direction": "OUT"
},
"Q43": {
"direction": "OUT"
},
"Q55": {
"direction": "OUT"
},
"Q13": {
"direction": "OUT"
},
"SCANOUT1": {
"direction": "OUT"
},
"D73": {
"direction": "IN"
},
"Q22": {
"direction": "OUT"
},
"SCANOUT2": {
"direction": "OUT"
},
"D27": {
"direction": "IN"
},
"Q42": {
"direction": "OUT"
},
"D94": {
"direction": "IN"
},
"D66": {
"direction": "IN"
},
"Q65": {
"direction": "OUT"
},
"D36": {
"direction": "IN"
},
"FULL": {
"direction": "OUT"
},
"D85": {
"direction": "IN"
},
"D15": {
"direction": "IN"
},
"D84": {
"direction": "IN"
},
"D21": {
"direction": "IN"
},
"D92": {
"direction": "IN"
},
"Q51": {
"direction": "OUT"
},
"D53": {
"direction": "IN"
},
"Q56": {
"direction": "OUT"
},
"D34": {
"direction": "IN"
},
"Q90": {
"direction": "OUT"
},
"D65": {
"direction": "IN"
},
"D14": {
"direction": "IN"
},
"D50": {
"direction": "IN"
},
"D32": {
"direction": "IN"
},
"D76": {
"direction": "IN"
},
"D97": {
"direction": "IN"
},
"Q64": {
"direction": "OUT"
},
"Q20": {
"direction": "OUT"
},
"SCANOUT3": {
"direction": "OUT"
},
"Q92": {
"direction": "OUT"
},
"D42": {
"direction": "IN"
},
"WREN": {
"direction": "IN"
},
"D51": {
"direction": "IN"
},
"D10": {
"direction": "IN"
},
"Q91": {
"direction": "OUT"
},
"D16": {
"direction": "IN"
},
"Q61": {
"direction": "OUT"
},
"D01": {
"direction": "IN"
},
"D71": {
"direction": "IN"
},
"Q57": {
"direction": "OUT"
},
"D45": {
"direction": "IN"
},
"D96": {
"direction": "IN"
},
"D81": {
"direction": "IN"
},
"SCANIN0": {
"direction": "IN"
},
"D70": {
"direction": "IN"
},
"D94": {
"Q66": {
"direction": "OUT"
},
"D05": {
"direction": "IN"
},
"Q11": {
"direction": "OUT"
},
"D61": {
"direction": "IN"
},
"D86": {
"direction": "IN"
},
"D12": {
"direction": "IN"
},
"D84": {
"D91": {
"direction": "IN"
},
"WRCLK": {
"direction": "IN"
},
"D53": {
"D17": {
"direction": "IN"
},
"D11": {
"D03": {
"direction": "IN"
},
"D33": {
"Q80": {
"direction": "OUT"
},
"SCANIN3": {
"direction": "IN"
},
"SCANENB": {
"D93": {
"direction": "IN"
},
"D34": {
"TESTMODEB": {
"direction": "IN"
},
"Q01": {
"direction": "OUT"
},
"D56": {
"direction": "IN"
},
"D60": {
"direction": "IN"
},
"D06": {
"direction": "IN"
},
"D77": {
"direction": "IN"
},
"D76": {
"D52": {
"direction": "IN"
},
"SCANIN2": {
"D04": {
"direction": "IN"
},
"RESET": {
"direction": "IN"
},
"SCANOUT0": {
"direction": "OUT"
},
"Q50": {
"direction": "OUT"
},
"D43": {
"direction": "IN"
},
"D74": {
"direction": "IN"
},
"D11": {
"direction": "IN"
},
"D54": {
"direction": "IN"
},
"D55": {
"direction": "IN"
},
"D35": {
"direction": "IN"
},
"Q93": {
"direction": "OUT"
},
"TESTWRITEDISB": {
"direction": "IN"
},
"Q63": {
"direction": "OUT"
},
"Q00": {
"direction": "OUT"
},
"Q54": {
"direction": "OUT"
},
"Q30": {
"direction": "OUT"
},
"D00": {
"direction": "IN"
},
"Q33": {
"direction": "OUT"
},
"D30": {
"direction": "IN"
},
"Q32": {
"direction": "OUT"
},
"D63": {
"direction": "IN"
},
"Q91": {
"RDEN": {
"direction": "IN"
},
"EMPTY": {
"direction": "OUT"
},
"D64": {
"direction": "IN"
},
"Q52": {
"direction": "OUT"
},
"D26": {
"direction": "IN"
},
"Q73": {
"direction": "OUT"
},
"Q60": {
"direction": "OUT"
},
"Q12": {
"direction": "OUT"
},
"D83": {
"direction": "IN"
},
"TESTREADDISB": {
"direction": "IN"
},
"D33": {
"direction": "IN"
},
"Q31": {
"direction": "OUT"
},
"Q23": {
"direction": "OUT"
},
"D82": {
"direction": "IN"
},
"Q02": {
"direction": "OUT"
},
"D25": {
"direction": "IN"
},
"D57": {
"direction": "IN"
},
"D40": {
"direction": "IN"
},
"Q40": {
"direction": "OUT"
},
"Q72": {
"direction": "OUT"
},
"Q71": {
"direction": "OUT"
},
"D62": {
"direction": "IN"
},
"D02": {
"direction": "IN"
},
"D95": {
"direction": "IN"
},
"D47": {
"direction": "IN"
},
"D23": {
"direction": "IN"
},
"D41": {
"direction": "IN"
}
},
"type": "OUT_FIFO",
"site_pips": {}
}
}

12786
artix7/site_type_PCIE_2_1.json
View File

File diff suppressed because it is too large Load Diff

466
artix7/site_type_PHASER_IN_PHY.json
View File

@ -1,291 +1,291 @@
{
"type": "PHASER_IN_PHY",
"site_pips": {
"RSTINV:RST": {
"to_pin": "OUT",
"from_pin": "RST"
},
"RSTINV:RST_B": {
"to_pin": "OUT",
"from_pin": "RST_B"
}
},
"site_pins": {
"RANKSELPHY1": {
"PHASELOCKED": {
"direction": "OUT"
},
"ICLKDIV": {
"direction": "OUT"
},
"TESTIN3": {
"direction": "IN"
},
"ICLK": {
"direction": "OUT"
},
"ENCALIB1": {
"direction": "IN"
},
"COUNTERREADVAL5": {
"direction": "OUT"
},
"TESTOUT0": {
"direction": "OUT"
},
"SCANIN": {
"direction": "IN"
},
"COUNTERREADVAL3": {
"direction": "OUT"
},
"SELCALORSTG1": {
"direction": "IN"
},
"COUNTERLOADVAL2": {
"direction": "IN"
},
"SYSCLK": {
"direction": "IN"
},
"SCANENB": {
"direction": "IN"
},
"SCANCLK": {
"direction": "IN"
},
"COUNTERREADEN": {
"direction": "IN"
},
"ENCALIB0": {
"direction": "IN"
},
"ENSTG1ADJUSTB": {
"direction": "IN"
},
"STG1REGR2": {
"direction": "OUT"
},
"TESTIN7": {
"direction": "IN"
},
"RCLK": {
"direction": "OUT"
},
"COUNTERLOADVAL3": {
"direction": "IN"
},
"COUNTERLOADVAL4": {
"direction": "IN"
},
"STG1REGR8": {
"direction": "OUT"
},
"ICLKDIV": {
"direction": "OUT"
},
"DQSOUTOFRANGE": {
"direction": "OUT"
},
"SYSCLK": {
"TESTIN8": {
"direction": "IN"
},
"STG1REGL1": {
"direction": "IN"
},
"TESTIN12": {
"direction": "IN"
},
"TESTOUT1": {
"direction": "OUT"
},
"COUNTERREADVAL5": {
"direction": "OUT"
},
"STG1REGR5": {
"direction": "OUT"
},
"STG1REGL8": {
"direction": "IN"
},
"STG1REGL7": {
"MEMREFCLK": {
"direction": "IN"
},
"STG1REGL0": {
"direction": "IN"
},
"STG1REGR7": {
"direction": "OUT"
},
"TESTIN7": {
"direction": "IN"
},
"COUNTERREADVAL2": {
"direction": "OUT"
},
"STG1REGR1": {
"direction": "OUT"
},
"STG1REGR6": {
"direction": "OUT"
},
"STG1REGL4": {
"direction": "IN"
},
"COUNTERREADVAL1": {
"direction": "OUT"
},
"STG1REGR3": {
"direction": "OUT"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"WRENABLE": {
"direction": "OUT"
},
"TESTOUT0": {
"direction": "OUT"
},
"FINEOVERFLOW": {
"direction": "OUT"
},
"MEMREFCLK": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"STG1REGR4": {
"direction": "OUT"
},
"STG1READ": {
"direction": "IN"
},
"FINEENABLE": {
"direction": "IN"
},
"ENCALIB0": {
"direction": "IN"
},
"RANKSEL0": {
"direction": "IN"
},
"FREQREFCLK": {
"direction": "IN"
},
"TESTIN1": {
"direction": "IN"
},
"BURSTPENDING": {
"direction": "IN"
},
"STG1REGR0": {
"direction": "OUT"
},
"STG1REGL3": {
"direction": "IN"
},
"ENSTG1": {
"direction": "IN"
},
"BURSTPENDINGPHY": {
"direction": "IN"
},
"DQSFOUND": {
"direction": "OUT"
},
"RSTDQSFIND": {
"direction": "IN"
},
"STG1REGR2": {
"direction": "OUT"
},
"COUNTERREADVAL0": {
"direction": "OUT"
},
"TESTOUT3": {
"direction": "OUT"
},
"EDGEADV": {
"direction": "IN"
},
"SCANMODEB": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
},
"COUNTERLOADEN": {
"direction": "IN"
},
"COUNTERLOADVAL5": {
"direction": "IN"
},
"RCLK": {
"direction": "OUT"
},
"STG1LOAD": {
"direction": "IN"
},
"STG1OVERFLOW": {
"direction": "OUT"
},
"TESTIN9": {
"direction": "IN"
},
"STG1REGL6": {
"direction": "IN"
},
"ENCALIB1": {
"direction": "IN"
},
"ISERDESRST": {
"direction": "OUT"
},
"FINEINC": {
"direction": "IN"
},
"STG1REGL5": {
"direction": "IN"
},
"SCANIN": {
"direction": "IN"
},
"SCANOUT": {
"direction": "OUT"
},
"RANKSEL1": {
"direction": "IN"
},
"RANKSELPHY0": {
"direction": "IN"
},
"PHASEREFCLK": {
"direction": "IN"
},
"COUNTERLOADVAL0": {
"direction": "IN"
},
"SCANCLK": {
"direction": "IN"
},
"TESTIN10": {
"direction": "IN"
},
"ENCALIBPHY1": {
"direction": "IN"
},
"SELCALORSTG1": {
"direction": "IN"
},
"COUNTERREADVAL3": {
"direction": "OUT"
},
"TESTIN6": {
"direction": "IN"
},
"COUNTERLOADVAL2": {
"direction": "IN"
},
"COUNTERREADEN": {
"direction": "IN"
},
"SYNCIN": {
"STG1REGL3": {
"direction": "IN"
},
"STG1INCDEC": {
"direction": "IN"
},
"TESTOUT2": {
"direction": "OUT"
},
"COUNTERREADVAL4": {
"direction": "OUT"
},
"TESTIN0": {
"direction": "IN"
},
"PHASELOCKED": {
"TESTOUT1": {
"direction": "OUT"
},
"RST": {
"TESTIN2": {
"direction": "IN"
},
"COUNTERLOADVAL1": {
"PHASEREFCLK": {
"direction": "IN"
},
"ENCALIBPHY0": {
"direction": "IN"
},
"ICLK": {
"STG1REGR7": {
"direction": "OUT"
},
"STG1REGL2": {
"FINEENABLE": {
"direction": "IN"
},
"SCANENB": {
"STG1REGR3": {
"direction": "OUT"
},
"DQSFOUND": {
"direction": "OUT"
},
"RANKSEL0": {
"direction": "IN"
},
"SCANOUT": {
"direction": "OUT"
},
"STG1REGR1": {
"direction": "OUT"
},
"RANKSELPHY0": {
"direction": "IN"
},
"COUNTERLOADEN": {
"direction": "IN"
},
"RANKSELPHY1": {
"direction": "IN"
},
"TESTIN9": {
"direction": "IN"
},
"TESTIN12": {
"direction": "IN"
},
"STG1REGL8": {
"direction": "IN"
},
"DIVIDERST": {
"direction": "IN"
},
"TESTIN11": {
"STG1REGL5": {
"direction": "IN"
},
"TESTIN8": {
"COUNTERLOADVAL1": {
"direction": "IN"
},
"STG1READ": {
"direction": "IN"
},
"FINEINC": {
"direction": "IN"
},
"RANKSEL1": {
"direction": "IN"
},
"COUNTERREADVAL1": {
"direction": "OUT"
},
"ISERDESRST": {
"direction": "OUT"
},
"FINEOVERFLOW": {
"direction": "OUT"
},
"COUNTERLOADVAL0": {
"direction": "IN"
},
"RSTDQSFIND": {
"direction": "IN"
},
"COUNTERREADVAL2": {
"direction": "OUT"
},
"STG1REGR0": {
"direction": "OUT"
},
"BURSTPENDING": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
},
"TESTIN6": {
"direction": "IN"
},
"EDGEADV": {
"direction": "IN"
},
"STG1LOAD": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"ENSTG1ADJUSTB": {
"STG1REGL4": {
"direction": "IN"
}
},
"type": "PHASER_IN_PHY",
"site_pips": {
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
},
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
"TESTIN1": {
"direction": "IN"
},
"STG1REGR5": {
"direction": "OUT"
},
"BURSTPENDINGPHY": {
"direction": "IN"
},
"TESTOUT3": {
"direction": "OUT"
},
"COUNTERLOADVAL5": {
"direction": "IN"
},
"DQSOUTOFRANGE": {
"direction": "OUT"
},
"WRENABLE": {
"direction": "OUT"
},
"SYNCIN": {
"direction": "IN"
},
"TESTIN10": {
"direction": "IN"
},
"TESTIN11": {
"direction": "IN"
},
"STG1REGR8": {
"direction": "OUT"
},
"STG1REGL6": {
"direction": "IN"
},
"STG1REGR6": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"STG1REGL7": {
"direction": "IN"
},
"SCANMODEB": {
"direction": "IN"
},
"STG1REGL2": {
"direction": "IN"
},
"TESTIN0": {
"direction": "IN"
},
"ENSTG1": {
"direction": "IN"
},
"STG1REGR4": {
"direction": "OUT"
},
"STG1OVERFLOW": {
"direction": "OUT"
},
"TESTIN4": {
"direction": "IN"
},
"TESTOUT2": {
"direction": "OUT"
},
"ENCALIBPHY0": {
"direction": "IN"
},
"COUNTERREADVAL0": {
"direction": "OUT"
},
"STG1REGL1": {
"direction": "IN"
}
}
}

398
artix7/site_type_PHASER_OUT_PHY.json
View File

@ -1,246 +1,246 @@
{
"type": "PHASER_OUT_PHY",
"site_pips": {
"RSTINV:RST": {
"to_pin": "OUT",
"from_pin": "RST"
},
"RSTINV:RST_B": {
"to_pin": "OUT",
"from_pin": "RST_B"
}
},
"site_pins": {
"BURSTPENDINGPHY": {
"TESTIN15": {
"direction": "IN"
},
"COUNTERLOADVAL8": {
"direction": "IN"
},
"COARSEOVERFLOW": {
"direction": "OUT"
},
"OCLK": {
"direction": "OUT"
},
"COUNTERLOADVAL4": {
"direction": "IN"
},
"SYSCLK": {
"direction": "IN"
},
"COUNTERREADVAL0": {
"direction": "OUT"
},
"CTSBUS0": {
"direction": "OUT"
},
"TESTIN9": {
"direction": "IN"
},
"COUNTERLOADVAL6": {
"direction": "IN"
},
"TESTOUT3": {
"direction": "OUT"
},
"EDGEADV": {
"direction": "IN"
},
"TESTIN14": {
"direction": "IN"
},
"TESTIN15": {
"direction": "IN"
},
"COARSEINC": {
"direction": "IN"
},
"FINEINC": {
"direction": "IN"
},
"TESTIN12": {
"direction": "IN"
},
"TESTOUT1": {
"direction": "OUT"
},
"RDENABLE": {
"direction": "OUT"
},
"TESTIN5": {
"direction": "IN"
},
"COUNTERLOADEN": {
"direction": "IN"
},
"TESTIN1": {
"direction": "IN"
},
"COUNTERLOADVAL5": {
"direction": "IN"
},
"COARSEENABLE": {
"direction": "IN"
},
"SYNCIN": {
"direction": "IN"
},
"ENCALIBPHY0": {
"direction": "IN"
},
"TESTIN7": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"ENCALIB1": {
"direction": "IN"
},
"COUNTERREADVAL7": {
"direction": "OUT"
},
"SCANCLK": {
"direction": "IN"
},
"FINEENABLE": {
"direction": "IN"
},
"COUNTERLOADVAL3": {
"direction": "IN"
},
"SCANMODEB": {
"direction": "IN"
},
"DQSBUS0": {
"direction": "OUT"
},
"DQSBUS1": {
"direction": "OUT"
},
"TESTOUT0": {
"direction": "OUT"
},
"SCANOUT": {
"direction": "OUT"
},
"COUNTERREADVAL6": {
"direction": "OUT"
},
"SCANIN": {
"direction": "IN"
},
"COUNTERREADVAL2": {
"direction": "OUT"
},
"PHASEREFCLK": {
"direction": "IN"
},
"COUNTERLOADVAL0": {
"DIVIDERST": {
"direction": "IN"
},
"COUNTERLOADVAL1": {
"direction": "IN"
},
"COUNTERLOADVAL2": {
"direction": "IN"
},
"SELFINEOCLKDELAY": {
"direction": "IN"
},
"COUNTERREADVAL8": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"COUNTERREADVAL1": {
"direction": "OUT"
},
"TESTIN10": {
"direction": "IN"
},
"ENCALIBPHY1": {
"direction": "IN"
},
"OCLKDELAYED": {
"direction": "OUT"
},
"COUNTERREADVAL3": {
"direction": "OUT"
},
"TESTIN6": {
"direction": "IN"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"COUNTERREADEN": {
"direction": "IN"
},
"OSERDESRST": {
"direction": "OUT"
},
"OCLKDIV": {
"direction": "OUT"
},
"DTSBUS1": {
"direction": "OUT"
},
"FINEOVERFLOW": {
"direction": "OUT"
},
"MEMREFCLK": {
"direction": "IN"
},
"TESTOUT2": {
"direction": "OUT"
},
"COUNTERREADVAL4": {
"COUNTERREADVAL7": {
"direction": "OUT"
},
"TESTIN3": {
"direction": "IN"
},
"TESTIN0": {
"FINEINC": {
"direction": "IN"
},
"COUNTERLOADVAL7": {
"TESTIN4": {
"direction": "IN"
},
"ENCALIB0": {
"ENCALIB1": {
"direction": "IN"
},
"FREQREFCLK": {
"COUNTERREADVAL4": {
"direction": "OUT"
},
"COUNTERLOADVAL6": {
"direction": "IN"
},
"TESTOUT0": {
"direction": "OUT"
},
"SCANIN": {
"direction": "IN"
},
"DTSBUS1": {
"direction": "OUT"
},
"COUNTERREADVAL3": {
"direction": "OUT"
},
"CTSBUS0": {
"direction": "OUT"
},
"COUNTERREADVAL1": {
"direction": "OUT"
},
"FINEOVERFLOW": {
"direction": "OUT"
},
"COUNTERLOADVAL0": {
"direction": "IN"
},
"CTSBUS1": {
"direction": "OUT"
},
"COUNTERREADVAL5": {
"OSERDESRST": {
"direction": "OUT"
},
"COARSEENABLE": {
"direction": "IN"
},
"COUNTERLOADVAL2": {
"direction": "IN"
},
"RDENABLE": {
"direction": "OUT"
},
"SYSCLK": {
"direction": "IN"
},
"OCLK": {
"direction": "OUT"
},
"BURSTPENDING": {
"direction": "IN"
},
"DIVIDERST": {
"SCANCLK": {
"direction": "IN"
},
"SCANENB": {
"TESTIN14": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
},
"COUNTERREADEN": {
"direction": "IN"
},
"COUNTERREADVAL8": {
"direction": "OUT"
},
"ENCALIB0": {
"direction": "IN"
},
"EDGEADV": {
"direction": "IN"
},
"TESTIN7": {
"direction": "IN"
},
"COARSEINC": {
"direction": "IN"
},
"TESTIN6": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"TESTOUT1": {
"direction": "OUT"
},
"OCLKDIV": {
"direction": "OUT"
},
"COUNTERLOADVAL3": {
"direction": "IN"
},
"COARSEOVERFLOW": {
"direction": "OUT"
},
"TESTIN11": {
"direction": "IN"
},
"TESTIN8": {
"direction": "IN"
},
"MEMREFCLK": {
"direction": "IN"
},
"TESTOUT3": {
"direction": "OUT"
},
"COUNTERLOADVAL5": {
"direction": "IN"
},
"DTSBUS0": {
"direction": "OUT"
},
"TESTIN8": {
"FREQREFCLK": {
"direction": "IN"
},
"TESTIN11": {
"ENCALIBPHY1": {
"direction": "IN"
}
},
"type": "PHASER_OUT_PHY",
"site_pips": {
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
},
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
"ENCALIBPHY0": {
"direction": "IN"
},
"DQSBUS1": {
"direction": "OUT"
},
"COUNTERLOADVAL7": {
"direction": "IN"
},
"TESTIN10": {
"direction": "IN"
},
"SELFINEOCLKDELAY": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"PHASEREFCLK": {
"direction": "IN"
},
"TESTIN1": {
"direction": "IN"
},
"COUNTERREADVAL5": {
"direction": "OUT"
},
"DQSBUS0": {
"direction": "OUT"
},
"FINEENABLE": {
"direction": "IN"
},
"OCLKDELAYED": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"SYNCIN": {
"direction": "IN"
},
"BURSTPENDINGPHY": {
"direction": "IN"
},
"COUNTERREADVAL0": {
"direction": "OUT"
},
"COUNTERLOADVAL4": {
"direction": "IN"
},
"SCANOUT": {
"direction": "OUT"
},
"SCANMODEB": {
"direction": "IN"
},
"TESTIN0": {
"direction": "IN"
},
"SCANENB": {
"direction": "IN"
},
"COUNTERLOADEN": {
"direction": "IN"
},
"COUNTERREADVAL2": {
"direction": "OUT"
},
"COUNTERREADVAL6": {
"direction": "OUT"
},
"TESTOUT2": {
"direction": "OUT"
},
"TESTIN9": {
"direction": "IN"
},
"TESTIN12": {
"direction": "IN"
}
}
}

126
artix7/site_type_PHASER_REF.json
View File

@ -1,89 +1,89 @@
{
"site_pins": {
"TESTOUT4": {
"direction": "OUT"
"type": "PHASER_REF",
"site_pips": {
"PWRDWNINV:PWRDWN_B": {
"to_pin": "OUT",
"from_pin": "PWRDWN_B"
},
"CLKOUT": {
"RSTINV:RST": {
"to_pin": "OUT",
"from_pin": "RST"
},
"RSTINV:RST_B": {
"to_pin": "OUT",
"from_pin": "RST_B"
},
"PWRDWNINV:PWRDWN": {
"to_pin": "OUT",
"from_pin": "PWRDWN"
}
},
"site_pins": {
"TESTOUT3": {
"direction": "OUT"
},
"TMUXOUT": {
"direction": "OUT"
},
"TESTIN3": {
"direction": "IN"
},
"RST": {
"direction": "IN"
},
"TESTOUT3": {
"direction": "OUT"
},
"PWRDWN": {
"direction": "IN"
},
"TESTIN6": {
"direction": "IN"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"TESTOUT5": {
"direction": "OUT"
},
"TESTOUT2": {
"direction": "OUT"
},
"TESTOUT6": {
"direction": "OUT"
},
"TESTIN0": {
"direction": "IN"
},
"LOCKED": {
"direction": "OUT"
},
"CLKIN": {
"direction": "IN"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTOUT1": {
"direction": "OUT"
},
"TESTIN1": {
"direction": "IN"
},
"TESTOUT0": {
"direction": "OUT"
},
"TESTIN7": {
"TESTOUT1": {
"direction": "OUT"
},
"CLKOUT": {
"direction": "OUT"
},
"TESTOUT2": {
"direction": "OUT"
},
"LOCKED": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTOUT4": {
"direction": "OUT"
},
"TESTIN5": {
"direction": "IN"
}
},
"type": "PHASER_REF",
"site_pips": {
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
},
"PWRDWNINV:PWRDWN": {
"from_pin": "PWRDWN",
"to_pin": "OUT"
"TESTIN6": {
"direction": "IN"
},
"PWRDWNINV:PWRDWN_B": {
"from_pin": "PWRDWN_B",
"to_pin": "OUT"
"PWRDWN": {
"direction": "IN"
},
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
"TESTOUT5": {
"direction": "OUT"
},
"TESTOUT6": {
"direction": "OUT"
},
"TESTIN7": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"CLKIN": {
"direction": "IN"
},
"TESTIN1": {
"direction": "IN"
}
}
}

536
artix7/site_type_PHY_CONTROL.json
View File

@ -1,36 +1,8 @@
{
"type": "PHY_CONTROL",
"site_pips": {},
"site_pins": {
"TESTOUTPUT6": {
"direction": "OUT"
},
"PHYCTLWD2": {
"direction": "IN"
},
"READCALIBENABLE": {
"direction": "IN"
},
"INBURSTPENDING2": {
"direction": "OUT"
},
"PHYCTLWD9": {
"direction": "IN"
},
"TESTINPUT4": {
"direction": "IN"
},
"PHYCTLWD6": {
"direction": "IN"
},
"TESTOUTPUT5": {
"direction": "OUT"
},
"PHYCTLWD28": {
"direction": "IN"
},
"TESTOUTPUT13": {
"direction": "OUT"
},
"PHYCTLREADY": {
"AUXOUTPUT1": {
"direction": "OUT"
},
"PHYCTLWD25": {
@ -39,280 +11,308 @@
"INRANKB1": {
"direction": "OUT"
},
"TESTOUTPUT10": {
"direction": "OUT"
},
"TESTOUTPUT4": {
"direction": "OUT"
},
"PHYCTLWD22": {
"direction": "IN"
},
"TESTINPUT15": {
"direction": "IN"
},
"PHYCTLWD5": {
"direction": "IN"
},
"TESTOUTPUT0": {
"direction": "OUT"
},
"OUTBURSTPENDING2": {
"direction": "OUT"
},
"TESTOUTPUT1": {
"direction": "OUT"
},
"TESTINPUT1": {
"direction": "IN"
},
"INRANKA1": {
"direction": "OUT"
},
"PHYCTLWD3": {
"direction": "IN"
},
"TESTINPUT0": {
"direction": "IN"
},
"PHYCTLWD24": {
"direction": "IN"
},
"AUXOUTPUT0": {
"direction": "OUT"
},
"PHYCTLWD23": {
"direction": "IN"
},
"PHYCTLWD20": {
"direction": "IN"
},
"INBURSTPENDING0": {
"direction": "OUT"
},
"PHYCTLEMPTY": {
"direction": "OUT"
},
"SCANENABLEN": {
"direction": "IN"
},
"PHYCLK": {
"direction": "IN"
},
"PHYCTLWD4": {
"direction": "IN"
},
"OUTBURSTPENDING3": {
"direction": "OUT"
},
"TESTSELECT2": {
"direction": "IN"
},
"PHYCTLWD15": {
"direction": "IN"
},
"PHYCTLWD11": {
"direction": "IN"
},
"PHYCTLWD16": {
"direction": "IN"
},
"RESET": {
"direction": "IN"
},
"PHYCTLWD29": {
"direction": "IN"
},
"PHYCTLALMOSTFULL": {
"direction": "OUT"
},
"TESTOUTPUT11": {
"direction": "OUT"
},
"PHYCTLWD10": {
"direction": "IN"
},
"TESTINPUT6": {
"direction": "IN"
},
"PHYCTLWD14": {
"direction": "IN"
},
"MEMREFCLK": {
"direction": "IN"
},
"PHYCTLWD21": {
"direction": "IN"
},
"INBURSTPENDING1": {
"direction": "OUT"
},
"TESTOUTPUT7": {
"direction": "OUT"
},
"TESTOUTPUT15": {
"direction": "OUT"
},
"TESTINPUT11": {
"direction": "IN"
},
"PHYCTLWD31": {
"direction": "IN"
},
"INBURSTPENDING3": {
"direction": "OUT"
},
"AUXOUTPUT1": {
"direction": "OUT"
},
"PCENABLECALIB1": {
"direction": "OUT"
},
"PHYCTLWD0": {
"direction": "IN"
},
"WRITECALIBENABLE": {
"direction": "IN"
},
"TESTOUTPUT12": {
"direction": "OUT"
},
"INRANKB0": {
"direction": "OUT"
},
"TESTINPUT10": {
"direction": "IN"
},
"TESTINPUT8": {
"direction": "IN"
},
"REFDLLLOCK": {
"direction": "IN"
},
"TESTOUTPUT9": {
"direction": "OUT"
},
"PHYCTLWD7": {
"direction": "IN"
},
"TESTOUTPUT14": {
"direction": "OUT"
},
"OUTBURSTPENDING1": {
"direction": "OUT"
},
"INRANKA0": {
"direction": "OUT"
},
"TESTSELECT0": {
"direction": "IN"
},
"INRANKC1": {
"direction": "OUT"
},
"PHYCTLWD13": {
"direction": "IN"
},
"PLLLOCK": {
"direction": "IN"
},
"TESTINPUT5": {
"direction": "IN"
},
"TESTOUTPUT8": {
"direction": "OUT"
},
"PCENABLECALIB0": {
"direction": "OUT"
},
"PHYCTLWD27": {
"direction": "IN"
},
"TESTINPUT13": {
"direction": "IN"
},
"AUXOUTPUT3": {
"direction": "OUT"
},
"AUXOUTPUT2": {
"direction": "OUT"
},
"PHYCTLFULL": {
"direction": "OUT"
},
"PHYCTLWD19": {
"direction": "IN"
},
"PHYCTLWD1": {
"direction": "IN"
},
"PHYCTLWD26": {
"direction": "IN"
},
"INRANKD0": {
"direction": "OUT"
},
"PHYCTLWD30": {
"direction": "IN"
},
"TESTINPUT14": {
"direction": "IN"
},
"TESTOUTPUT3": {
"direction": "OUT"
},
"PHYCTLWD18": {
"direction": "IN"
},
"TESTOUTPUT2": {
"direction": "OUT"
},
"INRANKC0": {
"TESTINPUT7": {
"direction": "IN"
},
"PHYCTLWD20": {
"direction": "IN"
},
"TESTINPUT10": {
"direction": "IN"
},
"TESTOUTPUT12": {
"direction": "OUT"
},
"PHYCTLWD8": {
"PHYCTLWD18": {
"direction": "IN"
},
"TESTINPUT9": {
"PHYCTLWD14": {
"direction": "IN"
},
"SYNCIN": {
"INBURSTPENDING3": {
"direction": "OUT"
},
"TESTOUTPUT15": {
"direction": "OUT"
},
"PHYCLK": {
"direction": "IN"
},
"PHYCTLWD2": {
"direction": "IN"
},
"TESTINPUT11": {
"direction": "IN"
},
"OUTBURSTPENDING3": {
"direction": "OUT"
},
"MEMREFCLK": {
"direction": "IN"
},
"OUTBURSTPENDING0": {
"direction": "OUT"
},
"PHYCTLWD17": {
"PHYCTLMSTREMPTY": {
"direction": "IN"
},
"TESTINPUT12": {
"direction": "IN"
},
"INRANKD1": {
"OUTBURSTPENDING1": {
"direction": "OUT"
},
"PHYCTLWD12": {
"PHYCTLWD1": {
"direction": "IN"
},
"PHYCTLWD19": {
"direction": "IN"
},
"PHYCTLWD29": {
"direction": "IN"
},
"TESTINPUT3": {
"direction": "IN"
},
"PHYCTLMSTREMPTY": {
"TESTINPUT9": {
"direction": "IN"
},
"PCENABLECALIB1": {
"direction": "OUT"
},
"PHYCTLWD26": {
"direction": "IN"
},
"AUXOUTPUT2": {
"direction": "OUT"
},
"PHYCTLWD5": {
"direction": "IN"
},
"TESTINPUT8": {
"direction": "IN"
},
"READCALIBENABLE": {
"direction": "IN"
},
"PHYCTLWD11": {
"direction": "IN"
},
"TESTSELECT2": {
"direction": "IN"
},
"INBURSTPENDING1": {
"direction": "OUT"
},
"PHYCTLWD27": {
"direction": "IN"
},
"TESTINPUT5": {
"direction": "IN"
},
"TESTOUTPUT10": {
"direction": "OUT"
},
"PHYCTLWD21": {
"direction": "IN"
},
"TESTOUTPUT4": {
"direction": "OUT"
},
"TESTOUTPUT5": {
"direction": "OUT"
},
"TESTINPUT4": {
"direction": "IN"
},
"INRANKA0": {
"direction": "OUT"
},
"TESTOUTPUT8": {
"direction": "OUT"
},
"PHYCTLWD28": {
"direction": "IN"
},
"TESTOUTPUT14": {
"direction": "OUT"
},
"TESTOUTPUT13": {
"direction": "OUT"
},
"PHYCTLWD9": {
"direction": "IN"
},
"PHYCTLWD4": {
"direction": "IN"
},
"INRANKC0": {
"direction": "OUT"
},
"REFDLLLOCK": {
"direction": "IN"
},
"WRITECALIBENABLE": {
"direction": "IN"
},
"PHYCTLWRENABLE": {
"direction": "IN"
},
"TESTINPUT7": {
"PHYCTLREADY": {
"direction": "OUT"
},
"TESTINPUT6": {
"direction": "IN"
},
"INRANKC1": {
"direction": "OUT"
},
"PHYCTLWD8": {
"direction": "IN"
},
"PHYCTLWD15": {
"direction": "IN"
},
"PHYCTLWD17": {
"direction": "IN"
},
"INBURSTPENDING2": {
"direction": "OUT"
},
"INBURSTPENDING0": {
"direction": "OUT"
},
"PHYCTLWD13": {
"direction": "IN"
},
"AUXOUTPUT0": {
"direction": "OUT"
},
"PHYCTLWD10": {
"direction": "IN"
},
"PHYCTLWD7": {
"direction": "IN"
},
"TESTINPUT0": {
"direction": "IN"
},
"RESET": {
"direction": "IN"
},
"PHYCTLFULL": {
"direction": "OUT"
},
"PHYCTLWD24": {
"direction": "IN"
},
"INRANKA1": {
"direction": "OUT"
},
"PHYCTLWD6": {
"direction": "IN"
},
"PHYCTLALMOSTFULL": {
"direction": "OUT"
},
"INRANKD1": {
"direction": "OUT"
},
"INRANKD0": {
"direction": "OUT"
},
"TESTOUTPUT9": {
"direction": "OUT"
},
"PHYCTLWD23": {
"direction": "IN"
},
"PLLLOCK": {
"direction": "IN"
},
"PHYCTLWD12": {
"direction": "IN"
},
"TESTINPUT12": {
"direction": "IN"
},
"PCENABLECALIB0": {
"direction": "OUT"
},
"PHYCTLWD16": {
"direction": "IN"
},
"AUXOUTPUT3": {
"direction": "OUT"
},
"TESTOUTPUT3": {
"direction": "OUT"
},
"PHYCTLWD22": {
"direction": "IN"
},
"TESTOUTPUT0": {
"direction": "OUT"
},
"SYNCIN": {
"direction": "IN"
},
"INRANKB0": {
"direction": "OUT"
},
"TESTSELECT1": {
"direction": "IN"
},
"TESTINPUT13": {
"direction": "IN"
},
"TESTSELECT0": {
"direction": "IN"
},
"TESTOUTPUT11": {
"direction": "OUT"
},
"TESTINPUT14": {
"direction": "IN"
},
"TESTINPUT2": {
"direction": "IN"
},
"TESTINPUT1": {
"direction": "IN"
},
"TESTINPUT15": {
"direction": "IN"
},
"PHYCTLWD31": {
"direction": "IN"
},
"TESTOUTPUT7": {
"direction": "OUT"
},
"PHYCTLEMPTY": {
"direction": "OUT"
},
"OUTBURSTPENDING2": {
"direction": "OUT"
},
"TESTOUTPUT6": {
"direction": "OUT"
},
"PHYCTLWD3": {
"direction": "IN"
},
"TESTOUTPUT1": {
"direction": "OUT"
},
"SCANENABLEN": {
"direction": "IN"
},
"PHYCTLWD0": {
"direction": "IN"
}
},
"type": "PHY_CONTROL",
"site_pips": {}
}
}

854
artix7/site_type_PLLE2_ADV.json
View File

@ -1,493 +1,493 @@
{
"type": "PLLE2_ADV",
"site_pips": {
"CLKINSELINV:CLKINSEL": {
"to_pin": "OUT",
"from_pin": "CLKINSEL"
},
"RSTINV:RST": {
"to_pin": "OUT",
"from_pin": "RST"
},
"RSTINV:RST_B": {
"to_pin": "OUT",
"from_pin": "RST_B"
},
"PWRDWNINV:PWRDWN_B": {
"to_pin": "OUT",
"from_pin": "PWRDWN_B"
},
"CLKINSELINV:CLKINSEL_B": {
"to_pin": "OUT",
"from_pin": "CLKINSEL_B"
},
"PWRDWNINV:PWRDWN": {
"to_pin": "OUT",
"from_pin": "PWRDWN"
}
},
"site_pins": {
"TESTIN17": {
"direction": "IN"
},
"TESTOUT28": {
"direction": "OUT"
},
"TESTOUT22": {
"direction": "OUT"
},
"TESTOUT46": {
"direction": "OUT"
},
"TESTOUT4": {
"direction": "OUT"
},
"CLKOUT2": {
"direction": "OUT"
},
"DADDR0": {
"direction": "IN"
},
"TESTOUT15": {
"direction": "OUT"
},
"DI3": {
"direction": "IN"
},
"TESTOUT27": {
"direction": "OUT"
},
"TESTIN25": {
"direction": "IN"
},
"DO0": {
"direction": "OUT"
},
"TESTOUT25": {
"direction": "OUT"
},
"DI8": {
"direction": "IN"
},
"CLKOUT0": {
"direction": "OUT"
},
"TESTIN28": {
"direction": "IN"
},
"TESTOUT6": {
"direction": "OUT"
},
"TESTOUT31": {
"direction": "OUT"
},
"DADDR2": {
"direction": "IN"
},
"TESTIN12": {
"direction": "IN"
},
"TESTOUT1": {
"direction": "OUT"
},
"TESTOUT12": {
"direction": "OUT"
},
"PWRDWN": {
"direction": "IN"
},
"DO5": {
"direction": "OUT"
},
"TESTIN26": {
"direction": "IN"
},
"DI6": {
"direction": "IN"
},
"TESTIN23": {
"direction": "IN"
},
"DCLK": {
"direction": "IN"
},
"TESTOUT23": {
"direction": "OUT"
},
"CLKINSEL": {
"direction": "IN"
},
"DADDR4": {
"direction": "IN"
},
"TESTIN14": {
"direction": "IN"
},
"TESTOUT9": {
"direction": "OUT"
},
"TESTOUT42": {
"direction": "OUT"
},
"TESTOUT32": {
"direction": "OUT"
},
"TESTOUT39": {
"direction": "OUT"
},
"DI10": {
"direction": "IN"
},
"TESTOUT5": {
"direction": "OUT"
},
"DI12": {
"direction": "IN"
},
"TESTOUT38": {
"direction": "OUT"
},
"DADDR1": {
"direction": "IN"
},
"TESTOUT53": {
"direction": "OUT"
},
"DI5": {
"direction": "IN"
},
"TESTOUT47": {
"direction": "OUT"
},
"CLKFBIN": {
"direction": "IN"
},
"TESTOUT26": {
"direction": "OUT"
},
"TESTIN31": {
"direction": "IN"
},
"DO2": {
"direction": "OUT"
},
"TMUXOUT": {
"direction": "OUT"
},
"TESTOUT30": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"TESTIN30": {
"direction": "IN"
},
"DRDY": {
"direction": "OUT"
},
"TESTIN16": {
"direction": "IN"
},
"DEN": {
"direction": "IN"
},
"TESTOUT52": {
"direction": "OUT"
},
"CLKOUT1": {
"direction": "OUT"
},
"TESTIN4": {
"direction": "IN"
},
"TESTIN2": {
"direction": "IN"
},
"TESTOUT37": {
"direction": "OUT"
},
"TESTOUT0": {
"direction": "OUT"
},
"TESTIN18": {
"direction": "IN"
},
"TESTOUT40": {
"direction": "OUT"
},
"TESTOUT57": {
"direction": "OUT"
},
"CLKOUT3": {
"direction": "OUT"
},
"TESTOUT33": {
"direction": "OUT"
},
"TESTOUT35": {
"direction": "OUT"
},
"TESTOUT20": {
"direction": "OUT"
},
"DO12": {
"direction": "OUT"
},
"TESTOUT59": {
"direction": "OUT"
},
"TESTIN1": {
"direction": "IN"
},
"TESTOUT44": {
"direction": "OUT"
},
"TESTIN22": {
"direction": "IN"
},
"TESTIN3": {
"TESTIN15": {
"direction": "IN"
},
"DO9": {
"direction": "OUT"
},
"TESTOUT58": {
"direction": "OUT"
},
"TESTIN0": {
"direction": "IN"
},
"DO10": {
"direction": "OUT"
},
"TESTOUT17": {
"direction": "OUT"
},
"CLKIN2": {
"direction": "IN"
},
"CLKIN1": {
"direction": "IN"
},
"LOCKED": {
"direction": "OUT"
},
"DO8": {
"direction": "OUT"
},
"DI9": {
"direction": "IN"
},
"DO6": {
"direction": "OUT"
},
"TESTOUT51": {
"direction": "OUT"
},
"TESTOUT34": {
"direction": "OUT"
},
"TESTOUT55": {
"direction": "OUT"
},
"TESTIN29": {
"direction": "IN"
},
"DI13": {
"direction": "IN"
},
"DADDR6": {
"direction": "IN"
},
"DI1": {
"direction": "IN"
},
"TESTIN27": {
"direction": "IN"
},
"TESTOUT3": {
"direction": "OUT"
},
"TESTOUT61": {
"direction": "OUT"
},
"TESTIN15": {
"direction": "IN"
},
"CLKOUT5": {
"direction": "OUT"
},
"DO7": {
"direction": "OUT"
},
"TESTOUT18": {
"direction": "OUT"
},
"DI0": {
"direction": "IN"
},
"TESTIN5": {
"direction": "IN"
},
"TESTOUT43": {
"TESTOUT57": {
"direction": "OUT"
},
"TESTIN21": {
"direction": "IN"
},
"DO3": {
"TMUXOUT": {
"direction": "OUT"
},
"CLKOUT4": {
"direction": "OUT"
},
"DO14": {
"direction": "OUT"
},
"TESTIN9": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"DO4": {
"direction": "OUT"
},
"DO11": {
"direction": "OUT"
},
"TESTIN24": {
"direction": "IN"
},
"TESTOUT19": {
"direction": "OUT"
},
"TESTOUT13": {
"direction": "OUT"
},
"DI7": {
"direction": "IN"
},
"TESTIN7": {
"direction": "IN"
},
"TESTOUT10": {
"direction": "OUT"
},
"TESTOUT60": {
"direction": "OUT"
},
"TESTOUT8": {
"direction": "OUT"
},
"TESTOUT45": {
"direction": "OUT"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTOUT50": {
"direction": "OUT"
},
"DO15": {
"direction": "OUT"
},
"TESTOUT49": {
"direction": "OUT"
},
"TESTOUT21": {
"direction": "OUT"
},
"TESTIN19": {
"CLKIN1": {
"direction": "IN"
},
"DI15": {
"direction": "IN"
},
"TESTOUT29": {
"direction": "OUT"
},
"TESTOUT36": {
"direction": "OUT"
},
"TESTOUT24": {
"direction": "OUT"
},
"TESTOUT54": {
"direction": "OUT"
},
"TESTOUT63": {
"direction": "OUT"
},
"TESTIN10": {
"TESTIN5": {
"direction": "IN"
},
"TESTOUT0": {
"direction": "OUT"
},
"DADDR0": {
"direction": "IN"
},
"TESTOUT21": {
"direction": "OUT"
},
"TESTOUT22": {
"direction": "OUT"
},
"TESTOUT31": {
"direction": "OUT"
},
"TESTOUT14": {
"direction": "OUT"
},
"TESTOUT62": {
"direction": "OUT"
},
"TESTOUT11": {
"direction": "OUT"
},
"DI4": {
"TESTIN17": {
"direction": "IN"
},
"TESTOUT56": {
"direction": "OUT"
},
"TESTIN20": {
"direction": "IN"
},
"DI14": {
"direction": "IN"
},
"TESTOUT16": {
"DO14": {
"direction": "OUT"
},
"TESTOUT2": {
"TESTIN27": {
"direction": "IN"
},
"CLKOUT5": {
"direction": "OUT"
},
"TESTOUT7": {
"direction": "OUT"
},
"TESTOUT43": {
"direction": "OUT"
},
"TESTIN14": {
"direction": "IN"
},
"DRDY": {
"direction": "OUT"
},
"TESTOUT36": {
"direction": "OUT"
},
"DO5": {
"direction": "OUT"
},
"TESTIN25": {
"direction": "IN"
},
"TESTOUT27": {
"direction": "OUT"
},
"TESTOUT8": {
"direction": "OUT"
},
"DADDR6": {
"direction": "IN"
},
"TESTIN7": {
"direction": "IN"
},
"TESTIN3": {
"direction": "IN"
},
"TESTOUT26": {
"direction": "OUT"
},
"TESTOUT40": {
"direction": "OUT"
},
"TESTOUT1": {
"direction": "OUT"
},
"DI3": {
"direction": "IN"
},
"TESTOUT11": {
"direction": "OUT"
},
"TESTOUT51": {
"direction": "OUT"
},
"TESTIN16": {
"direction": "IN"
},
"TESTOUT45": {
"direction": "OUT"
},
"TESTIN8": {
"direction": "IN"
},
"DEN": {
"direction": "IN"
},
"TESTIN22": {
"direction": "IN"
},
"TESTOUT23": {
"direction": "OUT"
},
"TESTOUT48": {
"direction": "OUT"
},
"DADDR1": {
"direction": "IN"
},
"DO3": {
"direction": "OUT"
},
"TESTOUT50": {
"direction": "OUT"
},
"TESTOUT32": {
"direction": "OUT"
},
"CLKFBIN": {
"direction": "IN"
},
"DO8": {
"direction": "OUT"
},
"TESTIN2": {
"direction": "IN"
},
"DO1": {
"direction": "OUT"
},
"TESTIN21": {
"direction": "IN"
},
"DI13": {
"direction": "IN"
},
"DO12": {
"direction": "OUT"
},
"TESTOUT33": {
"direction": "OUT"
},
"DI6": {
"direction": "IN"
},
"TESTIN26": {
"direction": "IN"
},
"CLKINSEL": {
"direction": "IN"
},
"DI8": {
"direction": "IN"
},
"TESTOUT55": {
"direction": "OUT"
},
"TESTOUT60": {
"direction": "OUT"
},
"DADDR4": {
"direction": "IN"
},
"DADDR2": {
"direction": "IN"
},
"TESTOUT4": {
"direction": "OUT"
},
"TESTOUT38": {
"direction": "OUT"
},
"DO10": {
"direction": "OUT"
},
"CLKOUT0": {
"direction": "OUT"
},
"TESTIN30": {
"direction": "IN"
},
"TESTIN18": {
"direction": "IN"
},
"TESTOUT6": {
"direction": "OUT"
},
"TESTOUT58": {
"direction": "OUT"
},
"TESTOUT53": {
"direction": "OUT"
},
"CLKFBOUT": {
"direction": "OUT"
},
"TESTIN28": {
"direction": "IN"
},
"TESTIN9": {
"direction": "IN"
},
"TESTOUT20": {
"direction": "OUT"
},
"TESTIN12": {
"direction": "IN"
},
"DO13": {
"direction": "OUT"
},
"TESTOUT41": {
"direction": "OUT"
},
"DADDR3": {
"direction": "IN"
},
"DWE": {
"direction": "IN"
},
"DI2": {
"direction": "IN"
},
"DADDR5": {
"direction": "IN"
},
"TESTOUT48": {
"DO0": {
"direction": "OUT"
},
"DO1": {
"DO11": {
"direction": "OUT"
},
"TESTIN19": {
"direction": "IN"
},
"DI12": {
"direction": "IN"
},
"LOCKED": {
"direction": "OUT"
},
"TESTIN4": {
"direction": "IN"
},
"TESTOUT15": {
"direction": "OUT"
},
"DO6": {
"direction": "OUT"
},
"TESTOUT19": {
"direction": "OUT"
},
"TESTOUT24": {
"direction": "OUT"
},
"TESTOUT61": {
"direction": "OUT"
},
"TESTOUT59": {
"direction": "OUT"
},
"DI1": {
"direction": "IN"
},
"DI14": {
"direction": "IN"
},
"TESTOUT37": {
"direction": "OUT"
},
"TESTOUT46": {
"direction": "OUT"
},
"CLKOUT1": {
"direction": "OUT"
},
"TESTOUT54": {
"direction": "OUT"
},
"TESTOUT44": {
"direction": "OUT"
},
"TESTOUT29": {
"direction": "OUT"
},
"TESTOUT9": {
"direction": "OUT"
},
"TESTOUT3": {
"direction": "OUT"
},
"TESTIN23": {
"direction": "IN"
},
"DO15": {
"direction": "OUT"
},
"CLKIN2": {
"direction": "IN"
},
"DI10": {
"direction": "IN"
},
"TESTOUT13": {
"direction": "OUT"
},
"DO7": {
"direction": "OUT"
},
"TESTIN6": {
"direction": "IN"
},
"TESTOUT49": {
"direction": "OUT"
},
"TESTOUT5": {
"direction": "OUT"
},
"DI4": {
"direction": "IN"
},
"TESTIN13": {
"direction": "IN"
},
"TESTOUT28": {
"direction": "OUT"
},
"TESTIN1": {
"direction": "IN"
},
"DI5": {
"direction": "IN"
},
"CLKOUT3": {
"direction": "OUT"
},
"TESTOUT34": {
"direction": "OUT"
},
"TESTOUT56": {
"direction": "OUT"
},
"DI11": {
"direction": "IN"
},
"TESTIN6": {
"TESTOUT10": {
"direction": "OUT"
},
"TESTOUT47": {
"direction": "OUT"
},
"TESTIN29": {
"direction": "IN"
},
"TESTIN8": {
"DWE": {
"direction": "IN"
},
"TESTOUT16": {
"direction": "OUT"
},
"TESTOUT35": {
"direction": "OUT"
},
"TESTIN10": {
"direction": "IN"
},
"TESTIN11": {
"direction": "IN"
}
},
"type": "PLLE2_ADV",
"site_pips": {
"CLKINSELINV:CLKINSEL_B": {
"from_pin": "CLKINSEL_B",
"to_pin": "OUT"
},
"PWRDWNINV:PWRDWN": {
"from_pin": "PWRDWN",
"to_pin": "OUT"
"TESTOUT63": {
"direction": "OUT"
},
"PWRDWNINV:PWRDWN_B": {
"from_pin": "PWRDWN_B",
"to_pin": "OUT"
"CLKOUT2": {
"direction": "OUT"
},
"RSTINV:RST": {
"from_pin": "RST",
"to_pin": "OUT"
"DI7": {
"direction": "IN"
},
"RSTINV:RST_B": {
"from_pin": "RST_B",
"to_pin": "OUT"
"DO4": {
"direction": "OUT"
},
"CLKINSELINV:CLKINSEL": {
"from_pin": "CLKINSEL",
"to_pin": "OUT"
"DCLK": {
"direction": "IN"
},
"TESTOUT25": {
"direction": "OUT"
},
"DADDR3": {
"direction": "IN"
},
"TESTOUT41": {
"direction": "OUT"
},
"RST": {
"direction": "IN"
},
"TESTOUT42": {
"direction": "OUT"
},
"TESTOUT52": {
"direction": "OUT"
},
"TESTOUT39": {
"direction": "OUT"
},
"DADDR5": {
"direction": "IN"
},
"TESTOUT17": {
"direction": "OUT"
},
"DO2": {
"direction": "OUT"
},
"TESTIN0": {
"direction": "IN"
},
"TESTOUT12": {
"direction": "OUT"
},
"TESTOUT30": {
"direction": "OUT"
},
"TESTIN24": {
"direction": "IN"
},
"PWRDWN": {
"direction": "IN"
},
"TESTIN31": {
"direction": "IN"
},
"TESTOUT2": {
"direction": "OUT"
},
"DI9": {
"direction": "IN"
},
"TESTOUT18": {
"direction": "OUT"
},
"CLKOUT4": {
"direction": "OUT"
}
}
}

24
artix7/site_type_PMV2.json
View File

@ -1,27 +1,27 @@
{
"type": "PMV2",
"site_pips": {},
"site_pins": {
"A0": {
"direction": "IN"
},
"EN": {
"direction": "IN"
},
"O": {
"direction": "OUT"
},
"ODIV4": {
"direction": "OUT"
"A1": {
"direction": "IN"
},
"A2": {
"direction": "IN"
},
"A1": {
"A0": {
"direction": "IN"
},
"ODIV4": {
"direction": "OUT"
},
"EN": {
"direction": "IN"
},
"ODIV2": {
"direction": "OUT"
}
},
"type": "PMV2",
"site_pips": {}
}
}

978
artix7/site_type_RAMB18E1.json
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2172
artix7/site_type_RAMBFIFO36E1.json
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File diff suppressed because it is too large Load Diff

1256
artix7/site_type_SLICEL.json
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1442
artix7/site_type_SLICEM.json
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62
artix7/site_type_STARTUP.json
View File

@ -1,45 +1,45 @@
{
"type": "STARTUP",
"site_pips": {},
"site_pins": {
"PREQ": {
"direction": "OUT"
},
"EOS": {
"direction": "OUT"
},
"USRDONETS": {
"direction": "IN"
},
"PACK": {
"direction": "IN"
},
"GTS": {
"direction": "IN"
},
"CFGCLK": {
"direction": "OUT"
},
"CLK": {
"direction": "IN"
},
"GSR": {
"direction": "IN"
},
"USRDONEO": {
"direction": "IN"
},
"USRCCLKTS": {
"direction": "IN"
},
"USRCCLKO": {
"direction": "IN"
},
"KEYCLEARB": {
"CFGCLK": {
"direction": "OUT"
},
"USRCCLKTS": {
"direction": "IN"
},
"USRDONETS": {
"direction": "IN"
},
"PREQ": {
"direction": "OUT"
},
"CLK": {
"direction": "IN"
},
"PACK": {
"direction": "IN"
},
"EOS": {
"direction": "OUT"
},
"CFGMCLK": {
"direction": "OUT"
},
"GSR": {
"direction": "IN"
},
"KEYCLEARB": {
"direction": "IN"
},
"USRDONEO": {
"direction": "IN"
}
},
"type": "STARTUP",
"site_pips": {}
}
}

6
artix7/site_type_TIEOFF.json
View File

@ -1,4 +1,6 @@
{
"type": "TIEOFF",
"site_pips": {},
"site_pins": {
"HARD1": {
"direction": "OUT"
@ -6,7 +8,5 @@
"HARD0": {
"direction": "OUT"
}
},
"type": "TIEOFF",
"site_pips": {}
}
}

138
artix7/site_type_USR_ACCESS.json
View File

@ -1,84 +1,62 @@
{
"type": "USR_ACCESS",
"site_pips": {},
"site_pins": {
"DATA5": {
"direction": "OUT"
},
"DATA16": {
"direction": "OUT"
},
"DATA1": {
"direction": "OUT"
},
"DATA26": {
"direction": "OUT"
},
"DATA7": {
"direction": "OUT"
},
"DATA2": {
"direction": "OUT"
},
"DATA12": {
"direction": "OUT"
},
"DATA11": {
"direction": "OUT"
},
"DATA19": {
"direction": "OUT"
},
"DATA0": {
"direction": "OUT"
},
"DATA15": {
"direction": "OUT"
},
"DATA31": {
"direction": "OUT"
},
"DATA28": {
"direction": "OUT"
},
"DATA10": {
"direction": "OUT"
},
"DATA24": {
"direction": "OUT"
},
"DATA3": {
"direction": "OUT"
},
"DATAVALID": {
"DATA20": {
"direction": "OUT"
},
"DATA17": {
"direction": "OUT"
},
"DATA25": {
"DATA24": {
"direction": "OUT"
},
"DATA13": {
"direction": "OUT"
},
"DATA14": {
"direction": "OUT"
},
"DATA0": {
"direction": "OUT"
},
"DATA1": {
"direction": "OUT"
},
"DATA27": {
"direction": "OUT"
},
"DATA9": {
"direction": "OUT"
},
"DATA29": {
"direction": "OUT"
},
"DATA18": {
"DATA4": {
"direction": "OUT"
},
"CFGCLK": {
"direction": "OUT"
},
"DATA6": {
"DATA11": {
"direction": "OUT"
},
"DATA23": {
"DATA9": {
"direction": "OUT"
},
"DATA30": {
"direction": "OUT"
},
"DATA10": {
"direction": "OUT"
},
"DATA29": {
"direction": "OUT"
},
"DATA31": {
"direction": "OUT"
},
"DATA15": {
"direction": "OUT"
},
"DATA18": {
"direction": "OUT"
},
"DATA8": {
@ -87,22 +65,44 @@
"DATA22": {
"direction": "OUT"
},
"DATA23": {
"direction": "OUT"
},
"DATA6": {
"direction": "OUT"
},
"DATA25": {
"direction": "OUT"
},
"DATA5": {
"direction": "OUT"
},
"DATA3": {
"direction": "OUT"
},
"DATA16": {
"direction": "OUT"
},
"DATA12": {
"direction": "OUT"
},
"DATA19": {
"direction": "OUT"
},
"DATA26": {
"direction": "OUT"
},
"DATA7": {
"direction": "OUT"
},
"DATA28": {
"direction": "OUT"
},
"DATA21": {
"direction": "OUT"
},
"DATA14": {
"direction": "OUT"
},
"DATA30": {
"direction": "OUT"
},
"DATA4": {
"direction": "OUT"
},
"DATA20": {
"DATAVALID": {
"direction": "OUT"
}
},
"type": "USR_ACCESS",
"site_pips": {}
}
}

1256
artix7/site_type_XADC.json
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906
artix7/tile_type_BRAM_INT_INTERFACE_L.json
View File

@ -1,476 +1,476 @@
{
"wires": [
"INT_INTERFACE_BRAM_IMUX33",
"INT_INTERFACE_LOGIC_OUTS_L_B2",
"INT_INTERFACE_BYP5",
"INT_INTERFACE_BRAM_UTURN_IMUX24",
"INT_INTERFACE_BRAM_IMUX41",
"INT_INTERFACE_LOGIC_OUTS_L_B6",
"INT_INTERFACE_BRAM_IMUX4",
"INT_INTERFACE_NW4END2",
"INT_INTERFACE_NW4A1",
"INT_INTERFACE_BRAM_IMUX13",
"INT_INTERFACE_WW4B3",
"INT_INTERFACE_BYP4",
"INT_INTERFACE_BRAM_IMUX38",
"INT_INTERFACE_EE4B2",
"INT_INTERFACE_LOGIC_OUTS_L_B23",
"INT_INTERFACE_BRAM_UTURN_IMUX1",
"INT_INTERFACE_WW2END2",
"INT_INTERFACE_WL1END3",
"INT_INTERFACE_SE4C1",
"INT_INTERFACE_BRAM_UTURN_IMUX29",
"INT_INTERFACE_NW4END0",
"INT_INTERFACE_SE4C2",
"INT_INTERFACE_BRAM_IMUX7",
"INT_INTERFACE_LH10",
"INT_INTERFACE_NW4END1",
"INT_INTERFACE_LOGIC_OUTS_L_B1",
"INT_INTERFACE_BRAM_IMUX11",
"INT_INTERFACE_SW4A0",
"INT_INTERFACE_BRAM_IMUX21",
"INT_INTERFACE_BRAM_UTURN_IMUX34",
"INT_INTERFACE_LOGIC_OUTS_L_B22",
"INT_INTERFACE_LOGIC_OUTS_L_B5",
"INT_INTERFACE_EE4A1",
"INT_INTERFACE_EE2A1",
"INT_INTERFACE_LOGIC_OUTS_L19",
"INT_INTERFACE_BRAM_UTURN_IMUX35",
"INT_INTERFACE_LH1",
"INT_INTERFACE_BYP6",
"INT_INTERFACE_NE4BEG1",
"INT_INTERFACE_BRAM_IMUX6",
"INT_INTERFACE_BRAM_UTURN_IMUX25",
"INT_INTERFACE_FAN5",
"INT_INTERFACE_BRAM_UTURN_IMUX23",
"INT_INTERFACE_CLK0",
"INT_INTERFACE_LOGIC_OUTS_L22",
"INT_INTERFACE_BRAM_UTURN_IMUX44",
"INT_INTERFACE_BRAM_IMUX10",
"INT_INTERFACE_BYP3",
"INT_INTERFACE_NW2A1",
"INT_INTERFACE_EE2BEG1",
"INT_INTERFACE_EL1BEG2",
"INT_INTERFACE_LOGIC_OUTS_L4",
"INT_INTERFACE_BRAM_UTURN_IMUX30",
"INT_INTERFACE_LH6",
"INT_INTERFACE_SW4A3",
"INT_INTERFACE_BRAM_UTURN_IMUX41",
"INT_INTERFACE_SE4BEG1",
"INT_INTERFACE_BRAM_UTURN_IMUX4",
"INT_INTERFACE_LOGIC_OUTS_L_B18",
"INT_INTERFACE_BRAM_IMUX8",
"INT_INTERFACE_BRAM_UTURN_IMUX21",
"INT_INTERFACE_BRAM_IMUX14",
"INT_INTERFACE_LOGIC_OUTS_L13",
"INT_INTERFACE_NE4BEG2",
"INT_INTERFACE_BLOCK_OUTS_L_B2",
"INT_INTERFACE_BRAM_UTURN_IMUX6",
"INT_INTERFACE_BRAM_IMUX24",
"INT_INTERFACE_EE4C0",
"INT_INTERFACE_WW4A2",
"INT_INTERFACE_NE2A3",
"INT_INTERFACE_BRAM_IMUX22",
"INT_INTERFACE_LOGIC_OUTS_L1",
"INT_INTERFACE_BRAM_UTURN_IMUX20",
"INT_INTERFACE_EL1BEG3",
"INT_INTERFACE_NE2A0",
"INT_INTERFACE_EE4A3",
"INT_INTERFACE_NW2A2",
"INT_INTERFACE_FAN6",
"INT_INTERFACE_ER1BEG2",
"INT_INTERFACE_LOGIC_OUTS_L5",
"INT_INTERFACE_EE4C2",
"INT_INTERFACE_LOGIC_OUTS_L3",
"INT_INTERFACE_SW2A0",
"INT_INTERFACE_LOGIC_OUTS_L7",
"INT_INTERFACE_BRAM_IMUX19",
"INT_INTERFACE_LOGIC_OUTS_L0",
"INT_INTERFACE_NE4C3",
"INT_INTERFACE_LOGIC_OUTS_L_B7",
"INT_INTERFACE_WW2END1",
"INT_INTERFACE_MONITOR_N",
"INT_INTERFACE_LOGIC_OUTS_L_B9",
"INT_INTERFACE_BRAM_IMUX17",
"INT_INTERFACE_EE2A0",
"L_INT_INTER_DQS_IOTOPHASER",
"INT_INTERFACE_BRAM_UTURN_IMUX7",
"INT_INTERFACE_BRAM_UTURN_IMUX33",
"INT_INTERFACE_BRAM_IMUX26",
"INT_INTERFACE_LOGIC_OUTS_L_B15",
"INT_INTERFACE_BRAM_IMUX44",
"INT_INTERFACE_NW2A0",
"INT_INTERFACE_BRAM_IMUX39",
"INT_INTERFACE_EE4C3",
"INT_INTERFACE_LH4",
"INT_INTERFACE_BRAM_UTURN_IMUX31",
"INT_INTERFACE_WR1END2",
"INT_INTERFACE_FAN2",
"INT_INTERFACE_PHASER_TO_IO_OCLKDIV",
"INT_INTERFACE_LOGIC_OUTS_L21",
"INT_INTERFACE_BRAM_IMUX12",
"INT_INTERFACE_BRAM_UTURN_IMUX32",
"INT_INTERFACE_WW2A0",
"INT_INTERFACE_BRAM_IMUX28",
"INT_INTERFACE_NW4A0",
"INT_INTERFACE_SE4BEG2",
"INT_INTERFACE_BRAM_IMUX27",
"INT_INTERFACE_LOGIC_OUTS_L18",
"INT_INTERFACE_BRAM_UTURN_IMUX22",
"INT_INTERFACE_LOGIC_OUTS_L14",
"INT_INTERFACE_LOGIC_OUTS_L_B20",
"INT_INTERFACE_LOGIC_OUTS_L11",
"INT_INTERFACE_SW4END0",
"INT_INTERFACE_BRAM_UTURN_IMUX27",
"INT_INTERFACE_BRAM_UTURN_IMUX5",
"INT_INTERFACE_WW2A1",
"INT_INTERFACE_SW4END3",
"INT_INTERFACE_SE4C3",
"INT_INTERFACE_NE4C0",
"INT_INTERFACE_WL1END0",
"INT_INTERFACE_BYP1",
"INT_INTERFACE_BRAM_IMUX23",
"INT_INTERFACE_WR1END3",
"INT_INTERFACE_LOGIC_OUTS_L_B19",
"INT_INTERFACE_WW4C3",
"INT_INTERFACE_LH8",
"INT_INTERFACE_BRAM_UTURN_IMUX46",
"INT_INTERFACE_FAN1",
"INT_INTERFACE_LOGIC_OUTS_L23",
"INT_INTERFACE_EE4BEG0",
"INT_INTERFACE_CLK1",
"INT_INTERFACE_SE4BEG0",
"INT_INTERFACE_LOGIC_OUTS_L_B14",
"INT_INTERFACE_BRAM_UTURN_IMUX16",
"INT_INTERFACE_LOGIC_OUTS_L_B17",
"INT_INTERFACE_BRAM_IMUX46",
"INT_INTERFACE_BRAM_IMUX16",
"INT_INTERFACE_LOGIC_OUTS_L8",
"INT_INTERFACE_WW4END2",
"INT_INTERFACE_NE4BEG3",
"INT_INTERFACE_BRAM_UTURN_IMUX15",
"INT_INTERFACE_WW2A3",
"INT_INTERFACE_BRAM_UTURN_IMUX37",
"INT_INTERFACE_BRAM_IMUX42",
"INT_INTERFACE_LH7",
"INT_INTERFACE_ER1BEG3",
"INT_INTERFACE_SW2A3",
"INT_INTERFACE_LOGIC_OUTS_L20",
"INT_INTERFACE_SW2A2",
"INT_INTERFACE_BRAM_UTURN_IMUX3",
"INT_INTERFACE_BRAM_IMUX18",
"INT_INTERFACE_LH5",
"INT_INTERFACE_SW4END2",
"INT_INTERFACE_PHASER_TO_IO_OCLK",
"INT_INTERFACE_FAN3",
"INT_INTERFACE_NW4A2",
"INT_INTERFACE_BRAM_UTURN_IMUX28",
"INT_INTERFACE_SW4A1",
"INT_INTERFACE_BRAM_IMUX35",
"INT_INTERFACE_EE4BEG3",
"INT_INTERFACE_BRAM_IMUX20",
"INT_INTERFACE_LOGIC_OUTS_L_B4",
"INT_INTERFACE_LOGIC_OUTS_L2",
"INT_INTERFACE_SE2A1",
"INT_INTERFACE_WL1END1",
"INT_INTERFACE_BYP2",
"INT_INTERFACE_NE4C2",
"INT_INTERFACE_BRAM_IMUX30",
"INT_INTERFACE_BRAM_UTURN_IMUX38",
"INT_INTERFACE_BRAM_IMUX32",
"INT_INTERFACE_WR1END1",
"INT_INTERFACE_EE2BEG2",
"INT_INTERFACE_NW4A3",
"INT_INTERFACE_MONITOR_P",
"INT_INTERFACE_EE4B0",
"INT_INTERFACE_WR1END0",
"INT_INTERFACE_BRAM_IMUX5",
"INT_INTERFACE_BRAM_UTURN_IMUX36",
"INT_INTERFACE_CTRL1",
"INT_INTERFACE_BRAM_IMUX36",
"INT_INTERFACE_EL1BEG0",
"INT_INTERFACE_NE2A2",
"INT_INTERFACE_BRAM_IMUX9",
"INT_INTERFACE_LOGIC_OUTS_L10",
"INT_INTERFACE_EE2BEG3",
"INT_INTERFACE_WW4A3",
"INT_INTERFACE_NW2A3",
"INT_INTERFACE_EE2BEG0",
"INT_INTERFACE_CTRL0",
"INT_INTERFACE_ER1BEG0",
"INT_INTERFACE_LOGIC_OUTS_L_B13",
"INT_INTERFACE_WW2END3",
"INT_INTERFACE_LH2",
"INT_INTERFACE_BRAM_UTURN_IMUX18",
"INT_INTERFACE_BRAM_UTURN_IMUX11",
"INT_INTERFACE_BRAM_UTURN_IMUX19",
"INT_INTERFACE_WW4END0",
"INT_INTERFACE_SE4BEG3",
"INT_INTERFACE_BRAM_UTURN_IMUX10",
"INT_INTERFACE_WW4B1",
"INT_INTERFACE_EE4A2",
"INT_INTERFACE_SE2A2",
"INT_INTERFACE_BRAM_UTURN_IMUX12",
"INT_INTERFACE_BRAM_UTURN_IMUX39",
"INT_INTERFACE_WW4C0",
"INT_INTERFACE_BRAM_IMUX2",
"INT_INTERFACE_EE4C1",
"INT_INTERFACE_NE4BEG0",
"INT_INTERFACE_BRAM_IMUX45",
"INT_INTERFACE_PHASER_TO_IO_OCLK1X_90",
"INT_INTERFACE_EL1BEG1",
"INT_INTERFACE_BRAM_UTURN_IMUX42",
"INT_INTERFACE_BYP7",
"INT_INTERFACE_BRAM_IMUX40",
"INT_INTERFACE_LH12",
"INT_INTERFACE_BRAM_IMUX0",
"INT_INTERFACE_LH9",
"INT_INTERFACE_BRAM_UTURN_IMUX47",
"INT_INTERFACE_LOGIC_OUTS_L_B10",
"INT_INTERFACE_LOGIC_OUTS_L6",
"INT_INTERFACE_LOGIC_OUTS_L_B12",
"INT_INTERFACE_SW2A1",
"INT_INTERFACE_BLOCK_OUTS_L_B0",
"INT_INTERFACE_NW4END3",
"INT_INTERFACE_BRAM_UTURN_IMUX43",
"INT_INTERFACE_PHASER_TO_IO_ICLKDIV",
"INT_INTERFACE_BRAM_IMUX1",
"INT_INTERFACE_BRAM_UTURN_IMUX40",
"INT_INTERFACE_NE4C1",
"INT_INTERFACE_WW4END1",
"INT_INTERFACE_WL1END2",
"INT_INTERFACE_WW4C2",
"INT_INTERFACE_LOGIC_OUTS_L12",
"INT_INTERFACE_LOGIC_OUTS_L_B21",
"INT_INTERFACE_LOGIC_OUTS_L_B0",
"INT_INTERFACE_BRAM_IMUX31",
"INT_INTERFACE_BRAM_IMUX15",
"INT_INTERFACE_LOGIC_OUTS_L_B3",
"INT_INTERFACE_WW2A2",
"INT_INTERFACE_WW4END3",
"INT_INTERFACE_LH11",
"INT_INTERFACE_BRAM_UTURN_IMUX17",
"INT_INTERFACE_SE2A3",
"INT_INTERFACE_LOGIC_OUTS_L_B16",
"INT_INTERFACE_WW4C1",
"INT_INTERFACE_LOGIC_OUTS_L_B11",
"INT_INTERFACE_SE2A0",
"INT_INTERFACE_EE2A3",
"INT_INTERFACE_EE4BEG1",
"INT_INTERFACE_SW4A2",
"INT_INTERFACE_BRAM_IMUX3",
"INT_INTERFACE_EE4B3",
"INT_INTERFACE_BRAM_IMUX34",
"INT_INTERFACE_SE4C0",
"INT_INTERFACE_LOGIC_OUTS_L15",
"INT_INTERFACE_BRAM_UTURN_IMUX13",
"INT_INTERFACE_BLOCK_OUTS_L_B1",
"INT_INTERFACE_BRAM_IMUX47",
"INT_INTERFACE_EE2A2",
"INT_INTERFACE_BRAM_UTURN_IMUX0",
"INT_INTERFACE_LOGIC_OUTS_L_B8",
"INT_INTERFACE_EE4A0",
"INT_INTERFACE_BRAM_UTURN_IMUX45",
"INT_INTERFACE_EE4BEG2",
"INT_INTERFACE_FAN7",
"INT_INTERFACE_BRAM_UTURN_IMUX9",
"INT_INTERFACE_WW4B2",
"INT_INTERFACE_NE2A1",
"INT_INTERFACE_PHASER_TO_IO_ICLK",
"INT_INTERFACE_LOGIC_OUTS_L16",
"INT_INTERFACE_WW4B0",
"INT_INTERFACE_BYP0",
"INT_INTERFACE_EE4B1",
"INT_INTERFACE_BRAM_IMUX29",
"INT_INTERFACE_BRAM_IMUX25",
"INT_INTERFACE_BRAM_UTURN_IMUX14",
"INT_INTERFACE_FAN4",
"INT_INTERFACE_BRAM_UTURN_IMUX26",
"INT_INTERFACE_FAN0",
"INT_INTERFACE_BLOCK_OUTS_L_B3",
"INT_INTERFACE_ER1BEG1",
"INT_INTERFACE_BRAM_UTURN_IMUX8",
"INT_INTERFACE_BRAM_IMUX43",
"INT_INTERFACE_LOGIC_OUTS_L17",
"INT_INTERFACE_BRAM_IMUX37",
"INT_INTERFACE_SW4END1",
"INT_INTERFACE_WW2END0",
"INT_INTERFACE_LH3",
"INT_INTERFACE_WW4A1",
"INT_INTERFACE_WW4A0",
"INT_INTERFACE_BRAM_UTURN_IMUX2",
"INT_INTERFACE_LOGIC_OUTS_L9"
],
"sites": [],
"pips": {
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B2->>INT_INTERFACE_LOGIC_OUTS_L2": {
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B0->>INT_INTERFACE_LOGIC_OUTS_L0": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B0",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L2",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B2",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B1->>INT_INTERFACE_LOGIC_OUTS_L1": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L1",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B1",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B6->>INT_INTERFACE_LOGIC_OUTS_L6": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L6",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B6",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B21->>INT_INTERFACE_LOGIC_OUTS_L21": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L21",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B21",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B9->>INT_INTERFACE_LOGIC_OUTS_L9": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L9",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B9",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B12->>INT_INTERFACE_LOGIC_OUTS_L12": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L12",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B12",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B3->>INT_INTERFACE_LOGIC_OUTS_L3": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L3",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B3",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B22->>INT_INTERFACE_LOGIC_OUTS_L22": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L22",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B22",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B18->>INT_INTERFACE_LOGIC_OUTS_L18": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L18",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B18",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B19->>INT_INTERFACE_LOGIC_OUTS_L19": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L19",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B19",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B13->>INT_INTERFACE_LOGIC_OUTS_L13": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L13",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B13",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B0->>INT_INTERFACE_LOGIC_OUTS_L0": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L0",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B0",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B8->>INT_INTERFACE_LOGIC_OUTS_L8": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L8",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B8",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B23->>INT_INTERFACE_LOGIC_OUTS_L23": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L23",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B23",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B5->>INT_INTERFACE_LOGIC_OUTS_L5": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L5",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B5",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B4->>INT_INTERFACE_LOGIC_OUTS_L4": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L4",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B4",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B7->>INT_INTERFACE_LOGIC_OUTS_L7": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L7",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B7",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B16->>INT_INTERFACE_LOGIC_OUTS_L16": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L16",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B16",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B17->>INT_INTERFACE_LOGIC_OUTS_L17": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L17",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B17",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B15->>INT_INTERFACE_LOGIC_OUTS_L15": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L15",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B15",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L12"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B14->>INT_INTERFACE_LOGIC_OUTS_L14": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L14",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B14",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B20->>INT_INTERFACE_LOGIC_OUTS_L20": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L20",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B20",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L14"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B10->>INT_INTERFACE_LOGIC_OUTS_L10": {
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B5->>INT_INTERFACE_LOGIC_OUTS_L5": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B5",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L10",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B10",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L5"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B22->>INT_INTERFACE_LOGIC_OUTS_L22": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B22",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L22"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B21->>INT_INTERFACE_LOGIC_OUTS_L21": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B21",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L21"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B1->>INT_INTERFACE_LOGIC_OUTS_L1": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B1",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L1"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B9->>INT_INTERFACE_LOGIC_OUTS_L9": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B9",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L9"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B18->>INT_INTERFACE_LOGIC_OUTS_L18": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B18",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L18"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B23->>INT_INTERFACE_LOGIC_OUTS_L23": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B23",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L23"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B6->>INT_INTERFACE_LOGIC_OUTS_L6": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B6",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L6"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B3->>INT_INTERFACE_LOGIC_OUTS_L3": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B3",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L3"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B17->>INT_INTERFACE_LOGIC_OUTS_L17": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B17",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L17"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B15->>INT_INTERFACE_LOGIC_OUTS_L15": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B15",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L15"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B4->>INT_INTERFACE_LOGIC_OUTS_L4": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B4",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L4"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B19->>INT_INTERFACE_LOGIC_OUTS_L19": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B19",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L19"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B11->>INT_INTERFACE_LOGIC_OUTS_L11": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L11",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B11",
"is_pseudo": "0"
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L11"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B7->>INT_INTERFACE_LOGIC_OUTS_L7": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B7",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L7"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B20->>INT_INTERFACE_LOGIC_OUTS_L20": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B20",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L20"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B2->>INT_INTERFACE_LOGIC_OUTS_L2": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B2",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L2"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B13->>INT_INTERFACE_LOGIC_OUTS_L13": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B13",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L13"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B16->>INT_INTERFACE_LOGIC_OUTS_L16": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B16",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L16"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B10->>INT_INTERFACE_LOGIC_OUTS_L10": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B10",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L10"
},
"BRAM_INT_INTERFACE_L.INT_INTERFACE_LOGIC_OUTS_L_B8->>INT_INTERFACE_LOGIC_OUTS_L8": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_L_B8",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS_L8"
}
},
"tile_type": "BRAM_INT_INTERFACE_L"
"wires": [
"INT_INTERFACE_SE4BEG1",
"INT_INTERFACE_WL1END2",
"INT_INTERFACE_WR1END1",
"INT_INTERFACE_LOGIC_OUTS_L_B11",
"INT_INTERFACE_LOGIC_OUTS_L13",
"INT_INTERFACE_EE4A1",
"INT_INTERFACE_LOGIC_OUTS_L_B3",
"INT_INTERFACE_WW4A1",
"INT_INTERFACE_LOGIC_OUTS_L19",
"INT_INTERFACE_BRAM_IMUX9",
"INT_INTERFACE_LOGIC_OUTS_L_B6",
"INT_INTERFACE_SW2A2",
"INT_INTERFACE_LOGIC_OUTS_L1",
"INT_INTERFACE_SW2A3",
"INT_INTERFACE_BRAM_UTURN_IMUX25",
"INT_INTERFACE_SE4BEG2",
"INT_INTERFACE_BRAM_IMUX28",
"INT_INTERFACE_WW4A3",
"INT_INTERFACE_CLK1",
"INT_INTERFACE_LH8",
"INT_INTERFACE_BRAM_UTURN_IMUX41",
"INT_INTERFACE_BRAM_IMUX22",
"INT_INTERFACE_WW4C0",
"INT_INTERFACE_WW4B1",
"INT_INTERFACE_BLOCK_OUTS_L_B0",
"INT_INTERFACE_BRAM_IMUX16",
"INT_INTERFACE_WW2A2",
"INT_INTERFACE_EE4A2",
"INT_INTERFACE_WW2END0",
"INT_INTERFACE_LOGIC_OUTS_L_B1",
"INT_INTERFACE_BRAM_IMUX43",
"INT_INTERFACE_BRAM_IMUX45",
"INT_INTERFACE_EE4C1",
"INT_INTERFACE_BRAM_IMUX7",
"INT_INTERFACE_BRAM_UTURN_IMUX14",
"INT_INTERFACE_SW4A3",
"INT_INTERFACE_EE2BEG3",
"INT_INTERFACE_NE4BEG2",
"INT_INTERFACE_WW2END1",
"INT_INTERFACE_SE4C3",
"INT_INTERFACE_LH11",
"INT_INTERFACE_LOGIC_OUTS_L_B7",
"INT_INTERFACE_SE4C0",
"INT_INTERFACE_EE4BEG2",
"INT_INTERFACE_BRAM_IMUX36",
"INT_INTERFACE_BYP7",
"INT_INTERFACE_BRAM_UTURN_IMUX28",
"INT_INTERFACE_LOGIC_OUTS_L8",
"INT_INTERFACE_BRAM_UTURN_IMUX42",
"INT_INTERFACE_ER1BEG2",
"INT_INTERFACE_WW2END2",
"INT_INTERFACE_EE4BEG3",
"INT_INTERFACE_SE4BEG0",
"INT_INTERFACE_WL1END1",
"INT_INTERFACE_PHASER_TO_IO_OCLK1X_90",
"INT_INTERFACE_NE2A0",
"INT_INTERFACE_BRAM_IMUX19",
"INT_INTERFACE_FAN0",
"INT_INTERFACE_LOGIC_OUTS_L_B4",
"INT_INTERFACE_LOGIC_OUTS_L_B10",
"INT_INTERFACE_BRAM_IMUX3",
"INT_INTERFACE_LOGIC_OUTS_L5",
"INT_INTERFACE_BRAM_IMUX14",
"INT_INTERFACE_EE2BEG1",
"INT_INTERFACE_LOGIC_OUTS_L_B14",
"INT_INTERFACE_BRAM_IMUX40",
"INT_INTERFACE_LOGIC_OUTS_L_B5",
"INT_INTERFACE_EL1BEG0",
"INT_INTERFACE_BRAM_UTURN_IMUX29",
"INT_INTERFACE_BRAM_UTURN_IMUX8",
"INT_INTERFACE_BRAM_UTURN_IMUX22",
"INT_INTERFACE_BRAM_IMUX12",
"INT_INTERFACE_MONITOR_P",
"INT_INTERFACE_CLK0",
"INT_INTERFACE_LOGIC_OUTS_L_B20",
"INT_INTERFACE_NW4A1",
"INT_INTERFACE_BRAM_UTURN_IMUX7",
"INT_INTERFACE_BLOCK_OUTS_L_B2",
"INT_INTERFACE_WR1END0",
"INT_INTERFACE_NW4END0",
"INT_INTERFACE_EE2A2",
"INT_INTERFACE_BRAM_UTURN_IMUX26",
"INT_INTERFACE_BYP0",
"INT_INTERFACE_BRAM_UTURN_IMUX39",
"INT_INTERFACE_BRAM_UTURN_IMUX44",
"INT_INTERFACE_FAN6",
"INT_INTERFACE_SW2A0",
"INT_INTERFACE_BRAM_UTURN_IMUX46",
"INT_INTERFACE_NW4END3",
"INT_INTERFACE_BRAM_IMUX18",
"INT_INTERFACE_EE4B0",
"INT_INTERFACE_LOGIC_OUTS_L22",
"INT_INTERFACE_SW4END0",
"INT_INTERFACE_NE4C0",
"INT_INTERFACE_EE4A3",
"INT_INTERFACE_LOGIC_OUTS_L3",
"INT_INTERFACE_WW4C2",
"INT_INTERFACE_BRAM_IMUX5",
"INT_INTERFACE_EE4C2",
"INT_INTERFACE_WW4B3",
"INT_INTERFACE_EE2BEG2",
"INT_INTERFACE_BRAM_UTURN_IMUX19",
"INT_INTERFACE_EE4C3",
"INT_INTERFACE_WW4C1",
"INT_INTERFACE_SE4C2",
"INT_INTERFACE_BRAM_IMUX32",
"INT_INTERFACE_BLOCK_OUTS_L_B1",
"INT_INTERFACE_BRAM_IMUX15",
"INT_INTERFACE_LOGIC_OUTS_L23",
"INT_INTERFACE_LOGIC_OUTS_L11",
"INT_INTERFACE_BRAM_IMUX37",
"INT_INTERFACE_EL1BEG1",
"INT_INTERFACE_PHASER_TO_IO_ICLKDIV",
"INT_INTERFACE_WL1END3",
"INT_INTERFACE_BRAM_IMUX27",
"INT_INTERFACE_SW4A2",
"INT_INTERFACE_ER1BEG3",
"INT_INTERFACE_LH6",
"INT_INTERFACE_BRAM_UTURN_IMUX38",
"INT_INTERFACE_SW4A1",
"INT_INTERFACE_SW4A0",
"INT_INTERFACE_BYP2",
"INT_INTERFACE_BRAM_UTURN_IMUX3",
"INT_INTERFACE_NE2A1",
"INT_INTERFACE_WL1END0",
"INT_INTERFACE_LOGIC_OUTS_L_B19",
"INT_INTERFACE_WW4B0",
"INT_INTERFACE_CTRL0",
"INT_INTERFACE_WW2END3",
"INT_INTERFACE_LOGIC_OUTS_L_B16",
"INT_INTERFACE_NE4BEG3",
"INT_INTERFACE_BRAM_IMUX8",
"INT_INTERFACE_SE2A0",
"INT_INTERFACE_PHASER_TO_IO_ICLK",
"INT_INTERFACE_LOGIC_OUTS_L_B9",
"INT_INTERFACE_EE4B2",
"INT_INTERFACE_NE2A2",
"INT_INTERFACE_BRAM_UTURN_IMUX31",
"INT_INTERFACE_BRAM_UTURN_IMUX32",
"INT_INTERFACE_NW2A1",
"INT_INTERFACE_BRAM_UTURN_IMUX33",
"INT_INTERFACE_FAN7",
"INT_INTERFACE_EE2BEG0",
"INT_INTERFACE_LH1",
"INT_INTERFACE_BRAM_UTURN_IMUX37",
"INT_INTERFACE_BRAM_IMUX17",
"INT_INTERFACE_BRAM_IMUX13",
"INT_INTERFACE_LH5",
"INT_INTERFACE_BRAM_UTURN_IMUX4",
"INT_INTERFACE_SW4END2",
"INT_INTERFACE_LH4",
"INT_INTERFACE_LH12",
"INT_INTERFACE_LOGIC_OUTS_L18",
"INT_INTERFACE_NW2A3",
"INT_INTERFACE_LOGIC_OUTS_L16",
"INT_INTERFACE_BRAM_IMUX2",
"INT_INTERFACE_BRAM_UTURN_IMUX36",
"INT_INTERFACE_LOGIC_OUTS_L_B8",
"INT_INTERFACE_BRAM_UTURN_IMUX2",
"INT_INTERFACE_LOGIC_OUTS_L2",
"INT_INTERFACE_BRAM_UTURN_IMUX0",
"INT_INTERFACE_LOGIC_OUTS_L_B12",
"INT_INTERFACE_EL1BEG3",
"INT_INTERFACE_LOGIC_OUTS_L_B15",
"INT_INTERFACE_BLOCK_OUTS_L_B3",
"INT_INTERFACE_SE4BEG3",
"INT_INTERFACE_BRAM_IMUX39",
"INT_INTERFACE_LOGIC_OUTS_L_B22",
"INT_INTERFACE_LOGIC_OUTS_L_B0",
"INT_INTERFACE_LOGIC_OUTS_L_B17",
"INT_INTERFACE_BRAM_IMUX31",
"INT_INTERFACE_LOGIC_OUTS_L_B2",
"INT_INTERFACE_WW4END1",
"INT_INTERFACE_BRAM_IMUX29",
"INT_INTERFACE_BRAM_UTURN_IMUX45",
"INT_INTERFACE_BRAM_IMUX21",
"INT_INTERFACE_WW2A3",
"INT_INTERFACE_BRAM_IMUX4",
"INT_INTERFACE_BRAM_IMUX0",
"INT_INTERFACE_BRAM_UTURN_IMUX6",
"INT_INTERFACE_SE4C1",
"INT_INTERFACE_NE4C2",
"INT_INTERFACE_LOGIC_OUTS_L_B13",
"INT_INTERFACE_BRAM_UTURN_IMUX18",
"INT_INTERFACE_WW4END2",
"INT_INTERFACE_PHASER_TO_IO_OCLK",
"INT_INTERFACE_EE2A3",
"INT_INTERFACE_BRAM_UTURN_IMUX1",
"INT_INTERFACE_EE4A0",
"INT_INTERFACE_WW4A0",
"INT_INTERFACE_FAN4",
"INT_INTERFACE_BYP1",
"INT_INTERFACE_FAN3",
"INT_INTERFACE_BYP3",
"INT_INTERFACE_BRAM_UTURN_IMUX35",
"INT_INTERFACE_CTRL1",
"INT_INTERFACE_LOGIC_OUTS_L10",
"INT_INTERFACE_NW4A3",
"INT_INTERFACE_MONITOR_N",
"INT_INTERFACE_BRAM_IMUX6",
"INT_INTERFACE_BRAM_IMUX33",
"INT_INTERFACE_LH7",
"INT_INTERFACE_BYP5",
"INT_INTERFACE_NW2A2",
"INT_INTERFACE_BRAM_IMUX44",
"INT_INTERFACE_LOGIC_OUTS_L9",
"INT_INTERFACE_BRAM_UTURN_IMUX16",
"INT_INTERFACE_SE2A1",
"INT_INTERFACE_BRAM_IMUX11",
"INT_INTERFACE_BRAM_IMUX41",
"INT_INTERFACE_WW2A1",
"INT_INTERFACE_BRAM_UTURN_IMUX13",
"INT_INTERFACE_BYP6",
"INT_INTERFACE_BRAM_UTURN_IMUX23",
"INT_INTERFACE_NW4END2",
"INT_INTERFACE_BRAM_UTURN_IMUX11",
"INT_INTERFACE_NW2A0",
"INT_INTERFACE_EE4B3",
"INT_INTERFACE_BRAM_IMUX42",
"INT_INTERFACE_BRAM_IMUX35",
"INT_INTERFACE_NE2A3",
"INT_INTERFACE_SW4END3",
"INT_INTERFACE_LOGIC_OUTS_L_B23",
"INT_INTERFACE_NE4C1",
"INT_INTERFACE_NW4A2",
"INT_INTERFACE_NW4A0",
"INT_INTERFACE_SE2A2",
"INT_INTERFACE_WW4END3",
"INT_INTERFACE_BRAM_IMUX10",
"INT_INTERFACE_LOGIC_OUTS_L15",
"INT_INTERFACE_BRAM_UTURN_IMUX43",
"INT_INTERFACE_WR1END2",
"INT_INTERFACE_BRAM_UTURN_IMUX40",
"INT_INTERFACE_BYP4",
"INT_INTERFACE_LH2",
"INT_INTERFACE_LOGIC_OUTS_L21",
"INT_INTERFACE_SW2A1",
"INT_INTERFACE_WW4A2",
"INT_INTERFACE_BRAM_UTURN_IMUX47",
"INT_INTERFACE_BRAM_IMUX1",
"INT_INTERFACE_SE2A3",
"INT_INTERFACE_LOGIC_OUTS_L20",
"INT_INTERFACE_LOGIC_OUTS_L14",
"INT_INTERFACE_WW4B2",
"INT_INTERFACE_EL1BEG2",
"INT_INTERFACE_BRAM_UTURN_IMUX15",
"INT_INTERFACE_FAN5",
"INT_INTERFACE_EE4C0",
"INT_INTERFACE_BRAM_UTURN_IMUX34",
"INT_INTERFACE_BRAM_UTURN_IMUX21",
"INT_INTERFACE_EE4B1",
"INT_INTERFACE_BRAM_UTURN_IMUX17",
"INT_INTERFACE_LOGIC_OUTS_L_B18",
"INT_INTERFACE_ER1BEG0",
"INT_INTERFACE_EE4BEG0",
"INT_INTERFACE_BRAM_UTURN_IMUX20",
"INT_INTERFACE_WW4END0",
"INT_INTERFACE_FAN1",
"INT_INTERFACE_WW4C3",
"INT_INTERFACE_LH9",
"INT_INTERFACE_BRAM_UTURN_IMUX30",
"INT_INTERFACE_LOGIC_OUTS_L17",
"INT_INTERFACE_BRAM_UTURN_IMUX10",
"INT_INTERFACE_BRAM_IMUX46",
"INT_INTERFACE_LOGIC_OUTS_L0",
"INT_INTERFACE_NE4BEG0",
"INT_INTERFACE_EE2A0",
"INT_INTERFACE_BRAM_IMUX25",
"INT_INTERFACE_SW4END1",
"INT_INTERFACE_LOGIC_OUTS_L12",
"INT_INTERFACE_BRAM_IMUX20",
"INT_INTERFACE_BRAM_IMUX38",
"INT_INTERFACE_BRAM_UTURN_IMUX24",
"L_INT_INTER_DQS_IOTOPHASER",
"INT_INTERFACE_FAN2",
"INT_INTERFACE_LOGIC_OUTS_L6",
"INT_INTERFACE_BRAM_IMUX34",
"INT_INTERFACE_BRAM_UTURN_IMUX5",
"INT_INTERFACE_EE2A1",
"INT_INTERFACE_LH3",
"INT_INTERFACE_NW4END1",
"INT_INTERFACE_WR1END3",
"INT_INTERFACE_WW2A0",
"INT_INTERFACE_BRAM_UTURN_IMUX27",
"INT_INTERFACE_NE4C3",
"INT_INTERFACE_BRAM_IMUX23",
"INT_INTERFACE_BRAM_IMUX47",
"INT_INTERFACE_BRAM_IMUX26",
"INT_INTERFACE_PHASER_TO_IO_OCLKDIV",
"INT_INTERFACE_BRAM_IMUX24",
"INT_INTERFACE_NE4BEG1",
"INT_INTERFACE_BRAM_UTURN_IMUX9",
"INT_INTERFACE_BRAM_UTURN_IMUX12",
"INT_INTERFACE_ER1BEG1",
"INT_INTERFACE_LH10",
"INT_INTERFACE_EE4BEG1",
"INT_INTERFACE_LOGIC_OUTS_L4",
"INT_INTERFACE_BRAM_IMUX30",
"INT_INTERFACE_LOGIC_OUTS_L7",
"INT_INTERFACE_LOGIC_OUTS_L_B21"
],
"tile_type": "BRAM_INT_INTERFACE_L",
"sites": []
}

900
artix7/tile_type_BRAM_INT_INTERFACE_R.json
View File

@ -1,476 +1,476 @@
{
"wires": [
"INT_INTERFACE_BRAM_IMUX33",
"INT_INTERFACE_BYP5",
"INT_INTERFACE_BRAM_IMUX41",
"INT_INTERFACE_BRAM_IMUX4",
"INT_INTERFACE_NW4END2",
"INT_INTERFACE_LOGIC_OUTS_B7",
"INT_INTERFACE_NW4A1",
"INT_INTERFACE_BRAM_IMUX13",
"INT_INTERFACE_WW4B3",
"INT_INTERFACE_BYP4",
"INT_INTERFACE_BRAM_IMUX38",
"INT_INTERFACE_EE4B2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX5",
"INT_INTERFACE_WW2END2",
"INT_INTERFACE_WL1END3",
"INT_INTERFACE_LOGIC_OUTS17",
"INT_INTERFACE_SE4C1",
"INT_INTERFACE_NW4END0",
"INT_INTERFACE_SE4C2",
"INT_INTERFACE_BRAM_IMUX7",
"INT_INTERFACE_LOGIC_OUTS16",
"INT_INTERFACE_LH10",
"INT_INTERFACE_NW4END1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX35",
"INT_INTERFACE_BRAM_UTURN_R_IMUX10",
"INT_INTERFACE_BRAM_IMUX11",
"INT_INTERFACE_SW4A0",
"INT_INTERFACE_BRAM_IMUX21",
"INT_INTERFACE_BRAM_UTURN_R_IMUX0",
"INT_INTERFACE_BLOCK_OUTS_B0",
"INT_INTERFACE_EE4A1",
"INT_INTERFACE_EE2A1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX8",
"INT_INTERFACE_LH1",
"INT_INTERFACE_BYP6",
"INT_INTERFACE_NE4BEG1",
"INT_INTERFACE_BRAM_IMUX6",
"INT_INTERFACE_FAN5",
"INT_INTERFACE_BRAM_UTURN_R_IMUX39",
"INT_INTERFACE_BRAM_UTURN_R_IMUX40",
"INT_INTERFACE_BRAM_UTURN_R_IMUX36",
"INT_INTERFACE_LOGIC_OUTS10",
"INT_INTERFACE_CLK0",
"INT_INTERFACE_BRAM_IMUX10",
"INT_INTERFACE_LOGIC_OUTS7",
"INT_INTERFACE_BRAM_UTURN_R_IMUX3",
"INT_INTERFACE_BYP3",
"INT_INTERFACE_LOGIC_OUTS_B1",
"INT_INTERFACE_NW2A1",
"INT_INTERFACE_EE2BEG1",
"INT_INTERFACE_LOGIC_OUTS_B17",
"INT_INTERFACE_EL1BEG2",
"INT_INTERFACE_LOGIC_OUTS5",
"INT_INTERFACE_LH6",
"INT_INTERFACE_SW4A3",
"INT_INTERFACE_BLOCK_OUTS_B2",
"INT_INTERFACE_SE4BEG1",
"INT_INTERFACE_BRAM_IMUX8",
"INT_INTERFACE_BRAM_UTURN_R_IMUX38",
"INT_INTERFACE_LOGIC_OUTS_B9",
"INT_INTERFACE_BRAM_IMUX14",
"INT_INTERFACE_BRAM_UTURN_R_IMUX1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX7",
"INT_INTERFACE_NE4BEG2",
"INT_INTERFACE_LOGIC_OUTS_B18",
"INT_INTERFACE_BRAM_UTURN_R_IMUX21",
"INT_INTERFACE_BRAM_IMUX24",
"INT_INTERFACE_EE4C0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX11",
"INT_INTERFACE_LOGIC_OUTS_B21",
"INT_INTERFACE_WW4A2",
"INT_INTERFACE_LOGIC_OUTS_B10",
"INT_INTERFACE_LOGIC_OUTS21",
"INT_INTERFACE_NE2A3",
"INT_INTERFACE_BRAM_IMUX22",
"INT_INTERFACE_LOGIC_OUTS_B3",
"INT_INTERFACE_EL1BEG3",
"INT_INTERFACE_NE2A0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX9",
"INT_INTERFACE_EE4A3",
"INT_INTERFACE_LOGIC_OUTS_B22",
"INT_INTERFACE_NW2A2",
"INT_INTERFACE_FAN6",
"INT_INTERFACE_ER1BEG2",
"INT_INTERFACE_EE4C2",
"INT_INTERFACE_SW2A0",
"INT_INTERFACE_BRAM_IMUX19",
"INT_INTERFACE_NE4C3",
"INT_INTERFACE_WW2END1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX2",
"INT_INTERFACE_LOGIC_OUTS_B0",
"INT_INTERFACE_MONITOR_N",
"INT_INTERFACE_BRAM_IMUX17",
"INT_INTERFACE_EE2A0",
"L_INT_INTER_DQS_IOTOPHASER",
"INT_INTERFACE_LOGIC_OUTS1",
"INT_INTERFACE_BRAM_IMUX26",
"INT_INTERFACE_BRAM_IMUX44",
"INT_INTERFACE_NW2A0",
"INT_INTERFACE_BRAM_IMUX39",
"INT_INTERFACE_EE4C3",
"INT_INTERFACE_LH4",
"INT_INTERFACE_LOGIC_OUTS3",
"INT_INTERFACE_WR1END2",
"INT_INTERFACE_FAN2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX24",
"INT_INTERFACE_BRAM_UTURN_R_IMUX34",
"INT_INTERFACE_PHASER_TO_IO_OCLKDIV",
"INT_INTERFACE_BRAM_IMUX12",
"INT_INTERFACE_WW2A0",
"INT_INTERFACE_LOGIC_OUTS_B23",
"INT_INTERFACE_BRAM_IMUX28",
"INT_INTERFACE_BRAM_UTURN_R_IMUX31",
"INT_INTERFACE_NW4A0",
"INT_INTERFACE_SE4BEG2",
"INT_INTERFACE_BRAM_IMUX27",
"INT_INTERFACE_LOGIC_OUTS20",
"INT_INTERFACE_BRAM_UTURN_R_IMUX16",
"INT_INTERFACE_SW4END0",
"INT_INTERFACE_WW2A1",
"INT_INTERFACE_SW4END3",
"INT_INTERFACE_SE4C3",
"INT_INTERFACE_NE4C0",
"INT_INTERFACE_WL1END0",
"INT_INTERFACE_BYP1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX28",
"INT_INTERFACE_BRAM_IMUX23",
"INT_INTERFACE_WR1END3",
"INT_INTERFACE_WW4C3",
"INT_INTERFACE_LOGIC_OUTS4",
"INT_INTERFACE_LH8",
"INT_INTERFACE_FAN1",
"INT_INTERFACE_EE4BEG0",
"INT_INTERFACE_LOGIC_OUTS12",
"INT_INTERFACE_BRAM_UTURN_R_IMUX41",
"INT_INTERFACE_CLK1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX15",
"INT_INTERFACE_SE4BEG0",
"INT_INTERFACE_LOGIC_OUTS_B4",
"INT_INTERFACE_BRAM_IMUX46",
"INT_INTERFACE_BRAM_IMUX16",
"INT_INTERFACE_LOGIC_OUTS8",
"INT_INTERFACE_LOGIC_OUTS_B5",
"INT_INTERFACE_WW4END2",
"INT_INTERFACE_NE4BEG3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX6",
"INT_INTERFACE_WW2A3",
"INT_INTERFACE_BRAM_IMUX42",
"INT_INTERFACE_LH7",
"INT_INTERFACE_ER1BEG3",
"INT_INTERFACE_SW2A3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX20",
"INT_INTERFACE_BRAM_UTURN_R_IMUX29",
"INT_INTERFACE_LOGIC_OUTS11",
"INT_INTERFACE_SW2A2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX44",
"INT_INTERFACE_BRAM_IMUX18",
"INT_INTERFACE_LH5",
"INT_INTERFACE_BLOCK_OUTS_B3",
"INT_INTERFACE_LOGIC_OUTS_B8",
"INT_INTERFACE_SW4END2",
"INT_INTERFACE_PHASER_TO_IO_OCLK",
"INT_INTERFACE_BRAM_UTURN_R_IMUX25",
"INT_INTERFACE_LOGIC_OUTS_B20",
"INT_INTERFACE_FAN3",
"INT_INTERFACE_NW4A2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX19",
"INT_INTERFACE_BRAM_UTURN_R_IMUX32",
"INT_INTERFACE_SW4A1",
"INT_INTERFACE_BRAM_IMUX35",
"INT_INTERFACE_EE4BEG3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX17",
"INT_INTERFACE_BRAM_IMUX20",
"INT_INTERFACE_LOGIC_OUTS18",
"INT_INTERFACE_SE2A1",
"INT_INTERFACE_WL1END1",
"INT_INTERFACE_BYP2",
"INT_INTERFACE_NE4C2",
"INT_INTERFACE_LOGIC_OUTS_B12",
"INT_INTERFACE_BRAM_IMUX30",
"INT_INTERFACE_LOGIC_OUTS22",
"INT_INTERFACE_BRAM_UTURN_R_IMUX26",
"INT_INTERFACE_BRAM_IMUX32",
"INT_INTERFACE_BRAM_UTURN_R_IMUX42",
"INT_INTERFACE_WR1END1",
"INT_INTERFACE_EE2BEG2",
"INT_INTERFACE_NW4A3",
"INT_INTERFACE_MONITOR_P",
"INT_INTERFACE_EE4B0",
"INT_INTERFACE_LOGIC_OUTS_B15",
"INT_INTERFACE_WR1END0",
"INT_INTERFACE_BRAM_IMUX5",
"INT_INTERFACE_CTRL1",
"INT_INTERFACE_EL1BEG0",
"INT_INTERFACE_BRAM_IMUX36",
"INT_INTERFACE_NE2A2",
"INT_INTERFACE_BRAM_IMUX9",
"INT_INTERFACE_EE2BEG3",
"INT_INTERFACE_WW4A3",
"INT_INTERFACE_NW2A3",
"INT_INTERFACE_EE2BEG0",
"INT_INTERFACE_LOGIC_OUTS_B6",
"INT_INTERFACE_BRAM_UTURN_R_IMUX43",
"INT_INTERFACE_LOGIC_OUTS0",
"INT_INTERFACE_CTRL0",
"INT_INTERFACE_ER1BEG0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX46",
"INT_INTERFACE_WW2END3",
"INT_INTERFACE_LOGIC_OUTS_B16",
"INT_INTERFACE_LH2",
"INT_INTERFACE_WW4END0",
"INT_INTERFACE_SE4BEG3",
"INT_INTERFACE_WW4B1",
"INT_INTERFACE_EE4A2",
"INT_INTERFACE_LOGIC_OUTS13",
"INT_INTERFACE_BRAM_UTURN_R_IMUX30",
"INT_INTERFACE_SE2A2",
"INT_INTERFACE_LOGIC_OUTS6",
"INT_INTERFACE_BRAM_UTURN_R_IMUX18",
"INT_INTERFACE_LOGIC_OUTS_B13",
"INT_INTERFACE_WW4C0",
"INT_INTERFACE_BRAM_IMUX2",
"INT_INTERFACE_EE4C1",
"INT_INTERFACE_NE4BEG0",
"INT_INTERFACE_BRAM_IMUX45",
"INT_INTERFACE_BRAM_UTURN_R_IMUX33",
"INT_INTERFACE_PHASER_TO_IO_OCLK1X_90",
"INT_INTERFACE_EL1BEG1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX47",
"INT_INTERFACE_LOGIC_OUTS9",
"INT_INTERFACE_BYP7",
"INT_INTERFACE_BRAM_UTURN_R_IMUX14",
"INT_INTERFACE_BRAM_IMUX40",
"INT_INTERFACE_BRAM_IMUX0",
"INT_INTERFACE_LH12",
"INT_INTERFACE_LH9",
"INT_INTERFACE_BRAM_UTURN_R_IMUX45",
"INT_INTERFACE_BRAM_UTURN_R_IMUX12",
"INT_INTERFACE_SW2A1",
"INT_INTERFACE_NW4END3",
"INT_INTERFACE_PHASER_TO_IO_ICLKDIV",
"INT_INTERFACE_BRAM_IMUX1",
"INT_INTERFACE_NE4C1",
"INT_INTERFACE_WW4END1",
"INT_INTERFACE_LOGIC_OUTS_B19",
"INT_INTERFACE_WL1END2",
"INT_INTERFACE_WW4C2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX37",
"INT_INTERFACE_BRAM_IMUX31",
"INT_INTERFACE_BRAM_IMUX15",
"INT_INTERFACE_WW2A2",
"INT_INTERFACE_WW4END3",
"INT_INTERFACE_LOGIC_OUTS15",
"INT_INTERFACE_LH11",
"INT_INTERFACE_SE2A3",
"INT_INTERFACE_WW4C1",
"INT_INTERFACE_SE2A0",
"INT_INTERFACE_EE2A3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX23",
"INT_INTERFACE_EE4BEG1",
"INT_INTERFACE_SW4A2",
"INT_INTERFACE_BRAM_IMUX3",
"INT_INTERFACE_EE4B3",
"INT_INTERFACE_LOGIC_OUTS2",
"INT_INTERFACE_BRAM_IMUX34",
"INT_INTERFACE_SE4C0",
"INT_INTERFACE_LOGIC_OUTS23",
"INT_INTERFACE_BRAM_IMUX47",
"INT_INTERFACE_EE2A2",
"INT_INTERFACE_EE4A0",
"INT_INTERFACE_EE4BEG2",
"INT_INTERFACE_LOGIC_OUTS14",
"INT_INTERFACE_FAN7",
"INT_INTERFACE_WW4B2",
"INT_INTERFACE_LOGIC_OUTS_B2",
"INT_INTERFACE_NE2A1",
"INT_INTERFACE_LOGIC_OUTS19",
"INT_INTERFACE_PHASER_TO_IO_ICLK",
"INT_INTERFACE_WW4B0",
"INT_INTERFACE_BYP0",
"INT_INTERFACE_EE4B1",
"INT_INTERFACE_LOGIC_OUTS_B14",
"INT_INTERFACE_LOGIC_OUTS_B11",
"INT_INTERFACE_BRAM_IMUX29",
"INT_INTERFACE_BRAM_IMUX25",
"INT_INTERFACE_BRAM_UTURN_R_IMUX13",
"INT_INTERFACE_FAN4",
"INT_INTERFACE_FAN0",
"INT_INTERFACE_ER1BEG1",
"INT_INTERFACE_BRAM_IMUX43",
"INT_INTERFACE_BRAM_IMUX37",
"INT_INTERFACE_SW4END1",
"INT_INTERFACE_WW2END0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX27",
"INT_INTERFACE_LH3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX4",
"INT_INTERFACE_WW4A1",
"INT_INTERFACE_WW4A0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX22",
"INT_INTERFACE_BLOCK_OUTS_B1"
],
"sites": [],
"pips": {
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B23->>INT_INTERFACE_LOGIC_OUTS23": {
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B5->>INT_INTERFACE_LOGIC_OUTS5": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B5",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS23",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B23",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B0->>INT_INTERFACE_LOGIC_OUTS0": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS0",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B0",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B4->>INT_INTERFACE_LOGIC_OUTS4": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS4",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B4",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B14->>INT_INTERFACE_LOGIC_OUTS14": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS14",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B14",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS5"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B20->>INT_INTERFACE_LOGIC_OUTS20": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS20",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B20",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B7->>INT_INTERFACE_LOGIC_OUTS7": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS7",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B7",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS20"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B9->>INT_INTERFACE_LOGIC_OUTS9": {
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B23->>INT_INTERFACE_LOGIC_OUTS23": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B23",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS9",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B9",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS23"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B5->>INT_INTERFACE_LOGIC_OUTS5": {
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B14->>INT_INTERFACE_LOGIC_OUTS14": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B14",
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS5",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B5",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B10->>INT_INTERFACE_LOGIC_OUTS10": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS10",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B10",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B17->>INT_INTERFACE_LOGIC_OUTS17": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS17",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B17",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B18->>INT_INTERFACE_LOGIC_OUTS18": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS18",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B18",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B13->>INT_INTERFACE_LOGIC_OUTS13": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS13",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B13",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS14"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B3->>INT_INTERFACE_LOGIC_OUTS3": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS3",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B3",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B15->>INT_INTERFACE_LOGIC_OUTS15": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS15",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B15",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B19->>INT_INTERFACE_LOGIC_OUTS19": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS19",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B19",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B16->>INT_INTERFACE_LOGIC_OUTS16": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS16",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B16",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B21->>INT_INTERFACE_LOGIC_OUTS21": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS21",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B21",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B11->>INT_INTERFACE_LOGIC_OUTS11": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS11",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B11",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B12->>INT_INTERFACE_LOGIC_OUTS12": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS12",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B12",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B1->>INT_INTERFACE_LOGIC_OUTS1": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS1",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B1",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B22->>INT_INTERFACE_LOGIC_OUTS22": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS22",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B22",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B2->>INT_INTERFACE_LOGIC_OUTS2": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS2",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B2",
"is_pseudo": "0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B8->>INT_INTERFACE_LOGIC_OUTS8": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS8",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B8",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS3"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B6->>INT_INTERFACE_LOGIC_OUTS6": {
"can_invert": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS6",
"is_directional": "1",
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B6",
"is_pseudo": "0"
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS6"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B12->>INT_INTERFACE_LOGIC_OUTS12": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B12",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS12"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B4->>INT_INTERFACE_LOGIC_OUTS4": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B4",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS4"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B13->>INT_INTERFACE_LOGIC_OUTS13": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B13",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS13"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B19->>INT_INTERFACE_LOGIC_OUTS19": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B19",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS19"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B0->>INT_INTERFACE_LOGIC_OUTS0": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B0",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS0"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B8->>INT_INTERFACE_LOGIC_OUTS8": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B8",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS8"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B1->>INT_INTERFACE_LOGIC_OUTS1": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B1",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS1"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B11->>INT_INTERFACE_LOGIC_OUTS11": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B11",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS11"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B16->>INT_INTERFACE_LOGIC_OUTS16": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B16",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS16"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B9->>INT_INTERFACE_LOGIC_OUTS9": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B9",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS9"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B15->>INT_INTERFACE_LOGIC_OUTS15": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B15",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS15"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B18->>INT_INTERFACE_LOGIC_OUTS18": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B18",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS18"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B2->>INT_INTERFACE_LOGIC_OUTS2": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B2",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS2"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B21->>INT_INTERFACE_LOGIC_OUTS21": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B21",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS21"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B7->>INT_INTERFACE_LOGIC_OUTS7": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B7",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS7"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B10->>INT_INTERFACE_LOGIC_OUTS10": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B10",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS10"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B22->>INT_INTERFACE_LOGIC_OUTS22": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B22",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS22"
},
"BRAM_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS_B17->>INT_INTERFACE_LOGIC_OUTS17": {
"src_wire": "INT_INTERFACE_LOGIC_OUTS_B17",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "INT_INTERFACE_LOGIC_OUTS17"
}
},
"tile_type": "BRAM_INT_INTERFACE_R"
"wires": [
"INT_INTERFACE_SE4BEG1",
"INT_INTERFACE_WL1END2",
"INT_INTERFACE_WR1END1",
"INT_INTERFACE_LOGIC_OUTS_B9",
"INT_INTERFACE_LOGIC_OUTS_B12",
"INT_INTERFACE_BRAM_UTURN_R_IMUX46",
"INT_INTERFACE_BLOCK_OUTS_B3",
"INT_INTERFACE_EE4A1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX43",
"INT_INTERFACE_WW4A1",
"INT_INTERFACE_BRAM_IMUX9",
"INT_INTERFACE_SW2A2",
"INT_INTERFACE_LOGIC_OUTS_B10",
"INT_INTERFACE_BRAM_UTURN_R_IMUX7",
"INT_INTERFACE_SW2A3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX13",
"INT_INTERFACE_SE4BEG2",
"INT_INTERFACE_BRAM_IMUX28",
"INT_INTERFACE_WW4A3",
"INT_INTERFACE_CLK1",
"INT_INTERFACE_LH8",
"INT_INTERFACE_LOGIC_OUTS_B22",
"INT_INTERFACE_BRAM_IMUX22",
"INT_INTERFACE_WW4C0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX35",
"INT_INTERFACE_WW4B1",
"INT_INTERFACE_LOGIC_OUTS4",
"INT_INTERFACE_BRAM_IMUX16",
"INT_INTERFACE_LOGIC_OUTS1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX34",
"INT_INTERFACE_WW2A2",
"INT_INTERFACE_LOGIC_OUTS0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX9",
"INT_INTERFACE_LOGIC_OUTS_B11",
"INT_INTERFACE_BRAM_UTURN_R_IMUX25",
"INT_INTERFACE_EE4A2",
"INT_INTERFACE_LOGIC_OUTS20",
"INT_INTERFACE_WW2END0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX10",
"INT_INTERFACE_BRAM_IMUX43",
"INT_INTERFACE_BRAM_IMUX45",
"INT_INTERFACE_EE4C1",
"INT_INTERFACE_BRAM_IMUX7",
"INT_INTERFACE_BRAM_UTURN_R_IMUX31",
"INT_INTERFACE_LOGIC_OUTS18",
"INT_INTERFACE_LOGIC_OUTS_B20",
"INT_INTERFACE_BRAM_UTURN_R_IMUX6",
"INT_INTERFACE_SW4A3",
"INT_INTERFACE_EE2BEG3",
"INT_INTERFACE_NE4BEG2",
"INT_INTERFACE_WW2END1",
"INT_INTERFACE_SE4C3",
"INT_INTERFACE_LOGIC_OUTS3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX28",
"INT_INTERFACE_LH11",
"INT_INTERFACE_SE4C0",
"INT_INTERFACE_LOGIC_OUTS_B14",
"INT_INTERFACE_BRAM_UTURN_R_IMUX27",
"INT_INTERFACE_BLOCK_OUTS_B2",
"INT_INTERFACE_EE4BEG2",
"INT_INTERFACE_BRAM_IMUX36",
"INT_INTERFACE_BRAM_UTURN_R_IMUX3",
"INT_INTERFACE_BYP7",
"INT_INTERFACE_LOGIC_OUTS_B1",
"INT_INTERFACE_ER1BEG2",
"INT_INTERFACE_WW2END2",
"INT_INTERFACE_EE4BEG3",
"INT_INTERFACE_BRAM_UTURN_R_IMUX30",
"INT_INTERFACE_SE4BEG0",
"INT_INTERFACE_WL1END1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX26",
"INT_INTERFACE_PHASER_TO_IO_OCLK1X_90",
"INT_INTERFACE_NE2A0",
"INT_INTERFACE_LOGIC_OUTS2",
"INT_INTERFACE_BRAM_IMUX19",
"INT_INTERFACE_BRAM_UTURN_R_IMUX47",
"INT_INTERFACE_FAN0",
"INT_INTERFACE_BRAM_IMUX3",
"INT_INTERFACE_BRAM_IMUX14",
"INT_INTERFACE_EE2BEG1",
"INT_INTERFACE_LOGIC_OUTS_B7",
"INT_INTERFACE_BRAM_IMUX40",
"INT_INTERFACE_EL1BEG0",
"INT_INTERFACE_BRAM_IMUX12",
"INT_INTERFACE_MONITOR_P",
"INT_INTERFACE_LOGIC_OUTS16",
"INT_INTERFACE_CLK0",
"INT_INTERFACE_NW4A1",
"INT_INTERFACE_WR1END0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX19",
"INT_INTERFACE_NW4END0",
"INT_INTERFACE_EE2A2",
"INT_INTERFACE_LOGIC_OUTS8",
"INT_INTERFACE_BRAM_UTURN_R_IMUX0",
"INT_INTERFACE_BYP0",
"INT_INTERFACE_LOGIC_OUTS9",
"INT_INTERFACE_LOGIC_OUTS17",
"INT_INTERFACE_FAN6",
"INT_INTERFACE_SW2A0",
"INT_INTERFACE_NW4END3",
"INT_INTERFACE_LOGIC_OUTS_B21",
"INT_INTERFACE_BRAM_IMUX18",
"INT_INTERFACE_EE4B0",
"INT_INTERFACE_SW4END0",
"INT_INTERFACE_NE4C0",
"INT_INTERFACE_EE4A3",
"INT_INTERFACE_WW4C2",
"INT_INTERFACE_BRAM_IMUX5",
"INT_INTERFACE_EE4C2",
"INT_INTERFACE_WW4B3",
"INT_INTERFACE_EE2BEG2",
"INT_INTERFACE_EE4C3",
"INT_INTERFACE_WW4C1",
"INT_INTERFACE_SE4C2",
"INT_INTERFACE_BRAM_IMUX32",
"INT_INTERFACE_BRAM_IMUX15",
"INT_INTERFACE_BRAM_UTURN_R_IMUX42",
"INT_INTERFACE_BRAM_IMUX37",
"INT_INTERFACE_EL1BEG1",
"INT_INTERFACE_BRAM_UTURN_R_IMUX41",
"INT_INTERFACE_PHASER_TO_IO_ICLKDIV",
"INT_INTERFACE_WL1END3",
"INT_INTERFACE_BRAM_IMUX27",
"INT_INTERFACE_SW4A2",
"INT_INTERFACE_ER1BEG3",
"INT_INTERFACE_LH6",
"INT_INTERFACE_SW4A1",
"INT_INTERFACE_SW4A0",
"INT_INTERFACE_BYP2",
"INT_INTERFACE_NE2A1",
"INT_INTERFACE_WL1END0",
"INT_INTERFACE_WW4B0",
"INT_INTERFACE_CTRL0",
"INT_INTERFACE_WW2END3",
"INT_INTERFACE_LOGIC_OUTS14",
"INT_INTERFACE_NE4BEG3",
"INT_INTERFACE_LOGIC_OUTS11",
"INT_INTERFACE_BRAM_IMUX8",
"INT_INTERFACE_LOGIC_OUTS_B18",
"INT_INTERFACE_SE2A0",
"INT_INTERFACE_PHASER_TO_IO_ICLK",
"INT_INTERFACE_EE4B2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX36",
"INT_INTERFACE_NE2A2",
"INT_INTERFACE_LOGIC_OUTS5",
"INT_INTERFACE_NW2A1",
"INT_INTERFACE_LOGIC_OUTS10",
"INT_INTERFACE_BRAM_UTURN_R_IMUX8",
"INT_INTERFACE_BRAM_UTURN_R_IMUX32",
"INT_INTERFACE_FAN7",
"INT_INTERFACE_BRAM_UTURN_R_IMUX20",
"INT_INTERFACE_EE2BEG0",
"INT_INTERFACE_LH1",
"INT_INTERFACE_BRAM_IMUX17",
"INT_INTERFACE_BRAM_IMUX13",
"INT_INTERFACE_LOGIC_OUTS_B0",
"INT_INTERFACE_LH5",
"INT_INTERFACE_LOGIC_OUTS_B3",
"INT_INTERFACE_LH4",
"INT_INTERFACE_SW4END2",
"INT_INTERFACE_LH12",
"INT_INTERFACE_NW2A3",
"INT_INTERFACE_LOGIC_OUTS19",
"INT_INTERFACE_BRAM_IMUX2",
"INT_INTERFACE_LOGIC_OUTS_B5",
"INT_INTERFACE_BRAM_UTURN_R_IMUX12",
"INT_INTERFACE_BRAM_UTURN_R_IMUX23",
"INT_INTERFACE_BRAM_UTURN_R_IMUX38",
"INT_INTERFACE_EL1BEG3",
"INT_INTERFACE_LOGIC_OUTS23",
"INT_INTERFACE_LOGIC_OUTS_B8",
"INT_INTERFACE_LOGIC_OUTS_B6",
"INT_INTERFACE_LOGIC_OUTS_B2",
"INT_INTERFACE_LOGIC_OUTS_B19",
"INT_INTERFACE_BRAM_UTURN_R_IMUX15",
"INT_INTERFACE_SE4BEG3",
"INT_INTERFACE_BRAM_IMUX39",
"INT_INTERFACE_BRAM_IMUX31",
"INT_INTERFACE_WW4END1",
"INT_INTERFACE_BRAM_IMUX29",
"INT_INTERFACE_BRAM_UTURN_R_IMUX1",
"INT_INTERFACE_BRAM_IMUX21",
"INT_INTERFACE_WW2A3",
"INT_INTERFACE_BRAM_IMUX4",
"INT_INTERFACE_BRAM_UTURN_R_IMUX16",
"INT_INTERFACE_BRAM_UTURN_R_IMUX44",
"INT_INTERFACE_BRAM_IMUX0",
"INT_INTERFACE_NE4C2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX24",
"INT_INTERFACE_SE4C1",
"INT_INTERFACE_LOGIC_OUTS_B13",
"INT_INTERFACE_WW4END2",
"INT_INTERFACE_PHASER_TO_IO_OCLK",
"INT_INTERFACE_EE2A3",
"INT_INTERFACE_EE4A0",
"INT_INTERFACE_WW4A0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX40",
"INT_INTERFACE_FAN4",
"INT_INTERFACE_BYP1",
"INT_INTERFACE_FAN3",
"INT_INTERFACE_CTRL1",
"INT_INTERFACE_BYP3",
"INT_INTERFACE_NW4A3",
"INT_INTERFACE_MONITOR_N",
"INT_INTERFACE_BRAM_IMUX6",
"INT_INTERFACE_BRAM_IMUX33",
"INT_INTERFACE_BRAM_UTURN_R_IMUX33",
"INT_INTERFACE_LH7",
"INT_INTERFACE_BRAM_UTURN_R_IMUX45",
"INT_INTERFACE_BYP5",
"INT_INTERFACE_LOGIC_OUTS_B23",
"INT_INTERFACE_NW2A2",
"INT_INTERFACE_BRAM_IMUX44",
"INT_INTERFACE_SE2A1",
"INT_INTERFACE_BRAM_IMUX11",
"INT_INTERFACE_BRAM_IMUX41",
"INT_INTERFACE_WW2A1",
"INT_INTERFACE_LOGIC_OUTS21",
"INT_INTERFACE_BYP6",
"INT_INTERFACE_NW4END2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX18",
"INT_INTERFACE_NW2A0",
"INT_INTERFACE_LOGIC_OUTS12",
"INT_INTERFACE_EE4B3",
"INT_INTERFACE_BRAM_IMUX42",
"INT_INTERFACE_BRAM_IMUX35",
"INT_INTERFACE_NE2A3",
"INT_INTERFACE_SW4END3",
"INT_INTERFACE_NE4C1",
"INT_INTERFACE_NW4A2",
"INT_INTERFACE_NW4A0",
"INT_INTERFACE_SE2A2",
"INT_INTERFACE_WW4END3",
"INT_INTERFACE_BRAM_IMUX10",
"INT_INTERFACE_WR1END2",
"INT_INTERFACE_BYP4",
"INT_INTERFACE_BRAM_UTURN_R_IMUX39",
"INT_INTERFACE_BRAM_UTURN_R_IMUX21",
"INT_INTERFACE_LH2",
"INT_INTERFACE_BRAM_UTURN_R_IMUX4",
"INT_INTERFACE_SW2A1",
"INT_INTERFACE_LOGIC_OUTS_B4",
"INT_INTERFACE_WW4A2",
"INT_INTERFACE_BRAM_IMUX1",
"INT_INTERFACE_LOGIC_OUTS_B17",
"INT_INTERFACE_SE2A3",
"INT_INTERFACE_LOGIC_OUTS7",
"INT_INTERFACE_BRAM_UTURN_R_IMUX11",
"INT_INTERFACE_WW4B2",
"INT_INTERFACE_EL1BEG2",
"INT_INTERFACE_FAN5",
"INT_INTERFACE_EE4C0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX29",
"INT_INTERFACE_EE4B1",
"INT_INTERFACE_ER1BEG0",
"INT_INTERFACE_EE4BEG0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX2",
"INT_INTERFACE_WW4END0",
"INT_INTERFACE_FAN1",
"INT_INTERFACE_LOGIC_OUTS15",
"INT_INTERFACE_WW4C3",
"INT_INTERFACE_LH9",
"INT_INTERFACE_LOGIC_OUTS6",
"INT_INTERFACE_BRAM_UTURN_R_IMUX22",
"INT_INTERFACE_BRAM_IMUX46",
"INT_INTERFACE_NE4BEG0",
"INT_INTERFACE_EE2A0",
"INT_INTERFACE_BRAM_IMUX25",
"INT_INTERFACE_SW4END1",
"INT_INTERFACE_BRAM_IMUX20",
"INT_INTERFACE_BRAM_UTURN_R_IMUX17",
"INT_INTERFACE_BRAM_IMUX38",
"L_INT_INTER_DQS_IOTOPHASER",
"INT_INTERFACE_FAN2",
"INT_INTERFACE_LOGIC_OUTS_B16",
"INT_INTERFACE_BRAM_UTURN_R_IMUX5",
"INT_INTERFACE_BRAM_IMUX34",
"INT_INTERFACE_EE2A1",
"INT_INTERFACE_LH3",
"INT_INTERFACE_NW4END1",
"INT_INTERFACE_WR1END3",
"INT_INTERFACE_LOGIC_OUTS22",
"INT_INTERFACE_WW2A0",
"INT_INTERFACE_BRAM_UTURN_R_IMUX14",
"INT_INTERFACE_BLOCK_OUTS_B0",
"INT_INTERFACE_NE4C3",
"INT_INTERFACE_BRAM_IMUX23",
"INT_INTERFACE_BRAM_IMUX47",
"INT_INTERFACE_BRAM_IMUX26",
"INT_INTERFACE_BLOCK_OUTS_B1",
"INT_INTERFACE_PHASER_TO_IO_OCLKDIV",
"INT_INTERFACE_BRAM_IMUX24",
"INT_INTERFACE_BRAM_UTURN_R_IMUX37",
"INT_INTERFACE_NE4BEG1",
"INT_INTERFACE_ER1BEG1",
"INT_INTERFACE_LH10",
"INT_INTERFACE_LOGIC_OUTS_B15",
"INT_INTERFACE_EE4BEG1",
"INT_INTERFACE_BRAM_IMUX30",
"INT_INTERFACE_LOGIC_OUTS13"
],
"tile_type": "BRAM_INT_INTERFACE_R",
"sites": []
}

19466
artix7/tile_type_BRAM_L.json
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File diff suppressed because it is too large Load Diff

19546
artix7/tile_type_BRAM_R.json
View File

File diff suppressed because it is too large Load Diff

124
artix7/tile_type_BRKH_BRAM.json
View File

@ -1,71 +1,71 @@
{
"pips": {},
"wires": [
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU11",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU7",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU8",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU8",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU11",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU5",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU13",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU0",
"BRKH_BRAM_CASCADEA_R",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU1",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU11",
"BRKH_BRAM_CASCADEA_L",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU4",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU9",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU1",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU2",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU7",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU10",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU9",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU3",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU12",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU1",
"BRKH_BRAM_CASCADEB_L",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU13",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU6",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU8",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU7",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU2",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU5",
"BRKH_BRAM_CASCADEB_R",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU3",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU6",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU13",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU4",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU4",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU14",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU5",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU1",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU8",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU7",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU6",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU3",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU6",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU0",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU11",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU11",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU13",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU6",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU7",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU11",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU1",
"BRKH_BRAM_CASCADEA_R",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU13",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU4",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU2",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU4",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU12",
"BRKH_BRAM_CASCADEB_R",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU5",
"BRKH_BRAM_CASCADEB_L",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU9",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU3",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU8",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU1",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU4",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU13",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU5",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU7",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU6",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU8",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU2",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU5",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU9",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU2",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU4",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU3",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU9",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU7",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14",
"BRKH_BRAM_CASCADEA_L",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU4",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU6",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU7",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU2",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14"
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU5",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU2",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU0",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU3",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU8",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU10",
"BRKH_BRAM_CASCIN_L_ADDRBWRADDRU8",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU6",
"BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU1",
"BRKH_BRAM_CASCIN_L_ADDRARDADDRU14",
"BRKH_BRAM_CASCOUT_L_ADDRARDADDRU1"
],
"sites": [],
"pips": {},
"tile_type": "BRKH_BRAM"
"tile_type": "BRKH_BRAM",
"sites": []
}

226
artix7/tile_type_BRKH_B_TERM_INT.json
View File

@ -1,125 +1,125 @@
{
"pips": {},
"wires": [
"B_TERM_UTURN_INT_WR1BEG0",
"B_TERM_UTURN_INT_ER1END_N3_3",
"B_TERM_UTURN_INT_LV_L6",
"B_TERM_UTURN_INT_LVB4",
"B_TERM_UTURN_INT_SW6A2",
"B_TERM_UTURN_INT_SW6C0",
"B_TERM_UTURN_INT_LVB_L0",
"B_TERM_UTURN_INT_LVB5",
"B_TERM_UTURN_INT_SE6D3",
"B_TERM_UTURN_INT_LV4",
"B_TERM_UTURN_INT_SS2A1",
"B_TERM_UTURN_INT_LV3",
"B_TERM_UTURN_INT_SS6D3",
"B_TERM_UTURN_INT_SS2BEG3",
"B_TERM_UTURN_INT_SS6B1",
"B_TERM_UTURN_INT_SE2BEG0",
"B_TERM_UTURN_INT_LV_L5",
"B_TERM_UTURN_INT_SE6D1",
"B_TERM_UTURN_INT_LV2",
"B_TERM_UTURN_INT_LV_L3",
"B_TERM_UTURN_INT_LVB_L2",
"B_TERM_UTURN_INT_SS6BEG3",
"B_TERM_UTURN_INT_LVB1",
"B_TERM_UTURN_INT_SL1BEG2",
"B_TERM_UTURN_INT_SL1BEG1",
"B_TERM_UTURN_INT_SS6BEG1",
"B_TERM_UTURN_INT_LVB2",
"B_TERM_UTURN_INT_SE6A2",
"B_TERM_UTURN_INT_SS6D3",
"B_TERM_UTURN_INT_SS6BEG0",
"B_TERM_UTURN_INT_LV9",
"B_TERM_UTURN_INT_SE2BEG2",
"B_TERM_UTURN_INT_LV_L2",
"B_TERM_UTURN_INT_SE6B2",
"B_TERM_UTURN_INT_LVB_L3",
"B_TERM_UTURN_INT_LV7",
"B_TERM_UTURN_INT_SS6D2",
"B_TERM_UTURN_INT_LVB_L4",
"B_TERM_UTURN_INT_SW6C2",
"B_TERM_UTURN_INT_SS6B3",
"B_TERM_UTURN_INT_SS2A1",
"B_TERM_UTURN_INT_SE2BEG1",
"B_TERM_UTURN_INT_SS6A2",
"B_TERM_UTURN_INT_SE6A0",
"B_TERM_UTURN_INT_LV6",
"B_TERM_UTURN_INT_LV_L6",
"B_TERM_UTURN_INT_SS2A2",
"B_TERM_UTURN_INT_WR1BEG0",
"B_TERM_UTURN_INT_SE6B0",
"B_TERM_UTURN_INT_SL1BEG0",
"B_TERM_UTURN_INT_SW6A3",
"B_TERM_UTURN_INT_LVB0",
"B_TERM_UTURN_INT_LVB_L1",
"B_TERM_UTURN_INT_SE6C0",
"B_TERM_UTURN_INT_LV_L9",
"B_TERM_UTURN_INT_SW6B2",
"B_TERM_UTURN_INT_LVB3",
"B_TERM_UTURN_INT_SW2BEG0",
"B_TERM_UTURN_INT_SW6A1",
"B_TERM_UTURN_INT_SE6D2",
"B_TERM_UTURN_INT_LV_L3",
"B_TERM_UTURN_INT_SR1BEG3",
"B_TERM_UTURN_INT_FAN_BOUNCE6",
"B_TERM_UTURN_INT_SW6END_N0_3",
"B_TERM_UTURN_INT_SE6B1",
"B_TERM_UTURN_INT_LV5",
"B_TERM_UTURN_INT_SR1BEG2",
"B_TERM_UTURN_INT_FAN_BOUNCE2",
"B_TERM_UTURN_INT_SW6A2",
"B_TERM_UTURN_INT_SS2BEG2",
"B_TERM_UTURN_INT_SS6D0",
"B_TERM_UTURN_INT_SE6A1",
"B_TERM_UTURN_INT_SS6A0",
"B_TERM_UTURN_INT_SS2BEG1",
"B_TERM_UTURN_INT_SE6C3",
"B_TERM_UTURN_INT_SS6C2",
"B_TERM_UTURN_INT_FAN_BOUNCE4",
"B_TERM_UTURN_INT_SS6A3",
"B_TERM_UTURN_INT_SW6D2",
"B_TERM_UTURN_INT_SS6E3",
"B_TERM_UTURN_INT_SW2BEG2",
"B_TERM_UTURN_INT_LV_L8",
"B_TERM_UTURN_INT_SW6B3",
"B_TERM_UTURN_INT_SW6B1",
"B_TERM_UTURN_INT_SW2BEG1",
"B_TERM_UTURN_INT_LVB4",
"B_TERM_UTURN_INT_SS2BEG0",
"B_TERM_UTURN_INT_SR1BEG1",
"B_TERM_UTURN_INT_SE6C2",
"B_TERM_UTURN_INT_SW2BEG3",
"B_TERM_UTURN_INT_WR1END0",
"B_TERM_UTURN_INT_LV_L7",
"B_TERM_UTURN_INT_SW6D1",
"B_TERM_UTURN_INT_LVB_L5",
"B_TERM_UTURN_INT_SE6C1",
"B_TERM_UTURN_INT_LV18",
"B_TERM_UTURN_INT_SW6D3",
"B_TERM_UTURN_INT_SL1BEG3",
"B_TERM_UTURN_INT_SS6E1",
"B_TERM_UTURN_INT_SW6C3",
"B_TERM_UTURN_INT_SS2A3",
"B_TERM_UTURN_INT_SS6E0",
"B_TERM_UTURN_INT_ER1BEG0",
"B_TERM_UTURN_INT_ER1END_N3_3",
"B_TERM_UTURN_INT_SE6B3",
"B_TERM_UTURN_INT_SS6B2",
"B_TERM_UTURN_INT_SW6B0",
"B_TERM_UTURN_INT_SW6A0",
"B_TERM_UTURN_INT_LV3",
"B_TERM_UTURN_INT_SS6C3",
"B_TERM_UTURN_INT_LV8",
"B_TERM_UTURN_INT_SE6A3",
"B_TERM_UTURN_INT_SS6C1",
"B_TERM_UTURN_INT_SS6B0",
"B_TERM_UTURN_INT_SS6C0",
"B_TERM_UTURN_INT_SW6C1",
"B_TERM_UTURN_INT_SS6D1",
"B_TERM_UTURN_INT_LV_L4",
"B_TERM_UTURN_INT_SS6C1",
"B_TERM_UTURN_INT_SW6B3",
"B_TERM_UTURN_INT_SS6A3",
"B_TERM_UTURN_INT_ER1BEG0",
"B_TERM_UTURN_INT_SW6D2",
"B_TERM_UTURN_INT_LVB_L5",
"B_TERM_UTURN_INT_SW6D3",
"B_TERM_UTURN_INT_SL1BEG1",
"B_TERM_UTURN_INT_SE6D0",
"B_TERM_UTURN_INT_SE2BEG2",
"B_TERM_UTURN_INT_SS6B0",
"B_TERM_UTURN_INT_SW6A3",
"B_TERM_UTURN_INT_LVB5",
"B_TERM_UTURN_INT_SS6C3",
"B_TERM_UTURN_INT_LV_L5",
"B_TERM_UTURN_INT_SE6A1",
"B_TERM_UTURN_INT_LV_L18",
"B_TERM_UTURN_INT_SS6A0",
"B_TERM_UTURN_INT_SS6C0",
"B_TERM_UTURN_INT_SW6C0",
"B_TERM_UTURN_INT_SS6B1",
"B_TERM_UTURN_INT_SW6B1",
"B_TERM_UTURN_INT_SW6D1",
"B_TERM_UTURN_INT_SS6E0",
"B_TERM_UTURN_INT_LVB3",
"B_TERM_UTURN_INT_SS6BEG0",
"B_TERM_UTURN_INT_SW6A1",
"B_TERM_UTURN_INT_FAN_BOUNCE0",
"B_TERM_UTURN_INT_SS2A0",
"B_TERM_UTURN_INT_LV_L8",
"B_TERM_UTURN_INT_SW6C3",
"B_TERM_UTURN_INT_SW2BEG0",
"B_TERM_UTURN_INT_SS2BEG3",
"B_TERM_UTURN_INT_SE6D2",
"B_TERM_UTURN_INT_SE6B1",
"B_TERM_UTURN_INT_FAN_BOUNCE4",
"B_TERM_UTURN_INT_SE2BEG0",
"B_TERM_UTURN_INT_SS6C2",
"B_TERM_UTURN_INT_FAN_BOUNCE2",
"B_TERM_UTURN_INT_SW6B2",
"B_TERM_UTURN_INT_WR1END0",
"B_TERM_UTURN_INT_SS6B2",
"B_TERM_UTURN_INT_SE6C0",
"B_TERM_UTURN_INT_SE6B3",
"B_TERM_UTURN_INT_SE6A0",
"B_TERM_UTURN_INT_SW2BEG3",
"B_TERM_UTURN_INT_LV8",
"B_TERM_UTURN_INT_SS6BEG2",
"B_TERM_UTURN_INT_SW2BEG1",
"B_TERM_UTURN_INT_SS6E3",
"B_TERM_UTURN_INT_SS6E1",
"B_TERM_UTURN_INT_SL1BEG2",
"B_TERM_UTURN_INT_SS6BEG3",
"B_TERM_UTURN_INT_SS6BEG1",
"B_TERM_UTURN_INT_SE2BEG1",
"B_TERM_UTURN_INT_SS2A2",
"B_TERM_UTURN_INT_SS6E2",
"B_TERM_UTURN_INT_LV_L9",
"B_TERM_UTURN_INT_SW6A0",
"B_TERM_UTURN_INT_SW6END_N0_3",
"B_TERM_UTURN_INT_SE6A3",
"B_TERM_UTURN_INT_SE6B2",
"B_TERM_UTURN_INT_SE6D1",
"B_TERM_UTURN_INT_SW6B0",
"B_TERM_UTURN_INT_SR1BEG2",
"B_TERM_UTURN_INT_SE6A2",
"B_TERM_UTURN_INT_LV7",
"B_TERM_UTURN_INT_SW6C2",
"B_TERM_UTURN_INT_SS2BEG1",
"B_TERM_UTURN_INT_LVB_L4",
"B_TERM_UTURN_INT_FAN_BOUNCE6",
"B_TERM_UTURN_INT_LVB_L3",
"B_TERM_UTURN_INT_SE6D3",
"B_TERM_UTURN_INT_LV9",
"B_TERM_UTURN_INT_LV_L7",
"B_TERM_UTURN_INT_SE6C3",
"B_TERM_UTURN_INT_SW6C1",
"B_TERM_UTURN_INT_SE2BEG3",
"B_TERM_UTURN_INT_SS6A1",
"B_TERM_UTURN_INT_LV_L2",
"B_TERM_UTURN_INT_LVB_L0",
"B_TERM_UTURN_INT_SS2BEG2",
"B_TERM_UTURN_INT_SR1BEG1",
"B_TERM_UTURN_INT_LVB1",
"B_TERM_UTURN_INT_LVB_L1",
"B_TERM_UTURN_INT_SE6B0",
"B_TERM_UTURN_INT_SS6D0",
"B_TERM_UTURN_INT_LVB2",
"B_TERM_UTURN_INT_SS2BEG0",
"B_TERM_UTURN_INT_LVB0",
"B_TERM_UTURN_INT_SS6D2",
"B_TERM_UTURN_INT_SE6C1",
"B_TERM_UTURN_INT_SS6BEG2",
"B_TERM_UTURN_INT_SS6E2",
"B_TERM_UTURN_INT_SW6D0",
"B_TERM_UTURN_INT_SL1BEG0",
"B_TERM_UTURN_INT_LV18",
"B_TERM_UTURN_INT_LV6",
"B_TERM_UTURN_INT_LV5",
"B_TERM_UTURN_INT_SR1BEG3",
"B_TERM_UTURN_INT_LVB_L2",
"B_TERM_UTURN_INT_SL1BEG3",
"B_TERM_UTURN_INT_SW2BEG2",
"B_TERM_UTURN_INT_SS6A2",
"B_TERM_UTURN_INT_SS2A3",
"B_TERM_UTURN_INT_SE6C2"
"B_TERM_UTURN_INT_SE6D0",
"B_TERM_UTURN_INT_LV_L18",
"B_TERM_UTURN_INT_FAN_BOUNCE0",
"B_TERM_UTURN_INT_SE2BEG3"
],
"sites": [],
"pips": {},
"tile_type": "BRKH_B_TERM_INT"
"tile_type": "BRKH_B_TERM_INT",
"sites": []
}

10
artix7/tile_type_BRKH_CLB.json
View File

@ -1,11 +1,11 @@
{
"pips": {},
"wires": [
"BRKH_CLB_COUT1_R",
"BRKH_CLB_COUT1_L",
"BRKH_CLB_COUT0_L",
"BRKH_CLB_COUT1_L",
"BRKH_CLB_COUT1_R",
"BRKH_CLB_COUT0_R"
],
"sites": [],
"pips": {},
"tile_type": "BRKH_CLB"
"tile_type": "BRKH_CLB",
"sites": []
}

248
artix7/tile_type_BRKH_CLK.json
View File

@ -1,135 +1,135 @@
{
"pips": {},
"wires": [
"BRKH_CLK_CK_BUFG_CASC23",
"BRKH_CLK_R_CK_GCLK27",
"BRKH_CLK_CK_GCLK4",
"BRKH_CLK_R_CK_BUFG_CASC20",
"BRKH_CLK_CK_GCLK15",
"BRKH_CLK_CK_BUFG_CASC31",
"BRKH_CLK_R_CK_GCLK14",
"BRKH_CLK_CK_GCLK25",
"BRKH_CLK_R_CK_BUFG_CASC14",
"BRKH_CLK_R_CK_GCLK20",
"BRKH_CLK_R_CK_GCLK15",
"BRKH_CLK_R_CK_GCLK3",
"BRKH_CLK_CK_BUFG_CASC17",
"BRKH_CLK_CK_GCLK20",
"BRKH_CLK_R_CK_GCLK25",
"BRKH_CLK_R_CK_GCLK0",
"BRKH_CLK_R_CK_GCLK12",
"BRKH_CLK_R_CK_BUFG_CASC8",
"BRKH_CLK_CK_GCLK28",
"BRKH_CLK_CK_BUFG_CASC20",
"BRKH_CLK_R_CK_BUFG_CASC26",
"BRKH_CLK_CK_BUFG_CASC0",
"BRKH_CLK_R_CK_GCLK16",
"BRKH_CLK_R_CK_GCLK19",
"BRKH_CLK_R_CK_GCLK8",
"BRKH_CLK_CK_GCLK16",
"BRKH_CLK_CK_GCLK29",
"BRKH_CLK_R_CK_GCLK28",
"BRKH_CLK_CK_GCLK17",
"BRKH_CLK_R_CK_GCLK4",
"BRKH_CLK_R_CK_BUFG_CASC28",
"BRKH_CLK_R_CK_BUFG_CASC0",
"BRKH_CLK_R_CK_GCLK29",
"BRKH_CLK_R_CK_GCLK17",
"BRKH_CLK_CK_GCLK13",
"BRKH_CLK_R_CK_GCLK21",
"BRKH_CLK_CK_BUFG_CASC12",
"BRKH_CLK_CK_GCLK30",
"BRKH_CLK_R_CK_GCLK22",
"BRKH_CLK_CK_GCLK12",
"BRKH_CLK_CK_BUFG_CASC29",
"BRKH_CLK_CK_BUFG_CASC22",
"BRKH_CLK_R_CK_BUFG_CASC25",
"BRKH_CLK_CK_GCLK6",
"BRKH_CLK_CK_GCLK19",
"BRKH_CLK_R_CK_GCLK13",
"BRKH_CLK_R_CK_BUFG_CASC3",
"BRKH_CLK_R_CK_GCLK30",
"BRKH_CLK_R_CK_GCLK11",
"BRKH_CLK_R_CK_BUFG_CASC27",
"BRKH_CLK_R_CK_BUFG_CASC23",
"BRKH_CLK_R_CK_BUFG_CASC12",
"BRKH_CLK_R_CK_GCLK10",
"BRKH_CLK_CK_GCLK0",
"BRKH_CLK_CK_GCLK11",
"BRKH_CLK_CK_BUFG_CASC6",
"BRKH_CLK_CK_GCLK5",
"BRKH_CLK_CK_GCLK27",
"BRKH_CLK_CK_GCLK23",
"BRKH_CLK_CK_GCLK14",
"BRKH_CLK_CK_BUFG_CASC13",
"BRKH_CLK_CK_BUFG_CASC18",
"BRKH_CLK_CK_BUFG_CASC19",
"BRKH_CLK_CK_GCLK7",
"BRKH_CLK_R_CK_GCLK1",
"BRKH_CLK_R_CK_BUFG_CASC18",
"BRKH_CLK_CK_GCLK1",
"BRKH_CLK_CK_BUFG_CASC30",
"BRKH_CLK_R_CK_GCLK6",
"BRKH_CLK_R_CK_GCLK26",
"BRKH_CLK_CK_GCLK31",
"BRKH_CLK_CK_GCLK24",
"BRKH_CLK_CK_BUFG_CASC14",
"BRKH_CLK_CK_BUFG_CASC8",
"BRKH_CLK_R_CK_BUFG_CASC30",
"BRKH_CLK_CK_BUFG_CASC7",
"BRKH_CLK_R_CK_BUFG_CASC15",
"BRKH_CLK_CK_GCLK26",
"BRKH_CLK_R_CK_BUFG_CASC31",
"BRKH_CLK_CK_BUFG_CASC21",
"BRKH_CLK_CK_BUFG_CASC25",
"BRKH_CLK_R_CK_BUFG_CASC29",
"BRKH_CLK_R_CK_BUFG_CASC13",
"BRKH_CLK_CK_GCLK10",
"BRKH_CLK_R_CK_GCLK5",
"BRKH_CLK_R_CK_GCLK18",
"BRKH_CLK_CK_GCLK9",
"BRKH_CLK_CK_BUFG_CASC22",
"BRKH_CLK_R_CK_BUFG_CASC11",
"BRKH_CLK_R_CK_GCLK16",
"BRKH_CLK_CK_BUFG_CASC2",
"BRKH_CLK_R_CK_BUFG_CASC30",
"BRKH_CLK_CK_BUFG_CASC31",
"BRKH_CLK_CK_BUFG_CASC5",
"BRKH_CLK_R_CK_BUFG_CASC22",
"BRKH_CLK_CK_GCLK18",
"BRKH_CLK_R_CK_BUFG_CASC18",
"BRKH_CLK_R_CK_GCLK22",
"BRKH_CLK_CK_GCLK0",
"BRKH_CLK_CK_BUFG_CASC7",
"BRKH_CLK_CK_BUFG_CASC16",
"BRKH_CLK_CK_GCLK1",
"BRKH_CLK_CK_GCLK30",
"BRKH_CLK_CK_BUFG_CASC18",
"BRKH_CLK_CK_GCLK6",
"BRKH_CLK_CK_GCLK10",
"BRKH_CLK_R_CK_BUFG_CASC21",
"BRKH_CLK_R_CK_GCLK31",
"BRKH_CLK_CK_BUFG_CASC14",
"BRKH_CLK_R_CK_BUFG_CASC4",
"BRKH_CLK_CK_BUFG_CASC11",
"BRKH_CLK_CK_GCLK8",
"BRKH_CLK_CK_BUFG_CASC27",
"BRKH_CLK_R_CK_BUFG_CASC21",
"BRKH_CLK_CK_GCLK3",
"BRKH_CLK_R_CK_BUFG_CASC11",
"BRKH_CLK_R_CK_BUFG_CASC7",
"BRKH_CLK_R_CK_BUFG_CASC16",
"BRKH_CLK_R_CK_GCLK23",
"BRKH_CLK_R_CK_GCLK7",
"BRKH_CLK_R_CK_BUFG_CASC24",
"BRKH_CLK_R_CK_BUFG_CASC9",
"BRKH_CLK_R_CK_BUFG_CASC6",
"BRKH_CLK_R_CK_BUFG_CASC17",
"BRKH_CLK_CK_BUFG_CASC24",
"BRKH_CLK_R_CK_BUFG_CASC1",
"BRKH_CLK_CK_BUFG_CASC16",
"BRKH_CLK_CK_BUFG_CASC9",
"BRKH_CLK_CK_BUFG_CASC26",
"BRKH_CLK_CK_BUFG_CASC15",
"BRKH_CLK_R_CK_BUFG_CASC5",
"BRKH_CLK_CK_GCLK22",
"BRKH_CLK_R_CK_GCLK24",
"BRKH_CLK_CK_GCLK21",
"BRKH_CLK_CK_BUFG_CASC28",
"BRKH_CLK_R_CK_GCLK2",
"BRKH_CLK_CK_BUFG_CASC1",
"BRKH_CLK_CK_BUFG_CASC4",
"BRKH_CLK_CK_GCLK18",
"BRKH_CLK_CK_BUFG_CASC2",
"BRKH_CLK_R_CK_GCLK31",
"BRKH_CLK_CK_BUFG_CASC3",
"BRKH_CLK_CK_GCLK2",
"BRKH_CLK_R_CK_BUFG_CASC2",
"BRKH_CLK_CK_BUFG_CASC10",
"BRKH_CLK_R_CK_BUFG_CASC10",
"BRKH_CLK_R_CK_BUFG_CASC4",
"BRKH_CLK_R_CK_BUFG_CASC0",
"BRKH_CLK_R_CK_GCLK28",
"BRKH_CLK_CK_GCLK14",
"BRKH_CLK_CK_BUFG_CASC24",
"BRKH_CLK_R_CK_BUFG_CASC24",
"BRKH_CLK_CK_BUFG_CASC0",
"BRKH_CLK_CK_GCLK3",
"BRKH_CLK_R_CK_GCLK8",
"BRKH_CLK_R_CK_GCLK27",
"BRKH_CLK_R_CK_BUFG_CASC9",
"BRKH_CLK_CK_BUFG_CASC9",
"BRKH_CLK_R_CK_BUFG_CASC6",
"BRKH_CLK_R_CK_GCLK18",
"BRKH_CLK_CK_GCLK19",
"BRKH_CLK_CK_GCLK21",
"BRKH_CLK_CK_BUFG_CASC27",
"BRKH_CLK_CK_GCLK2",
"BRKH_CLK_R_CK_BUFG_CASC29",
"BRKH_CLK_R_CK_GCLK3",
"BRKH_CLK_R_CK_BUFG_CASC17",
"BRKH_CLK_R_CK_GCLK12",
"BRKH_CLK_CK_BUFG_CASC28",
"BRKH_CLK_R_CK_GCLK10",
"BRKH_CLK_R_CK_BUFG_CASC26",
"BRKH_CLK_R_CK_GCLK19",
"BRKH_CLK_CK_BUFG_CASC4",
"BRKH_CLK_R_CK_BUFG_CASC13",
"BRKH_CLK_CK_BUFG_CASC17",
"BRKH_CLK_CK_BUFG_CASC1",
"BRKH_CLK_CK_GCLK24",
"BRKH_CLK_CK_GCLK12",
"BRKH_CLK_CK_GCLK9",
"BRKH_CLK_R_CK_GCLK17",
"BRKH_CLK_R_CK_BUFG_CASC8",
"BRKH_CLK_CK_GCLK11",
"BRKH_CLK_R_CK_BUFG_CASC31",
"BRKH_CLK_R_CK_BUFG_CASC27",
"BRKH_CLK_CK_GCLK28",
"BRKH_CLK_CK_BUFG_CASC13",
"BRKH_CLK_CK_BUFG_CASC20",
"BRKH_CLK_R_CK_BUFG_CASC19",
"BRKH_CLK_R_CK_GCLK9"
"BRKH_CLK_R_CK_GCLK29",
"BRKH_CLK_CK_GCLK7",
"BRKH_CLK_R_CK_GCLK23",
"BRKH_CLK_R_CK_BUFG_CASC20",
"BRKH_CLK_CK_BUFG_CASC21",
"BRKH_CLK_CK_BUFG_CASC30",
"BRKH_CLK_CK_BUFG_CASC19",
"BRKH_CLK_R_CK_BUFG_CASC2",
"BRKH_CLK_R_CK_BUFG_CASC23",
"BRKH_CLK_R_CK_BUFG_CASC7",
"BRKH_CLK_R_CK_BUFG_CASC1",
"BRKH_CLK_CK_BUFG_CASC3",
"BRKH_CLK_CK_BUFG_CASC29",
"BRKH_CLK_R_CK_GCLK21",
"BRKH_CLK_R_CK_BUFG_CASC25",
"BRKH_CLK_R_CK_GCLK9",
"BRKH_CLK_CK_GCLK16",
"BRKH_CLK_R_CK_GCLK20",
"BRKH_CLK_R_CK_GCLK14",
"BRKH_CLK_R_CK_GCLK5",
"BRKH_CLK_R_CK_GCLK25",
"BRKH_CLK_CK_BUFG_CASC12",
"BRKH_CLK_CK_GCLK22",
"BRKH_CLK_CK_GCLK15",
"BRKH_CLK_CK_GCLK5",
"BRKH_CLK_R_CK_GCLK26",
"BRKH_CLK_R_CK_BUFG_CASC5",
"BRKH_CLK_CK_GCLK13",
"BRKH_CLK_R_CK_GCLK2",
"BRKH_CLK_CK_GCLK20",
"BRKH_CLK_R_CK_BUFG_CASC12",
"BRKH_CLK_CK_GCLK29",
"BRKH_CLK_R_CK_BUFG_CASC16",
"BRKH_CLK_CK_GCLK31",
"BRKH_CLK_R_CK_GCLK7",
"BRKH_CLK_CK_GCLK27",
"BRKH_CLK_R_CK_GCLK30",
"BRKH_CLK_R_CK_GCLK24",
"BRKH_CLK_R_CK_GCLK0",
"BRKH_CLK_CK_GCLK17",
"BRKH_CLK_CK_BUFG_CASC10",
"BRKH_CLK_CK_BUFG_CASC8",
"BRKH_CLK_R_CK_BUFG_CASC15",
"BRKH_CLK_CK_GCLK23",
"BRKH_CLK_CK_GCLK25",
"BRKH_CLK_CK_BUFG_CASC6",
"BRKH_CLK_R_CK_GCLK11",
"BRKH_CLK_R_CK_GCLK1",
"BRKH_CLK_R_CK_BUFG_CASC22",
"BRKH_CLK_R_CK_GCLK6",
"BRKH_CLK_R_CK_GCLK15",
"BRKH_CLK_CK_GCLK26",
"BRKH_CLK_R_CK_GCLK13",
"BRKH_CLK_R_CK_BUFG_CASC14",
"BRKH_CLK_R_CK_GCLK4",
"BRKH_CLK_R_CK_BUFG_CASC3",
"BRKH_CLK_CK_BUFG_CASC23",
"BRKH_CLK_CK_BUFG_CASC15",
"BRKH_CLK_CK_BUFG_CASC26",
"BRKH_CLK_CK_GCLK4"
],
"sites": [],
"pips": {},
"tile_type": "BRKH_CLK"
"tile_type": "BRKH_CLK",
"sites": []
}

16
artix7/tile_type_BRKH_CMT.json
View File

@ -1,16 +1,16 @@
{
"pips": {},
"wires": [
"BRKH_CMT_PHASEREF1",
"BRKH_CMT_FREQ_REF_NS1",
"BRKH_CMT_FREQ_REF_NS0",
"BRKH_CMT_PHASEREF_BELOW0",
"BRKH_CMT_FREQ_REF_NS2",
"BRKH_CMT_PHYCTRL_SYNC_BB",
"BRKH_CMT_PHASEREF1",
"BRKH_CMT_FREQ_REF_NS3",
"BRKH_CMT_PHASEREF0",
"BRKH_CMT_FREQ_REF_NS2",
"BRKH_CMT_PHASEREF_BELOW1",
"BRKH_CMT_PHYCTRL_SYNC_BB"
"BRKH_CMT_FREQ_REF_NS0",
"BRKH_CMT_PHASEREF_BELOW0"
],
"sites": [],
"pips": {},
"tile_type": "BRKH_CMT"
"tile_type": "BRKH_CMT",
"sites": []
}

186
artix7/tile_type_BRKH_DSP_L.json
View File

@ -1,105 +1,105 @@
{
"pips": {},
"wires": [
"BRKH_DSP_PCIN45",
"BRKH_DSP_ACIN28",
"BRKH_DSP_BCIN9",
"BRKH_DSP_PCIN12",
"BRKH_DSP_PCIN35",
"BRKH_DSP_PCIN15",
"BRKH_DSP_BCIN12",
"BRKH_DSP_PCIN6",
"BRKH_DSP_PCIN31",
"BRKH_DSP_PCIN37",
"BRKH_DSP_PCIN29",
"BRKH_DSP_ACIN15",
"BRKH_DSP_ACIN8",
"BRKH_DSP_ACIN2",
"BRKH_DSP_PCIN36",
"BRKH_DSP_PCIN46",
"BRKH_DSP_PCIN43",
"BRKH_DSP_BCIN8",
"BRKH_DSP_BCIN7",
"BRKH_DSP_BCIN11",
"BRKH_DSP_BCIN13",
"BRKH_DSP_ACIN13",
"BRKH_DSP_ACIN9",
"BRKH_DSP_PCIN19",
"BRKH_DSP_BCIN17",
"BRKH_DSP_PCIN44",
"BRKH_DSP_PCIN8",
"BRKH_DSP_PCIN24",
"BRKH_DSP_PCIN13",
"BRKH_DSP_PCIN18",
"BRKH_DSP_ACIN27",
"BRKH_DSP_PCIN17",
"BRKH_DSP_BCIN0",
"BRKH_DSP_ACIN1",
"BRKH_DSP_PCIN35",
"BRKH_DSP_BCIN15",
"BRKH_DSP_ACIN28",
"BRKH_DSP_PCIN21",
"BRKH_DSP_PCIN42",
"BRKH_DSP_BCIN5",
"BRKH_DSP_BCIN10",
"BRKH_DSP_ACIN29",
"BRKH_DSP_ACIN26",
"BRKH_DSP_PCIN16",
"BRKH_DSP_ACIN6",
"BRKH_DSP_BCIN2",
"BRKH_DSP_ACIN11",
"BRKH_DSP_MULTSIGNIN",
"BRKH_DSP_PCIN2",
"BRKH_DSP_PCIN12",
"BRKH_DSP_PCIN10",
"BRKH_DSP_CARRYCASCIN",
"BRKH_DSP_PCIN26",
"BRKH_DSP_PCIN4",
"BRKH_DSP_PCIN20",
"BRKH_DSP_ACIN0",
"BRKH_DSP_ACIN5",
"BRKH_DSP_PCIN5",
"BRKH_DSP_PCIN3",
"BRKH_DSP_PCIN39",
"BRKH_DSP_PCIN30",
"BRKH_DSP_ACIN25",
"BRKH_DSP_PCIN40",
"BRKH_DSP_PCIN22",
"BRKH_DSP_PCIN1",
"BRKH_DSP_ACIN7",
"BRKH_DSP_BCIN3",
"BRKH_DSP_PCIN34",
"BRKH_DSP_BCIN9",
"BRKH_DSP_ACIN10",
"BRKH_DSP_ACIN17",
"BRKH_DSP_ACIN14",
"BRKH_DSP_CARRYCASCIN",
"BRKH_DSP_BCIN5",
"BRKH_DSP_PCIN16",
"BRKH_DSP_PCIN19",
"BRKH_DSP_BCIN10",
"BRKH_DSP_PCIN25",
"BRKH_DSP_BCIN6",
"BRKH_DSP_ACIN4",
"BRKH_DSP_PCIN41",
"BRKH_DSP_BCIN0",
"BRKH_DSP_PCIN38",
"BRKH_DSP_ACIN23",
"BRKH_DSP_BCIN4",
"BRKH_DSP_MULTSIGNIN",
"BRKH_DSP_PCIN30",
"BRKH_DSP_PCIN9",
"BRKH_DSP_ACIN20",
"BRKH_DSP_PCIN39",
"BRKH_DSP_PCIN26",
"BRKH_DSP_BCIN12",
"BRKH_DSP_ACIN15",
"BRKH_DSP_PCIN17",
"BRKH_DSP_BCIN14",
"BRKH_DSP_PCIN4",
"BRKH_DSP_PCIN33",
"BRKH_DSP_PCIN13",
"BRKH_DSP_PCIN23",
"BRKH_DSP_PCIN24",
"BRKH_DSP_PCIN34",
"BRKH_DSP_PCIN5",
"BRKH_DSP_ACIN25",
"BRKH_DSP_PCIN21",
"BRKH_DSP_PCIN11",
"BRKH_DSP_PCIN22",
"BRKH_DSP_ACIN1",
"BRKH_DSP_PCIN8",
"BRKH_DSP_ACIN6",
"BRKH_DSP_ACIN3",
"BRKH_DSP_ACIN5",
"BRKH_DSP_PCIN3",
"BRKH_DSP_BCIN17",
"BRKH_DSP_PCIN37",
"BRKH_DSP_BCIN8",
"BRKH_DSP_PCIN31",
"BRKH_DSP_BCIN16",
"BRKH_DSP_PCIN18",
"BRKH_DSP_ACIN26",
"BRKH_DSP_ACIN18",
"BRKH_DSP_ACIN16",
"BRKH_DSP_ACIN9",
"BRKH_DSP_BCIN13",
"BRKH_DSP_PCIN7",
"BRKH_DSP_PCIN36",
"BRKH_DSP_ACIN13",
"BRKH_DSP_ACIN20",
"BRKH_DSP_BCIN1",
"BRKH_DSP_PCIN2",
"BRKH_DSP_PCIN10",
"BRKH_DSP_PCIN11",
"BRKH_DSP_ACIN12",
"BRKH_DSP_BCIN11",
"BRKH_DSP_ACIN0",
"BRKH_DSP_PCIN29",
"BRKH_DSP_PCIN27",
"BRKH_DSP_ACIN21",
"BRKH_DSP_BCIN7",
"BRKH_DSP_ACIN2",
"BRKH_DSP_ACIN29",
"BRKH_DSP_PCIN42",
"BRKH_DSP_BCIN3",
"BRKH_DSP_PCIN46",
"BRKH_DSP_ACIN11",
"BRKH_DSP_BCIN2",
"BRKH_DSP_PCIN20",
"BRKH_DSP_ACIN10",
"BRKH_DSP_PCIN6",
"BRKH_DSP_ACIN8",
"BRKH_DSP_ACIN22",
"BRKH_DSP_PCIN14",
"BRKH_DSP_BCIN15",
"BRKH_DSP_ACIN7",
"BRKH_DSP_PCIN43",
"BRKH_DSP_ACIN24",
"BRKH_DSP_PCIN44",
"BRKH_DSP_PCIN32",
"BRKH_DSP_ACIN19",
"BRKH_DSP_PCIN1",
"BRKH_DSP_PCIN15",
"BRKH_DSP_PCIN0",
"BRKH_DSP_PCIN28",
"BRKH_DSP_PCIN47"
"BRKH_DSP_PCIN47",
"BRKH_DSP_PCIN7",
"BRKH_DSP_PCIN41",
"BRKH_DSP_BCIN16",
"BRKH_DSP_ACIN24",
"BRKH_DSP_ACIN19",
"BRKH_DSP_ACIN22",
"BRKH_DSP_BCIN4",
"BRKH_DSP_PCIN33",
"BRKH_DSP_PCIN9",
"BRKH_DSP_PCIN14",
"BRKH_DSP_PCIN38",
"BRKH_DSP_ACIN16",
"BRKH_DSP_ACIN23",
"BRKH_DSP_BCIN14",
"BRKH_DSP_PCIN25",
"BRKH_DSP_ACIN4",
"BRKH_DSP_ACIN21",
"BRKH_DSP_PCIN23",
"BRKH_DSP_PCIN0",
"BRKH_DSP_PCIN27",
"BRKH_DSP_PCIN45",
"BRKH_DSP_ACIN18",
"BRKH_DSP_BCIN6",
"BRKH_DSP_PCIN32"
],
"sites": [],
"pips": {},
"tile_type": "BRKH_DSP_L"
"tile_type": "BRKH_DSP_L",
"sites": []
}

186
artix7/tile_type_BRKH_DSP_R.json
View File

@ -1,105 +1,105 @@
{
"pips": {},
"wires": [
"BRKH_DSP_PCIN45",
"BRKH_DSP_ACIN28",
"BRKH_DSP_BCIN9",
"BRKH_DSP_PCIN12",
"BRKH_DSP_PCIN35",
"BRKH_DSP_PCIN15",
"BRKH_DSP_BCIN12",
"BRKH_DSP_PCIN6",
"BRKH_DSP_PCIN31",
"BRKH_DSP_PCIN37",
"BRKH_DSP_PCIN29",
"BRKH_DSP_ACIN15",
"BRKH_DSP_ACIN8",
"BRKH_DSP_ACIN2",
"BRKH_DSP_PCIN36",
"BRKH_DSP_PCIN46",
"BRKH_DSP_PCIN43",
"BRKH_DSP_BCIN8",
"BRKH_DSP_BCIN7",
"BRKH_DSP_BCIN11",
"BRKH_DSP_BCIN13",
"BRKH_DSP_ACIN13",
"BRKH_DSP_ACIN9",
"BRKH_DSP_PCIN19",
"BRKH_DSP_BCIN17",
"BRKH_DSP_PCIN44",
"BRKH_DSP_PCIN8",
"BRKH_DSP_PCIN24",
"BRKH_DSP_PCIN13",
"BRKH_DSP_PCIN18",
"BRKH_DSP_ACIN27",
"BRKH_DSP_PCIN17",
"BRKH_DSP_BCIN0",
"BRKH_DSP_ACIN1",
"BRKH_DSP_PCIN35",
"BRKH_DSP_BCIN15",
"BRKH_DSP_ACIN28",
"BRKH_DSP_PCIN21",
"BRKH_DSP_PCIN42",
"BRKH_DSP_BCIN5",
"BRKH_DSP_BCIN10",
"BRKH_DSP_ACIN29",
"BRKH_DSP_ACIN26",
"BRKH_DSP_PCIN16",
"BRKH_DSP_ACIN6",
"BRKH_DSP_BCIN2",
"BRKH_DSP_ACIN11",
"BRKH_DSP_MULTSIGNIN",
"BRKH_DSP_PCIN2",
"BRKH_DSP_PCIN12",
"BRKH_DSP_PCIN10",
"BRKH_DSP_CARRYCASCIN",
"BRKH_DSP_PCIN26",
"BRKH_DSP_PCIN4",
"BRKH_DSP_PCIN20",
"BRKH_DSP_ACIN0",
"BRKH_DSP_ACIN5",
"BRKH_DSP_PCIN5",
"BRKH_DSP_PCIN3",
"BRKH_DSP_PCIN39",
"BRKH_DSP_PCIN30",
"BRKH_DSP_ACIN25",
"BRKH_DSP_PCIN40",
"BRKH_DSP_PCIN22",
"BRKH_DSP_PCIN1",
"BRKH_DSP_ACIN7",
"BRKH_DSP_BCIN3",
"BRKH_DSP_PCIN34",
"BRKH_DSP_BCIN9",
"BRKH_DSP_ACIN10",
"BRKH_DSP_ACIN17",
"BRKH_DSP_ACIN14",
"BRKH_DSP_CARRYCASCIN",
"BRKH_DSP_BCIN5",
"BRKH_DSP_PCIN16",
"BRKH_DSP_PCIN19",
"BRKH_DSP_BCIN10",
"BRKH_DSP_PCIN25",
"BRKH_DSP_BCIN6",
"BRKH_DSP_ACIN4",
"BRKH_DSP_PCIN41",
"BRKH_DSP_BCIN0",
"BRKH_DSP_PCIN38",
"BRKH_DSP_ACIN23",
"BRKH_DSP_BCIN4",
"BRKH_DSP_MULTSIGNIN",
"BRKH_DSP_PCIN30",
"BRKH_DSP_PCIN9",
"BRKH_DSP_ACIN20",
"BRKH_DSP_PCIN39",
"BRKH_DSP_PCIN26",
"BRKH_DSP_BCIN12",
"BRKH_DSP_ACIN15",
"BRKH_DSP_PCIN17",
"BRKH_DSP_BCIN14",
"BRKH_DSP_PCIN4",
"BRKH_DSP_PCIN33",
"BRKH_DSP_PCIN13",
"BRKH_DSP_PCIN23",
"BRKH_DSP_PCIN24",
"BRKH_DSP_PCIN34",
"BRKH_DSP_PCIN5",
"BRKH_DSP_ACIN25",
"BRKH_DSP_PCIN21",
"BRKH_DSP_PCIN11",
"BRKH_DSP_PCIN22",
"BRKH_DSP_ACIN1",
"BRKH_DSP_PCIN8",
"BRKH_DSP_ACIN6",
"BRKH_DSP_ACIN3",
"BRKH_DSP_ACIN5",
"BRKH_DSP_PCIN3",
"BRKH_DSP_BCIN17",
"BRKH_DSP_PCIN37",
"BRKH_DSP_BCIN8",
"BRKH_DSP_PCIN31",
"BRKH_DSP_BCIN16",
"BRKH_DSP_PCIN18",
"BRKH_DSP_ACIN26",
"BRKH_DSP_ACIN18",
"BRKH_DSP_ACIN16",
"BRKH_DSP_ACIN9",
"BRKH_DSP_BCIN13",
"BRKH_DSP_PCIN7",
"BRKH_DSP_PCIN36",
"BRKH_DSP_ACIN13",
"BRKH_DSP_ACIN20",
"BRKH_DSP_BCIN1",
"BRKH_DSP_PCIN2",
"BRKH_DSP_PCIN10",
"BRKH_DSP_PCIN11",
"BRKH_DSP_ACIN12",
"BRKH_DSP_BCIN11",
"BRKH_DSP_ACIN0",
"BRKH_DSP_PCIN29",
"BRKH_DSP_PCIN27",
"BRKH_DSP_ACIN21",
"BRKH_DSP_BCIN7",
"BRKH_DSP_ACIN2",
"BRKH_DSP_ACIN29",
"BRKH_DSP_PCIN42",
"BRKH_DSP_BCIN3",
"BRKH_DSP_PCIN46",
"BRKH_DSP_ACIN11",
"BRKH_DSP_BCIN2",
"BRKH_DSP_PCIN20",
"BRKH_DSP_ACIN10",
"BRKH_DSP_PCIN6",
"BRKH_DSP_ACIN8",
"BRKH_DSP_ACIN22",
"BRKH_DSP_PCIN14",
"BRKH_DSP_BCIN15",
"BRKH_DSP_ACIN7",
"BRKH_DSP_PCIN43",
"BRKH_DSP_ACIN24",
"BRKH_DSP_PCIN44",
"BRKH_DSP_PCIN32",
"BRKH_DSP_ACIN19",
"BRKH_DSP_PCIN1",
"BRKH_DSP_PCIN15",
"BRKH_DSP_PCIN0",
"BRKH_DSP_PCIN28",
"BRKH_DSP_PCIN47"
"BRKH_DSP_PCIN47",
"BRKH_DSP_PCIN7",
"BRKH_DSP_PCIN41",
"BRKH_DSP_BCIN16",
"BRKH_DSP_ACIN24",
"BRKH_DSP_ACIN19",
"BRKH_DSP_ACIN22",
"BRKH_DSP_BCIN4",
"BRKH_DSP_PCIN33",
"BRKH_DSP_PCIN9",
"BRKH_DSP_PCIN14",
"BRKH_DSP_PCIN38",
"BRKH_DSP_ACIN16",
"BRKH_DSP_ACIN23",
"BRKH_DSP_BCIN14",
"BRKH_DSP_PCIN25",
"BRKH_DSP_ACIN4",
"BRKH_DSP_ACIN21",
"BRKH_DSP_PCIN23",
"BRKH_DSP_PCIN0",
"BRKH_DSP_PCIN27",
"BRKH_DSP_PCIN45",
"BRKH_DSP_ACIN18",
"BRKH_DSP_BCIN6",
"BRKH_DSP_PCIN32"
],
"sites": [],
"pips": {},
"tile_type": "BRKH_DSP_R"
"tile_type": "BRKH_DSP_R",
"sites": []
}

166
artix7/tile_type_BRKH_GTX.json
View File

@ -1,104 +1,104 @@
{
"wires": [
"BRKH_GTX_SOUTHREFCLK0_LOWER",
"BRKH_GTX_NORTHREFCLK1_UPPER",
"BRKH_GTX_REFCLK0_LOWER",
"BRKH_GTX_NORTHREFCLK0_UPPER",
"BRKH_GTX_REFCLK1_LOWER",
"BRKH_GTX_REFCLK0_UPPER",
"BRKH_GTX_SOUTHREFCLK0_UPPER",
"BRKH_GTX_SOUTHREFCLK1_UPPER",
"BRKH_GTX_NORTHREFCLK0_LOWER",
"BRKH_GTX_SOUTHREFCLK1_LOWER",
"BRKH_GTX_NORTHREFCLK1_LOWER",
"BRKH_GTX_REFCLK1_UPPER"
],
"sites": [],
"pips": {
"BRKH_GTX.BRKH_GTX_NORTHREFCLK0_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
"BRKH_GTX.BRKH_GTX_SOUTHREFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
"src_wire": "BRKH_GTX_SOUTHREFCLK1_UPPER",
"is_directional": "1",
"src_wire": "BRKH_GTX_NORTHREFCLK0_LOWER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK0_LOWER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK0_UPPER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_SOUTHREFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_SOUTHREFCLK0_UPPER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK1_LOWER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK1_LOWER",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK1_UPPER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK0_LOWER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK1_UPPER",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_REFCLK0_UPPER",
"is_pseudo": "0"
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER"
},
"BRKH_GTX.BRKH_GTX_SOUTHREFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
"can_invert": "0",
"src_wire": "BRKH_GTX_SOUTHREFCLK0_UPPER",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
"can_invert": "0",
"src_wire": "BRKH_GTX_REFCLK0_UPPER",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK0_LOWER": {
"can_invert": "0",
"src_wire": "BRKH_GTX_REFCLK1_UPPER",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK0_LOWER"
},
"BRKH_GTX.BRKH_GTX_NORTHREFCLK0_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
"can_invert": "0",
"src_wire": "BRKH_GTX_NORTHREFCLK0_LOWER",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER"
},
"BRKH_GTX.BRKH_GTX_NORTHREFCLK1_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER",
"is_directional": "1",
"src_wire": "BRKH_GTX_NORTHREFCLK1_LOWER",
"is_pseudo": "0"
},
"BRKH_GTX.BRKH_GTX_SOUTHREFCLK1_UPPER->BRKH_GTX_SOUTHREFCLK1_LOWER": {
"can_invert": "0",
"dst_wire": "BRKH_GTX_SOUTHREFCLK1_LOWER",
"is_directional": "1",
"src_wire": "BRKH_GTX_SOUTHREFCLK1_UPPER",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
"can_invert": "0",
"src_wire": "BRKH_GTX_REFCLK0_LOWER",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER"
},
"BRKH_GTX.BRKH_GTX_REFCLK0_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
"can_invert": "0",
"src_wire": "BRKH_GTX_REFCLK0_LOWER",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_LOWER->BRKH_GTX_NORTHREFCLK0_UPPER": {
"can_invert": "0",
"src_wire": "BRKH_GTX_REFCLK1_LOWER",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK0_UPPER"
},
"BRKH_GTX.BRKH_GTX_REFCLK1_LOWER->BRKH_GTX_NORTHREFCLK1_UPPER": {
"can_invert": "0",
"src_wire": "BRKH_GTX_REFCLK1_LOWER",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_GTX_NORTHREFCLK1_UPPER"
}
},
"tile_type": "BRKH_GTX"
"wires": [
"BRKH_GTX_SOUTHREFCLK0_UPPER",
"BRKH_GTX_REFCLK0_UPPER",
"BRKH_GTX_NORTHREFCLK0_LOWER",
"BRKH_GTX_REFCLK1_LOWER",
"BRKH_GTX_NORTHREFCLK1_LOWER",
"BRKH_GTX_SOUTHREFCLK1_LOWER",
"BRKH_GTX_NORTHREFCLK0_UPPER",
"BRKH_GTX_NORTHREFCLK1_UPPER",
"BRKH_GTX_REFCLK0_LOWER",
"BRKH_GTX_REFCLK1_UPPER",
"BRKH_GTX_SOUTHREFCLK1_UPPER",
"BRKH_GTX_SOUTHREFCLK0_LOWER"
],
"tile_type": "BRKH_GTX",
"sites": []
}

704
artix7/tile_type_BRKH_INT.json
View File

@ -1,367 +1,367 @@
{
"wires": [
"BRKH_INT_SE6B1",
"BRKH_INT_L_LV6",
"BRKH_INT_SE6C2",
"BRKH_INT_NE6D1",
"BRKH_INT_LVB10",
"BRKH_INT_LVB5",
"BRKH_INT_SL1END2",
"BRKH_INT_LV9",
"BRKH_INT_SS6C2",
"BRKH_INT_NL1BEG2",
"BRKH_INT_SR1END1_SLOW",
"BRKH_INT_NN6C0",
"BRKH_INT_L_LV3",
"BRKH_INT_SE6E2",
"BRKH_INT_NN2BEG0",
"BRKH_INT_NN6A3",
"BRKH_INT_NW6C2",
"BRKH_INT_NR1BEG2_SLOW",
"BRKH_INT_NW6B0",
"BRKH_INT_SW6C3",
"BRKH_INT_NR1BEG3",
"BRKH_INT_NW6D1",
"BRKH_INT_ER1END3",
"BRKH_INT_NL1BEG0_SLOW",
"BRKH_INT_NW6D0",
"BRKH_INT_NW2BEG1",
"BRKH_INT_SS6END1",
"BRKH_INT_NN6BEG1",
"BRKH_INT_NW6END_S0_0",
"BRKH_INT_SE6B2",
"BRKH_INT_SS2A3",
"BRKH_INT_LVB_L10",
"BRKH_INT_NE6A1",
"BRKH_INT_L_LV1",
"BRKH_INT_SW2A3",
"BRKH_INT_SS6D3",
"BRKH_INT_NN2A2",
"BRKH_INT_SR1END3",
"BRKH_INT_NL1END_S3_0",
"BRKH_INT_SL1END2_SLOW",
"BRKH_INT_SE2A2",
"BRKH_INT_SE2A0",
"BRKH_INT_NL1BEG1_SLOW",
"BRKH_INT_SW6E1",
"BRKH_INT_NE2BEG1",
"BRKH_INT_SS2A1",
"BRKH_INT_SS6A0",
"BRKH_INT_LV10",
"BRKH_INT_SE6D0",
"BRKH_INT_NW2END_S0_0",
"BRKH_INT_SS6C1",
"BRKH_INT_LVB3",
"BRKH_INT_SW2A0",
"BRKH_INT_SW6B0",
"BRKH_INT_SW6E2",
"BRKH_INT_NN6C1",
"BRKH_INT_SW6D3",
"BRKH_INT_NL1BEG2_SLOW",
"BRKH_INT_LV3",
"BRKH_INT_LV13",
"BRKH_INT_NW6C3",
"BRKH_INT_NE2END_S3_0",
"BRKH_INT_SS2END3",
"BRKH_INT_SS6C3",
"BRKH_INT_SS2END2",
"BRKH_INT_NW2BEG2",
"BRKH_INT_SW6B1",
"BRKH_INT_NN6A1",
"BRKH_INT_SS6END0",
"BRKH_INT_NR1BEG1",
"BRKH_INT_SS6D2",
"BRKH_INT_SW6E3",
"BRKH_INT_SE6D1",
"BRKH_INT_BYP_BOUNCE2",
"BRKH_INT_BYP_BOUNCE6",
"BRKH_INT_SL1END1_SLOW",
"BRKH_INT_NE6B0",
"BRKH_INT_NW2BEG0",
"BRKH_INT_SE6B3",
"BRKH_INT_NN2A0",
"BRKH_INT_LV17",
"BRKH_INT_NN2BEG1",
"BRKH_INT_SL1END3_SLOW",
"BRKH_INT_SS6A3",
"BRKH_INT_ER1BEG_S0",
"BRKH_INT_NN6E0",
"BRKH_INT_NN2A3",
"BRKH_INT_SS6E2",
"BRKH_INT_SS6B0",
"BRKH_INT_NW2BEG3",
"BRKH_INT_NR1BEG2",
"BRKH_INT_SE6B0",
"BRKH_INT_SS2END_N0_3",
"BRKH_INT_SS6C0",
"BRKH_INT_NE6A2",
"BRKH_INT_NW6A0",
"BRKH_INT_SE6D3",
"BRKH_INT_LV8",
"BRKH_INT_NW6A2",
"BRKH_INT_NN6BEG3",
"BRKH_INT_NN2BEG2",
"BRKH_INT_NN6A2",
"BRKH_INT_SW6D2",
"BRKH_INT_LV5",
"BRKH_INT_EL1BEG3",
"BRKH_INT_L_LV14",
"BRKH_INT_SR1END_N3_3",
"BRKH_INT_NE6B1",
"BRKH_INT_LVB_L2",
"BRKH_INT_LVB_L7",
"BRKH_INT_SS6E3",
"BRKH_INT_NN6A0",
"BRKH_INT_NE6B2",
"BRKH_INT_NN6B3",
"BRKH_INT_SS6B2",
"BRKH_INT_NE2BEG0",
"BRKH_INT_SE6E0",
"BRKH_INT_SS6B1",
"BRKH_INT_SW6C2",
"BRKH_INT_SW2END3",
"BRKH_INT_LV1",
"BRKH_INT_SR1END2_SLOW",
"BRKH_INT_NE6D2",
"BRKH_INT_NN6BEG0",
"BRKH_INT_L_LV10",
"BRKH_INT_SE2A1",
"BRKH_INT_SS6END2",
"BRKH_INT_L_LV17",
"BRKH_INT_NR1BEG0_SLOW",
"BRKH_INT_LV12",
"BRKH_INT_NR1BEG0",
"BRKH_INT_SW6C0",
"BRKH_INT_NE2BEG2",
"BRKH_INT_SR1END3_SLOW",
"BRKH_INT_SS6END3",
"BRKH_INT_WW2END3",
"BRKH_INT_LVB7",
"BRKH_INT_NW6A3",
"BRKH_INT_NE6B3",
"BRKH_INT_LVB2",
"BRKH_INT_LVB_L5",
"BRKH_INT_SE6E1",
"BRKH_INT_SW6B3",
"BRKH_INT_NW6D2",
"BRKH_INT_WW4END_S0_0",
"BRKH_INT_SL1END0_SLOW",
"BRKH_INT_NL1BEG1",
"BRKH_INT_L_LV9",
"BRKH_INT_L_LV0",
"BRKH_INT_WL1BEG3",
"BRKH_INT_LVB12",
"BRKH_INT_LVB_L8",
"BRKH_INT_NE6A3",
"BRKH_INT_NE6C1",
"BRKH_INT_NN2BEG3",
"BRKH_INT_SW2A1",
"BRKH_INT_LVB_L6",
"BRKH_INT_NE6C3",
"BRKH_INT_SR1END1",
"BRKH_INT_SW6C1",
"BRKH_INT_LV0",
"BRKH_INT_L_LV2",
"BRKH_INT_NW6B2",
"BRKH_INT_SS6D0",
"BRKH_INT_SS6B3",
"BRKH_INT_NE2BEG3",
"BRKH_INT_LV7",
"BRKH_INT_SE6C3",
"BRKH_INT_NN6E3",
"BRKH_INT_NN6D0",
"BRKH_INT_NN6D1",
"BRKH_INT_SS6A2",
"BRKH_INT_LVB1",
"BRKH_INT_LV6",
"BRKH_INT_NN6END_S1_0",
"BRKH_INT_LVB8",
"BRKH_INT_NN6C2",
"BRKH_INT_NN6B1",
"BRKH_INT_LV15",
"BRKH_INT_NW6C0",
"BRKH_INT_LV11",
"BRKH_INT_LVB_L4",
"BRKH_INT_LV16",
"BRKH_INT_NN6C3",
"BRKH_INT_SS2END0",
"BRKH_INT_WR1END_S1_0",
"BRKH_INT_SS6A1",
"BRKH_INT_NE6C0",
"BRKH_INT_SW6D1",
"BRKH_INT_LV4",
"BRKH_INT_SR1END2",
"BRKH_INT_FAN_BOUNCE_S3_6",
"BRKH_INT_SS6END_N0_3",
"BRKH_INT_LV2",
"BRKH_INT_NR1BEG1_SLOW",
"BRKH_INT_SE6E3",
"BRKH_INT_NN2A1",
"BRKH_INT_NE6C2",
"BRKH_INT_NN6D3",
"BRKH_INT_WR1BEG_S0",
"BRKH_INT_LVB_L1",
"BRKH_INT_L_LV5",
"BRKH_INT_EL1END_S3_0",
"BRKH_INT_FAN_BOUNCE_S3_0",
"BRKH_INT_LVB4",
"BRKH_INT_L_LV8",
"BRKH_INT_SW2A2",
"BRKH_INT_NE6A0",
"BRKH_INT_BYP_BOUNCE3",
"BRKH_INT_SW6B2",
"BRKH_INT_NW6D3",
"BRKH_INT_LVB11",
"BRKH_INT_LVB_L9",
"BRKH_INT_SL1END0",
"BRKH_INT_NE6D3",
"BRKH_INT_NW6B1",
"BRKH_INT_L_LV13",
"BRKH_INT_L_LV7",
"BRKH_INT_NL1BEG0",
"BRKH_INT_NN6E2",
"BRKH_INT_L_LV12",
"BRKH_INT_BYP_BOUNCE7",
"BRKH_INT_SL1END1",
"BRKH_INT_SE6D2",
"BRKH_INT_NE6D0",
"BRKH_INT_L_LV4",
"BRKH_INT_WL1END3",
"BRKH_INT_FAN_BOUNCE_S3_2",
"BRKH_INT_NW6A1",
"BRKH_INT_LVB9",
"BRKH_INT_SL1END3",
"BRKH_INT_SE6C1",
"BRKH_INT_LVB_L3",
"BRKH_INT_NN6B2",
"BRKH_INT_SS2END1",
"BRKH_INT_NW6B3",
"BRKH_INT_SW6E0",
"BRKH_INT_SS2A0",
"BRKH_INT_LVB_L11",
"BRKH_INT_NW6C1",
"BRKH_INT_SW6END3",
"BRKH_INT_SS2A2",
"BRKH_INT_L_LV15",
"BRKH_INT_LVB_L12",
"BRKH_INT_L_LV11",
"BRKH_INT_NN2END_S2_0",
"BRKH_INT_SE2A3",
"BRKH_INT_SS6E1",
"BRKH_INT_SS6D1",
"BRKH_INT_SE6C0",
"BRKH_INT_SS6E0",
"BRKH_INT_NR1BEG3_SLOW",
"BRKH_INT_FAN_BOUNCE_S3_4",
"BRKH_INT_NN6E1",
"BRKH_INT_NN6D2",
"BRKH_INT_L_LV16",
"BRKH_INT_SW6D0",
"BRKH_INT_NN6B0",
"BRKH_INT_LVB6",
"BRKH_INT_NN6BEG2",
"BRKH_INT_LV14"
],
"sites": [],
"pips": {
"BRKH_INT.BRKH_INT_NL1BEG2->>BRKH_INT_NL1BEG2_SLOW": {
"can_invert": "0",
"dst_wire": "BRKH_INT_NL1BEG2_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NL1BEG2",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SL1END2_SLOW->>BRKH_INT_SL1END2": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SL1END2",
"is_directional": "1",
"src_wire": "BRKH_INT_SL1END2_SLOW",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_NL1BEG0->>BRKH_INT_NL1BEG0_SLOW": {
"can_invert": "0",
"dst_wire": "BRKH_INT_NL1BEG0_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NL1BEG0",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_NR1BEG2->>BRKH_INT_NR1BEG2_SLOW": {
"can_invert": "0",
"dst_wire": "BRKH_INT_NR1BEG2_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NR1BEG2",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_NL1BEG1->>BRKH_INT_NL1BEG1_SLOW": {
"can_invert": "0",
"dst_wire": "BRKH_INT_NL1BEG1_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NL1BEG1",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SR1END2_SLOW->>BRKH_INT_SR1END2": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SR1END2",
"is_directional": "1",
"src_wire": "BRKH_INT_SR1END2_SLOW",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_NR1BEG3->>BRKH_INT_NR1BEG3_SLOW": {
"can_invert": "0",
"dst_wire": "BRKH_INT_NR1BEG3_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NR1BEG3",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_NR1BEG0->>BRKH_INT_NR1BEG0_SLOW": {
"can_invert": "0",
"dst_wire": "BRKH_INT_NR1BEG0_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NR1BEG0",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SR1END3_SLOW->>BRKH_INT_SR1END3": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SR1END3",
"is_directional": "1",
"src_wire": "BRKH_INT_SR1END3_SLOW",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SR1END1_SLOW->>BRKH_INT_SR1END1": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SR1END1",
"is_directional": "1",
"src_wire": "BRKH_INT_SR1END1_SLOW",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_SL1END0_SLOW->>BRKH_INT_SL1END0": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SL1END0",
"is_directional": "1",
"src_wire": "BRKH_INT_SL1END0_SLOW",
"is_pseudo": "0"
},
"BRKH_INT.BRKH_INT_NR1BEG1->>BRKH_INT_NR1BEG1_SLOW": {
"can_invert": "0",
"dst_wire": "BRKH_INT_NR1BEG1_SLOW",
"is_directional": "1",
"src_wire": "BRKH_INT_NR1BEG1",
"is_pseudo": "0"
"is_pseudo": "0",
"dst_wire": "BRKH_INT_NL1BEG0_SLOW"
},
"BRKH_INT.BRKH_INT_SL1END3_SLOW->>BRKH_INT_SL1END3": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SL1END3",
"is_directional": "1",
"src_wire": "BRKH_INT_SL1END3_SLOW",
"is_pseudo": "0"
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SL1END3"
},
"BRKH_INT.BRKH_INT_SL1END2_SLOW->>BRKH_INT_SL1END2": {
"src_wire": "BRKH_INT_SL1END2_SLOW",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SL1END2"
},
"BRKH_INT.BRKH_INT_NR1BEG3->>BRKH_INT_NR1BEG3_SLOW": {
"src_wire": "BRKH_INT_NR1BEG3",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_NR1BEG3_SLOW"
},
"BRKH_INT.BRKH_INT_NR1BEG1->>BRKH_INT_NR1BEG1_SLOW": {
"src_wire": "BRKH_INT_NR1BEG1",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_NR1BEG1_SLOW"
},
"BRKH_INT.BRKH_INT_SL1END1_SLOW->>BRKH_INT_SL1END1": {
"can_invert": "0",
"dst_wire": "BRKH_INT_SL1END1",
"is_directional": "1",
"src_wire": "BRKH_INT_SL1END1_SLOW",
"is_pseudo": "0"
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SL1END1"
},
"BRKH_INT.BRKH_INT_NL1BEG1->>BRKH_INT_NL1BEG1_SLOW": {
"src_wire": "BRKH_INT_NL1BEG1",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_NL1BEG1_SLOW"
},
"BRKH_INT.BRKH_INT_SR1END1_SLOW->>BRKH_INT_SR1END1": {
"src_wire": "BRKH_INT_SR1END1_SLOW",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SR1END1"
},
"BRKH_INT.BRKH_INT_NL1BEG2->>BRKH_INT_NL1BEG2_SLOW": {
"src_wire": "BRKH_INT_NL1BEG2",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_NL1BEG2_SLOW"
},
"BRKH_INT.BRKH_INT_NR1BEG2->>BRKH_INT_NR1BEG2_SLOW": {
"src_wire": "BRKH_INT_NR1BEG2",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_NR1BEG2_SLOW"
},
"BRKH_INT.BRKH_INT_SR1END3_SLOW->>BRKH_INT_SR1END3": {
"src_wire": "BRKH_INT_SR1END3_SLOW",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SR1END3"
},
"BRKH_INT.BRKH_INT_SR1END2_SLOW->>BRKH_INT_SR1END2": {
"src_wire": "BRKH_INT_SR1END2_SLOW",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SR1END2"
},
"BRKH_INT.BRKH_INT_NR1BEG0->>BRKH_INT_NR1BEG0_SLOW": {
"src_wire": "BRKH_INT_NR1BEG0",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_NR1BEG0_SLOW"
},
"BRKH_INT.BRKH_INT_SL1END0_SLOW->>BRKH_INT_SL1END0": {
"src_wire": "BRKH_INT_SL1END0_SLOW",
"can_invert": "0",
"is_directional": "1",
"is_pseudo": "0",
"dst_wire": "BRKH_INT_SL1END0"
}
},
"tile_type": "BRKH_INT"
"wires": [
"BRKH_INT_SS6C0",
"BRKH_INT_SS6B2",
"BRKH_INT_SE6E1",
"BRKH_INT_NW2BEG1",
"BRKH_INT_NL1END_S3_0",
"BRKH_INT_NR1BEG0",
"BRKH_INT_NR1BEG3",
"BRKH_INT_LVB8",
"BRKH_INT_BYP_BOUNCE7",
"BRKH_INT_EL1END_S3_0",
"BRKH_INT_NE6D2",
"BRKH_INT_LVB_L10",
"BRKH_INT_NN6E1",
"BRKH_INT_LV8",
"BRKH_INT_L_LV15",
"BRKH_INT_LV15",
"BRKH_INT_NE6B1",
"BRKH_INT_SW6C3",
"BRKH_INT_NW6A0",
"BRKH_INT_NL1BEG1",
"BRKH_INT_NE2BEG2",
"BRKH_INT_NN6BEG0",
"BRKH_INT_LVB2",
"BRKH_INT_L_LV17",
"BRKH_INT_SS6END0",
"BRKH_INT_NN6C1",
"BRKH_INT_SS6C2",
"BRKH_INT_SS2END2",
"BRKH_INT_SR1END_N3_3",
"BRKH_INT_LVB10",
"BRKH_INT_L_LV8",
"BRKH_INT_LV14",
"BRKH_INT_NN6C0",
"BRKH_INT_LV10",
"BRKH_INT_NW6D3",
"BRKH_INT_NE6C1",
"BRKH_INT_NE6A2",
"BRKH_INT_LVB3",
"BRKH_INT_NN6D1",
"BRKH_INT_NN6B2",
"BRKH_INT_NW6C1",
"BRKH_INT_SE6D1",
"BRKH_INT_SL1END1",
"BRKH_INT_SR1END1_SLOW",
"BRKH_INT_LV3",
"BRKH_INT_SS2A0",
"BRKH_INT_SS6A1",
"BRKH_INT_SS6B0",
"BRKH_INT_NE6B2",
"BRKH_INT_L_LV14",
"BRKH_INT_LVB_L8",
"BRKH_INT_NN2A1",
"BRKH_INT_LVB12",
"BRKH_INT_L_LV6",
"BRKH_INT_NN6B0",
"BRKH_INT_LVB_L5",
"BRKH_INT_LVB11",
"BRKH_INT_LV7",
"BRKH_INT_SL1END0",
"BRKH_INT_SE6E0",
"BRKH_INT_NW6C3",
"BRKH_INT_NE2BEG1",
"BRKH_INT_NN2END_S2_0",
"BRKH_INT_LVB_L12",
"BRKH_INT_LV13",
"BRKH_INT_SS6B3",
"BRKH_INT_NN6A2",
"BRKH_INT_NR1BEG2",
"BRKH_INT_L_LV0",
"BRKH_INT_NW6B2",
"BRKH_INT_NL1BEG2",
"BRKH_INT_SS6A3",
"BRKH_INT_LV17",
"BRKH_INT_L_LV12",
"BRKH_INT_NE6B0",
"BRKH_INT_WW2END3",
"BRKH_INT_SR1END1",
"BRKH_INT_NW6A2",
"BRKH_INT_SW2A3",
"BRKH_INT_NN6A3",
"BRKH_INT_NW2BEG0",
"BRKH_INT_NN2BEG3",
"BRKH_INT_LV9",
"BRKH_INT_NN6E2",
"BRKH_INT_SE6D0",
"BRKH_INT_NW2BEG3",
"BRKH_INT_SS6E2",
"BRKH_INT_NN6E0",
"BRKH_INT_NL1BEG0",
"BRKH_INT_NE6D3",
"BRKH_INT_LV4",
"BRKH_INT_NE6D1",
"BRKH_INT_L_LV9",
"BRKH_INT_EL1BEG3",
"BRKH_INT_NN6END_S1_0",
"BRKH_INT_SE2A2",
"BRKH_INT_SW6D2",
"BRKH_INT_SW6C1",
"BRKH_INT_SW6D1",
"BRKH_INT_L_LV7",
"BRKH_INT_SS6END1",
"BRKH_INT_NR1BEG0_SLOW",
"BRKH_INT_L_LV4",
"BRKH_INT_SW6B1",
"BRKH_INT_LVB5",
"BRKH_INT_SL1END3_SLOW",
"BRKH_INT_LV16",
"BRKH_INT_SS6A0",
"BRKH_INT_NN6A1",
"BRKH_INT_SL1END1_SLOW",
"BRKH_INT_SE6C2",
"BRKH_INT_SS2END3",
"BRKH_INT_NN6BEG2",
"BRKH_INT_NW6B0",
"BRKH_INT_SS2A1",
"BRKH_INT_SS6END_N0_3",
"BRKH_INT_NE2BEG0",
"BRKH_INT_WL1END3",
"BRKH_INT_SS6D1",
"BRKH_INT_BYP_BOUNCE3",
"BRKH_INT_SS6A2",
"BRKH_INT_SR1END3_SLOW",
"BRKH_INT_SW2A1",
"BRKH_INT_NE6C2",
"BRKH_INT_SR1END2_SLOW",
"BRKH_INT_SS6END3",
"BRKH_INT_SS6D3",
"BRKH_INT_FAN_BOUNCE_S3_0",
"BRKH_INT_FAN_BOUNCE_S3_2",
"BRKH_INT_NN6D0",
"BRKH_INT_NW2END_S0_0",
"BRKH_INT_SS6B1",
"BRKH_INT_NN2A0",
"BRKH_INT_LVB_L11",
"BRKH_INT_SL1END0_SLOW",
"BRKH_INT_SS2END_N0_3",
"BRKH_INT_SS2END1",
"BRKH_INT_NW6B1",
"BRKH_INT_SE6C3",
"BRKH_INT_NW2BEG2",
"BRKH_INT_WW4END_S0_0",
"BRKH_INT_SE6B1",
"BRKH_INT_SE6B2",
"BRKH_INT_WR1END_S1_0",
"BRKH_INT_LVB6",
"BRKH_INT_LVB4",
"BRKH_INT_NN6B1",
"BRKH_INT_SR1END2",
"BRKH_INT_NE6A1",
"BRKH_INT_SE6B3",
"BRKH_INT_NN2A2",
"BRKH_INT_L_LV2",
"BRKH_INT_SW6B0",
"BRKH_INT_SE2A3",
"BRKH_INT_LVB7",
"BRKH_INT_SE6D2",
"BRKH_INT_NW6D0",
"BRKH_INT_NN2BEG2",
"BRKH_INT_NE6D0",
"BRKH_INT_NN6C3",
"BRKH_INT_SS6E3",
"BRKH_INT_SE6C1",
"BRKH_INT_SS6E1",
"BRKH_INT_NN2BEG1",
"BRKH_INT_ER1END3",
"BRKH_INT_NE2BEG3",
"BRKH_INT_SS6END2",
"BRKH_INT_L_LV5",
"BRKH_INT_SL1END2",
"BRKH_INT_SS2A2",
"BRKH_INT_L_LV13",
"BRKH_INT_SW2END3",
"BRKH_INT_LVB_L1",
"BRKH_INT_SE6E3",
"BRKH_INT_SW6C0",
"BRKH_INT_NR1BEG1",
"BRKH_INT_LV11",
"BRKH_INT_L_LV3",
"BRKH_INT_NL1BEG1_SLOW",
"BRKH_INT_NL1BEG0_SLOW",
"BRKH_INT_LVB_L2",
"BRKH_INT_SE6B0",
"BRKH_INT_SW6C2",
"BRKH_INT_NN6D3",
"BRKH_INT_NE6A0",
"BRKH_INT_L_LV1",
"BRKH_INT_NW6D2",
"BRKH_INT_SW2A2",
"BRKH_INT_NN6BEG1",
"BRKH_INT_SW6D0",
"BRKH_INT_LVB_L6",
"BRKH_INT_SW6E2",
"BRKH_INT_SR1END3",
"BRKH_INT_L_LV10",
"BRKH_INT_NW6D1",
"BRKH_INT_NW6A1",
"BRKH_INT_NR1BEG3_SLOW",
"BRKH_INT_SW6END3",
"BRKH_INT_NN2A3",
"BRKH_INT_NN6C2",
"BRKH_INT_L_LV16",
"BRKH_INT_NW6C0",
"BRKH_INT_LV5",
"BRKH_INT_LVB_L7",
"BRKH_INT_SS2END0",
"BRKH_INT_LV12",
"BRKH_INT_SL1END2_SLOW",
"BRKH_INT_SE6D3",
"BRKH_INT_BYP_BOUNCE6",
"BRKH_INT_SW6B2",
"BRKH_INT_BYP_BOUNCE2",
"BRKH_INT_LV0",
"BRKH_INT_NW6B3",
"BRKH_INT_SW6D3",
"BRKH_INT_NN6BEG3",
"BRKH_INT_NN2BEG0",
"BRKH_INT_LVB1",
"BRKH_INT_NW6A3",
"BRKH_INT_NE2END_S3_0",
"BRKH_INT_LV2",
"BRKH_INT_NE6C3",
"BRKH_INT_LVB_L4",
"BRKH_INT_WL1BEG3",
"BRKH_INT_NR1BEG1_SLOW",
"BRKH_INT_SE6E2",
"BRKH_INT_SS2A3",
"BRKH_INT_SW6B3",
"BRKH_INT_NE6C0",
"BRKH_INT_L_LV11",
"BRKH_INT_LVB_L3",
"BRKH_INT_LVB9",
"BRKH_INT_NW6C2",
"BRKH_INT_NE6B3",
"BRKH_INT_FAN_BOUNCE_S3_4",
"BRKH_INT_SS6C3",
"BRKH_INT_LV6",
"BRKH_INT_ER1BEG_S0",
"BRKH_INT_FAN_BOUNCE_S3_6",
"BRKH_INT_SS6D2",
"BRKH_INT_WR1BEG_S0",
"BRKH_INT_SE6C0",
"BRKH_INT_NR1BEG2_SLOW",
"BRKH_INT_LV1",
"BRKH_INT_SL1END3",
"BRKH_INT_SE2A1",
"BRKH_INT_SW2A0",
"BRKH_INT_SW6E1",
"BRKH_INT_NW6END_S0_0",
"BRKH_INT_SW6E0",
"BRKH_INT_NN6D2",
"BRKH_INT_SS6C1",
"BRKH_INT_LVB_L9",
"BRKH_INT_NN6A0",
"BRKH_INT_SE2A0",
"BRKH_INT_NL1BEG2_SLOW",
"BRKH_INT_SW6E3",
"BRKH_INT_SS6E0",
"BRKH_INT_NE6A3",
"BRKH_INT_NN6B3",
"BRKH_INT_NN6E3",
"BRKH_INT_SS6D0"
],
"tile_type": "BRKH_INT",
"sites": []
}

220
artix7/tile_type_BRKH_TERM_INT.json
View File

@ -1,124 +1,124 @@
{
"pips": {},
"wires": [
"T_TERM_UTURN_INT_LVB5",
"T_TERM_UTURN_INT_SE6C3",
"T_TERM_UTURN_INT_SW6D3",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_0",
"T_TERM_UTURN_INT_SE6E3",
"T_TERM_UTURN_INT_SS2A1",
"T_TERM_UTURN_INT_SW6C3",
"T_TERM_UTURN_INT_LV_L16",
"T_TERM_UTURN_INT_SS6B0",
"T_TERM_INT_UTURN_LV_R2",
"T_TERM_UTURN_INT_SS2A2",
"T_TERM_UTURN_INT_SW2A3",
"T_TERM_UTURN_INT_SS6END3",
"T_TERM_UTURN_INT_LVB1",
"T_TERM_INT_UTURN_LV_R5",
"T_TERM_UTURN_INT_SE6E1",
"T_TERM_INT_UTURN_LV_R17",
"T_TERM_UTURN_INT_SE6D3",
"T_TERM_UTURN_INT_SW6D1",
"T_TERM_UTURN_INT_SW2A1",
"T_TERM_UTURN_INT_SS6B2",
"T_TERM_UTURN_INT_LV_L4",
"T_TERM_UTURN_INT_SW6E3",
"T_TERM_UTURN_INT_SS6A3",
"T_TERM_UTURN_INT_LV_L17",
"T_TERM_UTURN_INT_SW2A0",
"T_TERM_UTURN_INT_LV_L6",
"T_TERM_INT_UTURN_LV_R9",
"T_TERM_UTURN_INT_SE2A3",
"T_TERM_UTURN_INT_SS6C0",
"T_TERM_UTURN_INT_SE6D0",
"T_TERM_UTURN_INT_SW6E1",
"T_TERM_UTURN_INT_LV_L2",
"T_TERM_UTURN_INT_SE2A0",
"T_TERM_UTURN_INT_SL1END2_SLOW",
"T_TERM_UTURN_INT_SW6D0",
"T_TERM_UTURN_INT_LVB0",
"T_TERM_UTURN_INT_SS6END1",
"T_TERM_UTURN_INT_SR1END3_SLOW",
"T_TERM_UTURN_INT_SW6C1",
"T_TERM_UTURN_INT_SS6E1",
"T_TERM_UTURN_INT_SW6B0",
"T_TERM_UTURN_INT_LVB2",
"T_TERM_UTURN_INT_SS2END0",
"T_TERM_UTURN_INT_SS6D3",
"T_TERM_UTURN_INT_SS6E2",
"T_TERM_INT_UTURN_LV_R4",
"T_TERM_INT_UTURN_LV_R6",
"T_TERM_UTURN_INT_SS6D1",
"T_TERM_UTURN_INT_SS6A0",
"T_TERM_UTURN_INT_SS2END1",
"T_TERM_UTURN_INT_SE6D1",
"T_TERM_UTURN_INT_SS6A1",
"T_TERM_UTURN_INT_LVB_L5",
"T_TERM_UTURN_INT_SW2A2",
"T_TERM_UTURN_INT_LVB_L2",
"T_TERM_UTURN_INT_LVB_L3",
"T_TERM_UTURN_INT_SS6C2",
"T_TERM_UTURN_INT_SS6D0",
"T_TERM_UTURN_INT_SS2A0",
"T_TERM_UTURN_INT_LV_L9",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_4",
"T_TERM_UTURN_INT_SS6B1",
"T_TERM_UTURN_INT_SW6E2",
"T_TERM_UTURN_INT_SW6B2",
"T_TERM_UTURN_INT_SE2A1",
"T_TERM_UTURN_INT_SR1END2_SLOW",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_6",
"T_TERM_UTURN_INT_SE6B2",
"T_TERM_UTURN_INT_SE6D2",
"T_TERM_UTURN_INT_SE6B3",
"T_TERM_UTURN_INT_LVB3",
"T_TERM_UTURN_INT_SL1END3_SLOW",
"T_TERM_UTURN_INT_WR1BEG_S0",
"T_TERM_UTURN_INT_LVB1",
"T_TERM_UTURN_INT_SE6B0",
"T_TERM_UTURN_INT_SL1END1_SLOW",
"T_TERM_UTURN_INT_WR1END_S1_0",
"T_TERM_UTURN_INT_SW6B1",
"T_TERM_INT_UTURN_LV_R6",
"T_TERM_UTURN_INT_SS2A3",
"T_TERM_UTURN_INT_SS6E3",
"T_TERM_UTURN_INT_SW6B0",
"T_TERM_UTURN_INT_SW6B3",
"T_TERM_INT_UTURN_LV_R16",
"T_TERM_INT_UTURN_LV_R2",
"T_TERM_UTURN_INT_SE6D2",
"T_TERM_UTURN_INT_SL1END3_SLOW",
"T_TERM_UTURN_INT_LV_L16",
"T_TERM_UTURN_INT_SE6C3",
"T_TERM_UTURN_INT_SE6B1",
"T_TERM_UTURN_INT_SE2A0",
"T_TERM_UTURN_INT_LV_L17",
"T_TERM_UTURN_INT_SS6END2",
"T_TERM_UTURN_INT_SW6D0",
"T_TERM_UTURN_INT_SS2END2",
"T_TERM_UTURN_INT_SW6E1",
"T_TERM_UTURN_INT_SS6D2",
"T_TERM_UTURN_INT_SR1END2_SLOW",
"T_TERM_UTURN_INT_SW6D2",
"T_TERM_UTURN_INT_SE6E2",
"T_TERM_UTURN_INT_LVB2",
"T_TERM_UTURN_INT_SE6C1",
"T_TERM_UTURN_INT_LVB_L0",
"T_TERM_UTURN_INT_SW6D3",
"T_TERM_UTURN_INT_LV_L7",
"T_TERM_UTURN_INT_LV_L3",
"T_TERM_UTURN_INT_SS6END2",
"T_TERM_UTURN_INT_SS6C2",
"T_TERM_UTURN_INT_SW2A2",
"T_TERM_UTURN_INT_LVB_L4",
"T_TERM_UTURN_INT_SE6C1",
"T_TERM_UTURN_INT_SS6C1",
"T_TERM_UTURN_INT_SW6E0",
"T_TERM_UTURN_INT_SL1END1_SLOW",
"T_TERM_UTURN_INT_SS6END0",
"T_TERM_UTURN_INT_SE6B1",
"T_TERM_UTURN_INT_SS6E0",
"T_TERM_UTURN_INT_LVB_L1",
"T_TERM_UTURN_INT_SS2END3",
"T_TERM_UTURN_INT_SS2END2",
"T_TERM_UTURN_INT_SS6A2",
"T_TERM_UTURN_INT_SR1END1_SLOW",
"T_TERM_UTURN_INT_LVB_L0",
"T_TERM_UTURN_INT_ER1END3",
"T_TERM_INT_UTURN_LV_R16",
"T_TERM_UTURN_INT_SE6C2",
"T_TERM_UTURN_INT_SE2A2",
"T_TERM_UTURN_INT_SS6C3",
"T_TERM_INT_UTURN_LV_R7",
"T_TERM_UTURN_INT_SE6E0",
"T_TERM_UTURN_INT_SE6E2",
"T_TERM_UTURN_INT_SW6B3",
"T_TERM_UTURN_INT_LVB4",
"T_TERM_UTURN_INT_SL1END0_SLOW",
"T_TERM_UTURN_INT_SS6D2",
"T_TERM_INT_UTURN_LV_R9",
"T_TERM_UTURN_INT_SW6C2",
"T_TERM_UTURN_INT_SS6E3",
"T_TERM_UTURN_INT_WR1END_S1_0",
"T_TERM_UTURN_INT_SE6B0",
"T_TERM_UTURN_INT_SS6B3",
"T_TERM_UTURN_INT_SW6C0",
"T_TERM_UTURN_INT_LV_L5",
"T_TERM_UTURN_INT_SE6C0",
"T_TERM_UTURN_INT_SS2A3",
"T_TERM_UTURN_INT_SW6D2",
"T_TERM_UTURN_INT_WR1BEG_S0",
"T_TERM_UTURN_INT_SS6C0",
"T_TERM_UTURN_INT_SS6D1",
"T_TERM_UTURN_INT_SE6D0",
"T_TERM_UTURN_INT_SS2A0",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_2",
"T_TERM_UTURN_INT_SS6E1",
"T_TERM_UTURN_INT_SS6A2",
"T_TERM_UTURN_INT_SW6E3",
"T_TERM_UTURN_INT_SE6C2",
"T_TERM_UTURN_INT_SW6B2",
"T_TERM_UTURN_INT_SS6B0",
"T_TERM_UTURN_INT_SS6C1",
"T_TERM_UTURN_INT_SS6A0",
"T_TERM_UTURN_INT_LVB_L2",
"T_TERM_INT_UTURN_LV_R5",
"T_TERM_UTURN_INT_SE6E3",
"T_TERM_UTURN_INT_SE2A2",
"T_TERM_UTURN_INT_LV_L6",
"T_TERM_UTURN_INT_SS2A1",
"T_TERM_UTURN_INT_SR1END3_SLOW",
"T_TERM_UTURN_INT_LVB_L5",
"T_TERM_UTURN_INT_SE2A3",
"T_TERM_UTURN_INT_SL1END2_SLOW",
"T_TERM_UTURN_INT_SS2END0",
"T_TERM_UTURN_INT_ER1END3",
"T_TERM_UTURN_INT_SS2A2",
"T_TERM_UTURN_INT_LV_L4",
"T_TERM_UTURN_INT_SW6C1",
"T_TERM_INT_UTURN_LV_R7",
"T_TERM_UTURN_INT_SW6C3",
"T_TERM_UTURN_INT_SW2A1",
"T_TERM_UTURN_INT_SS2END3",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_4",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_6",
"T_TERM_UTURN_INT_SS6C3",
"T_TERM_UTURN_INT_LVB_L3",
"T_TERM_UTURN_INT_SW6E0",
"T_TERM_UTURN_INT_SW2A0",
"T_TERM_INT_UTURN_LV_R3",
"T_TERM_UTURN_INT_SE6C0",
"T_TERM_UTURN_INT_SS2END1",
"T_TERM_INT_UTURN_LV_R4",
"T_TERM_UTURN_INT_SE6B2",
"T_TERM_UTURN_INT_SL1END0_SLOW",
"T_TERM_UTURN_INT_LVB4",
"T_TERM_UTURN_INT_LV_L2",
"T_TERM_UTURN_INT_SW6C0",
"T_TERM_UTURN_INT_LVB_L1",
"T_TERM_UTURN_INT_SS6E2",
"T_TERM_UTURN_INT_SS6B2",
"T_TERM_UTURN_INT_SW2A3",
"T_TERM_UTURN_INT_SE6D3",
"T_TERM_UTURN_INT_SS6D3",
"T_TERM_UTURN_INT_SR1END1_SLOW",
"T_TERM_UTURN_INT_LVB3",
"T_TERM_UTURN_INT_SE6E0",
"T_TERM_UTURN_INT_SS6A3",
"T_TERM_UTURN_INT_LVB5",
"T_TERM_UTURN_INT_LV_L9",
"T_TERM_UTURN_INT_SS6B1",
"T_TERM_UTURN_INT_SS6E0",
"T_TERM_UTURN_INT_SS6D0",
"T_TERM_UTURN_INT_SW6D1",
"T_TERM_UTURN_INT_SE6B3",
"T_TERM_UTURN_INT_SS6END1",
"T_TERM_UTURN_INT_LV_L5",
"T_TERM_UTURN_INT_LVB0",
"T_TERM_UTURN_INT_SE6E1",
"T_TERM_UTURN_INT_FAN_BOUNCE_S3_0",
"T_TERM_UTURN_INT_SE2A1",
"T_TERM_UTURN_INT_SS6B3",
"T_TERM_INT_UTURN_LV_R17",
"T_TERM_UTURN_INT_SS6END3",
"T_TERM_UTURN_INT_SS6A1",
"T_TERM_UTURN_INT_SW6E2",
"T_TERM_UTURN_INT_ER1BEG_S0"
],
"sites": [],
"pips": {},
"tile_type": "BRKH_TERM_INT"
"tile_type": "BRKH_TERM_INT",
"sites": []
}

226
artix7/tile_type_B_TERM_INT.json
View File

@ -1,125 +1,125 @@
{
"pips": {},
"wires": [
"B_TERM_UTURN_INT_WR1BEG0",
"B_TERM_UTURN_INT_ER1END_N3_3",
"B_TERM_UTURN_INT_LV_L6",
"B_TERM_UTURN_INT_LVB4",
"B_TERM_UTURN_INT_SW6A2",
"B_TERM_UTURN_INT_SW6C0",
"B_TERM_UTURN_INT_LVB_L0",
"B_TERM_UTURN_INT_LVB5",
"B_TERM_UTURN_INT_SE6D3",
"B_TERM_UTURN_INT_LV4",
"B_TERM_UTURN_INT_SS2A1",
"B_TERM_UTURN_INT_LV3",
"B_TERM_UTURN_INT_SS6D3",
"B_TERM_UTURN_INT_SS2BEG3",
"B_TERM_UTURN_INT_SS6B1",
"B_TERM_UTURN_INT_SE2BEG0",
"B_TERM_UTURN_INT_LV_L5",
"B_TERM_UTURN_INT_SE6D1",
"B_TERM_UTURN_INT_LV2",
"B_TERM_UTURN_INT_LV_L3",
"B_TERM_UTURN_INT_LVB_L2",
"B_TERM_UTURN_INT_SS6BEG3",
"B_TERM_UTURN_INT_LVB1",
"B_TERM_UTURN_INT_SL1BEG2",
"B_TERM_UTURN_INT_SL1BEG1",
"B_TERM_UTURN_INT_SS6BEG1",
"B_TERM_UTURN_INT_LVB2",
"B_TERM_UTURN_INT_SE6A2",
"B_TERM_UTURN_INT_SS6D3",
"B_TERM_UTURN_INT_SS6BEG0",
"B_TERM_UTURN_INT_LV9",
"B_TERM_UTURN_INT_SE2BEG2",
"B_TERM_UTURN_INT_LV_L2",
"B_TERM_UTURN_INT_SE6B2",
"B_TERM_UTURN_INT_LVB_L3",
"B_TERM_UTURN_INT_LV7",
"B_TERM_UTURN_INT_SS6D2",
"B_TERM_UTURN_INT_LVB_L4",
"B_TERM_UTURN_INT_SW6C2",
"B_TERM_UTURN_INT_SS6B3",
"B_TERM_UTURN_INT_SS2A1",
"B_TERM_UTURN_INT_SE2BEG1",
"B_TERM_UTURN_INT_SS6A2",
"B_TERM_UTURN_INT_SE6A0",
"B_TERM_UTURN_INT_LV6",
"B_TERM_UTURN_INT_LV_L6",
"B_TERM_UTURN_INT_SS2A2",
"B_TERM_UTURN_INT_WR1BEG0",
"B_TERM_UTURN_INT_SE6B0",
"B_TERM_UTURN_INT_SL1BEG0",
"B_TERM_UTURN_INT_SW6A3",
"B_TERM_UTURN_INT_LVB0",
"B_TERM_UTURN_INT_LVB_L1",
"B_TERM_UTURN_INT_SE6C0",
"B_TERM_UTURN_INT_LV_L9",
"B_TERM_UTURN_INT_SW6B2",
"B_TERM_UTURN_INT_LVB3",
"B_TERM_UTURN_INT_SW2BEG0",
"B_TERM_UTURN_INT_SW6A1",
"B_TERM_UTURN_INT_SE6D2",
"B_TERM_UTURN_INT_LV_L3",
"B_TERM_UTURN_INT_SR1BEG3",
"B_TERM_UTURN_INT_FAN_BOUNCE6",
"B_TERM_UTURN_INT_SW6END_N0_3",
"B_TERM_UTURN_INT_SE6B1",
"B_TERM_UTURN_INT_LV5",
"B_TERM_UTURN_INT_SR1BEG2",
"B_TERM_UTURN_INT_FAN_BOUNCE2",
"B_TERM_UTURN_INT_SW6A2",
"B_TERM_UTURN_INT_SS2BEG2",
"B_TERM_UTURN_INT_SS6D0",
"B_TERM_UTURN_INT_SE6A1",
"B_TERM_UTURN_INT_SS6A0",
"B_TERM_UTURN_INT_SS2BEG1",
"B_TERM_UTURN_INT_SE6C3",
"B_TERM_UTURN_INT_SS6C2",
"B_TERM_UTURN_INT_FAN_BOUNCE4",
"B_TERM_UTURN_INT_SS6A3",
"B_TERM_UTURN_INT_SW6D2",
"B_TERM_UTURN_INT_SS6E3",
"B_TERM_UTURN_INT_SW2BEG2",
"B_TERM_UTURN_INT_LV_L8",
"B_TERM_UTURN_INT_SW6B3",
"B_TERM_UTURN_INT_SW6B1",
"B_TERM_UTURN_INT_SW2BEG1",
"B_TERM_UTURN_INT_LVB4",
"B_TERM_UTURN_INT_SS2BEG0",
"B_TERM_UTURN_INT_SR1BEG1",
"B_TERM_UTURN_INT_SE6C2",
"B_TERM_UTURN_INT_SW2BEG3",
"B_TERM_UTURN_INT_WR1END0",
"B_TERM_UTURN_INT_LV_L7",
"B_TERM_UTURN_INT_SW6D1",
"B_TERM_UTURN_INT_LVB_L5",
"B_TERM_UTURN_INT_SE6C1",
"B_TERM_UTURN_INT_LV18",
"B_TERM_UTURN_INT_SW6D3",
"B_TERM_UTURN_INT_SL1BEG3",
"B_TERM_UTURN_INT_SS6E1",
"B_TERM_UTURN_INT_SW6C3",
"B_TERM_UTURN_INT_SS2A3",
"B_TERM_UTURN_INT_SS6E0",
"B_TERM_UTURN_INT_ER1BEG0",
"B_TERM_UTURN_INT_ER1END_N3_3",
"B_TERM_UTURN_INT_SE6B3",
"B_TERM_UTURN_INT_SS6B2",
"B_TERM_UTURN_INT_SW6B0",
"B_TERM_UTURN_INT_SW6A0",
"B_TERM_UTURN_INT_LV3",
"B_TERM_UTURN_INT_SS6C3",
"B_TERM_UTURN_INT_LV8",
"B_TERM_UTURN_INT_SE6A3",
"B_TERM_UTURN_INT_SS6C1",
"B_TERM_UTURN_INT_SS6B0",
"B_TERM_UTURN_INT_SS6C0",
"B_TERM_UTURN_INT_SW6C1",
"B_TERM_UTURN_INT_SS6D1",
"B_TERM_UTURN_INT_LV_L4",
"B_TERM_UTURN_INT_SS6C1",
"B_TERM_UTURN_INT_SW6B3",
"B_TERM_UTURN_INT_SS6A3",
"B_TERM_UTURN_INT_ER1BEG0",
"B_TERM_UTURN_INT_SW6D2",
"B_TERM_UTURN_INT_LVB_L5",
"B_TERM_UTURN_INT_SW6D3",
"B_TERM_UTURN_INT_SL1BEG1",
"B_TERM_UTURN_INT_SE6D0",
"B_TERM_UTURN_INT_SE2BEG2",
"B_TERM_UTURN_INT_SS6B0",
"B_TERM_UTURN_INT_SW6A3",
"B_TERM_UTURN_INT_LVB5",
"B_TERM_UTURN_INT_SS6C3",
"B_TERM_UTURN_INT_LV_L5",
"B_TERM_UTURN_INT_SE6A1",
"B_TERM_UTURN_INT_LV_L18",
"B_TERM_UTURN_INT_SS6A0",
"B_TERM_UTURN_INT_SS6C0",
"B_TERM_UTURN_INT_SW6C0",
"B_TERM_UTURN_INT_SS6B1",
"B_TERM_UTURN_INT_SW6B1",
"B_TERM_UTURN_INT_SW6D1",
"B_TERM_UTURN_INT_SS6E0",
"B_TERM_UTURN_INT_LVB3",
"B_TERM_UTURN_INT_SS6BEG0",
"B_TERM_UTURN_INT_SW6A1",
"B_TERM_UTURN_INT_FAN_BOUNCE0",
"B_TERM_UTURN_INT_SS2A0",
"B_TERM_UTURN_INT_LV_L8",
"B_TERM_UTURN_INT_SW6C3",
"B_TERM_UTURN_INT_SW2BEG0",
"B_TERM_UTURN_INT_SS2BEG3",
"B_TERM_UTURN_INT_SE6D2",
"B_TERM_UTURN_INT_SE6B1",
"B_TERM_UTURN_INT_FAN_BOUNCE4",
"B_TERM_UTURN_INT_SE2BEG0",
"B_TERM_UTURN_INT_SS6C2",
"B_TERM_UTURN_INT_FAN_BOUNCE2",
"B_TERM_UTURN_INT_SW6B2",
"B_TERM_UTURN_INT_WR1END0",
"B_TERM_UTURN_INT_SS6B2",
"B_TERM_UTURN_INT_SE6C0",
"B_TERM_UTURN_INT_SE6B3",
"B_TERM_UTURN_INT_SE6A0",
"B_TERM_UTURN_INT_SW2BEG3",
"B_TERM_UTURN_INT_LV8",
"B_TERM_UTURN_INT_SS6BEG2",
"B_TERM_UTURN_INT_SW2BEG1",
"B_TERM_UTURN_INT_SS6E3",
"B_TERM_UTURN_INT_SS6E1",
"B_TERM_UTURN_INT_SL1BEG2",
"B_TERM_UTURN_INT_SS6BEG3",
"B_TERM_UTURN_INT_SS6BEG1",
"B_TERM_UTURN_INT_SE2BEG1",
"B_TERM_UTURN_INT_SS2A2",
"B_TERM_UTURN_INT_SS6E2",
"B_TERM_UTURN_INT_LV_L9",
"B_TERM_UTURN_INT_SW6A0",
"B_TERM_UTURN_INT_SW6END_N0_3",
"B_TERM_UTURN_INT_SE6A3",
"B_TERM_UTURN_INT_SE6B2",
"B_TERM_UTURN_INT_SE6D1",
"B_TERM_UTURN_INT_SW6B0",
"B_TERM_UTURN_INT_SR1BEG2",
"B_TERM_UTURN_INT_SE6A2",
"B_TERM_UTURN_INT_LV7",
"B_TERM_UTURN_INT_SW6C2",
"B_TERM_UTURN_INT_SS2BEG1",
"B_TERM_UTURN_INT_LVB_L4",
"B_TERM_UTURN_INT_FAN_BOUNCE6",
"B_TERM_UTURN_INT_LVB_L3",
"B_TERM_UTURN_INT_SE6D3",
"B_TERM_UTURN_INT_LV9",
"B_TERM_UTURN_INT_LV_L7",
"B_TERM_UTURN_INT_SE6C3",
"B_TERM_UTURN_INT_SW6C1",
"B_TERM_UTURN_INT_SE2BEG3",
"B_TERM_UTURN_INT_SS6A1",
"B_TERM_UTURN_INT_LV_L2",
"B_TERM_UTURN_INT_LVB_L0",
"B_TERM_UTURN_INT_SS2BEG2",
"B_TERM_UTURN_INT_SR1BEG1",
"B_TERM_UTURN_INT_LVB1",
"B_TERM_UTURN_INT_LVB_L1",
"B_TERM_UTURN_INT_SE6B0",
"B_TERM_UTURN_INT_SS6D0",
"B_TERM_UTURN_INT_LVB2",
"B_TERM_UTURN_INT_SS2BEG0",
"B_TERM_UTURN_INT_LVB0",
"B_TERM_UTURN_INT_SS6D2",
"B_TERM_UTURN_INT_SE6C1",
"B_TERM_UTURN_INT_SS6BEG2",
"B_TERM_UTURN_INT_SS6E2",
"B_TERM_UTURN_INT_SW6D0",
"B_TERM_UTURN_INT_SL1BEG0",
"B_TERM_UTURN_INT_LV18",
"B_TERM_UTURN_INT_LV6",
"B_TERM_UTURN_INT_LV5",
"B_TERM_UTURN_INT_SR1BEG3",
"B_TERM_UTURN_INT_LVB_L2",
"B_TERM_UTURN_INT_SL1BEG3",
"B_TERM_UTURN_INT_SW2BEG2",
"B_TERM_UTURN_INT_SS6A2",
"B_TERM_UTURN_INT_SS2A3",
"B_TERM_UTURN_INT_SE6C2"
"B_TERM_UTURN_INT_SE6D0",
"B_TERM_UTURN_INT_LV_L18",
"B_TERM_UTURN_INT_FAN_BOUNCE0",
"B_TERM_UTURN_INT_SE2BEG3"
],
"sites": [],
"pips": {},
"tile_type": "B_TERM_INT"
"tile_type": "B_TERM_INT",
"sites": []
}

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artix7/tile_type_CFG_CENTER_BOT.json
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artix7/tile_type_CFG_CENTER_MID.json
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artix7/tile_type_CFG_CENTER_TOP.json
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artix7/tile_type_CLBLL_L.json
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artix7/tile_type_CLBLL_R.json
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artix7/tile_type_CLBLM_L.json
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artix7/tile_type_CLBLM_R.json
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artix7/tile_type_CLK_BUFG_BOT_R.json
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artix7/tile_type_CLK_BUFG_REBUF.json
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artix7/tile_type_CLK_BUFG_TOP_R.json
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artix7/tile_type_CLK_FEED.json
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@ -1,261 +1,261 @@
{
"pips": {},
"wires": [
"CLK_FEED_EE4B2",
"CLK_FEED_EE4B3",
"CLK_FEED_WR1END0",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_R_CK_GCLK15",
"CLK_FEED_EE4BEG0",
"CLK_FEED_WW2A2",
"CLK_FEED_WW2END3",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_WW4C1",
"CLK_FEED_NW4A0",
"CLK_FEED_LH6",
"CLK_FEED_EL1BEG0",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_WR1END1",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_EE4A1",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_EL1BEG1",
"CLK_FEED_WW4END1",
"CLK_FEED_R_CK_GCLK23",
"CLK_FEED_R_CK_GCLK28",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_EL1BEG2",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_EE2A0",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_LH8",
"CLK_FEED_SW4A0",
"CLK_FEED_NE4C3",
"CLK_FEED_SE2A1",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4C0",
"CLK_FEED_EE2A2",
"CLK_FEED_NE4BEG3",
"CLK_FEED_WW4END2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_NE4BEG2",
"CLK_FEED_WR1END3",
"CLK_FEED_EL1BEG3",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_FEED_SW2A2",
"CLK_FEED_LH9",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_R_CK_GCLK20",
"CLK_FEED_WW4A2",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_NW4END2",
"CLK_FEED_SE2A0",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_WW2A0",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_LH3",
"CLK_FEED_MONITOR_N",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_NW4END0",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_EE4B0",
"CLK_FEED_LH11",
"CLK_FEED_NW2A0",
"CLK_FEED_SW4A2",
"CLK_FEED_NW4A2",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_WW4END0",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_WW2END2",
"CLK_FEED_NE2A0",
"CLK_FEED_EE2A1",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_EE4A3",
"CLK_FEED_LH12",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_EE2BEG3",
"CLK_FEED_SE4BEG2",
"CLK_FEED_LH7",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_NW4END3",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_FEED_EE4C0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_FEED_SE4BEG3",
"CLK_FEED_SW4END2",
"CLK_FEED_SW4END3",
"CLK_FEED_R_CK_GCLK2",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_EE2BEG2",
"CLK_FEED_EE4BEG1",
"CLK_FEED_LH2",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_SW4END1",
"CLK_FEED_WW2A3",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_SE4C1",
"CLK_FEED_SW2A0",
"CLK_FEED_EE2A3",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_SW4END0",
"CLK_FEED_EE4C2",
"CLK_FEED_LH10",
"CLK_FEED_NE4C1",
"CLK_FEED_ER1BEG0",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_SE4BEG1",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH1",
"CLK_FEED_WL1END0",
"CLK_FEED_SW4A3",
"CLK_FEED_CK_GCLK13",
"CLK_FEED_CK_GCLK11",
"CLK_FEED_LH4",
"CLK_FEED_NE4C0",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_NE2A2",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK30",
"CLK_FEED_WW4B0",
"CLK_FEED_WW4C3",
"CLK_FEED_EE4C1",
"CLK_FEED_WW4C2",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_ER1BEG2",
"CLK_FEED_WL1END3",
"CLK_FEED_SE2A3",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_EE4BEG2",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_WW4B2",
"CLK_FEED_SE4C2",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_ER1BEG1",
"CLK_FEED_SE4C3",
"CLK_FEED_EE4B2",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_WW2A0",
"CLK_FEED_EE4A2",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_EE4BEG1",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_WW4C0",
"CLK_FEED_EE4BEG2",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_FEED_NW2A1",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_NW2A2",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_SW4END1",
"CLK_FEED_LH12",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_FEED_WW4END3",
"CLK_FEED_SE4C1",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_EE4C3",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_FEED_WW2END0",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4BEG3",
"CLK_FEED_WW4A2",
"CLK_FEED_SE4BEG1",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_WW2A2",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_EE4BEG0",
"CLK_FEED_CK_GCLK11",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_FEED_LH10",
"CLK_FEED_SE4C0",
"CLK_FEED_LH3",
"CLK_FEED_WW2A3",
"CLK_FEED_NW4A1",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_LH5",
"CLK_FEED_NW4A2",
"CLK_FEED_WW4END1",
"CLK_FEED_EE2BEG2",
"CLK_FEED_WL1END0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_WL1END1",
"CLK_FEED_SW2A1",
"CLK_FEED_EE2BEG0",
"CLK_FEED_MONITOR_P",
"CLK_FEED_NE2A3",
"CLK_FEED_R_CK_GCLK26",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_LH5",
"CLK_FEED_EE4C3",
"CLK_FEED_WR1END2",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_CK_GCLK22",
"CLK_FEED_SW4A1",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WW4C0",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_SW2A3",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_R_CK_GCLK10",
"CLK_FEED_WW4A3",
"CLK_FEED_WW2END1",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_WW2A1",
"CLK_FEED_WW4B3",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_NW4A3",
"CLK_FEED_NW4END1",
"CLK_FEED_NW4A1",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_EE4A0",
"CLK_FEED_WL1END1",
"CLK_FEED_EE4A1",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_EE2BEG1",
"CLK_FEED_WW2END0",
"CLK_FEED_SW4END0",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_SE4BEG2",
"CLK_FEED_NE2A3",
"CLK_FEED_LH8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_FEED_WR1END1",
"CLK_FEED_NE4BEG2",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_WW4END2",
"CLK_FEED_SW4A3",
"CLK_FEED_LH11",
"CLK_FEED_EE4C1",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_NE4C0",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_SE4C2",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_FEED_ER1BEG1",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_MONITOR_P",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_WW4C3",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_WW2END2",
"CLK_FEED_SE2A1",
"CLK_FEED_WW4A3",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_EL1BEG1",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_EE2BEG3",
"CLK_FEED_LH7",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_SW4A0",
"CLK_FEED_LH9",
"CLK_FEED_SW4A2",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK28",
"CLK_FEED_MONITOR_N",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_EE4B3",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_SW4END2",
"CLK_FEED_EE2A1",
"CLK_FEED_SE2A3",
"CLK_FEED_SW2A0",
"CLK_FEED_NE2A2",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4C2",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_R_CK_GCLK23",
"CLK_FEED_NW2A1",
"CLK_FEED_EE4B0",
"CLK_FEED_NE4C2",
"CLK_FEED_R_CK_GCLK15",
"CLK_FEED_WW4B0",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_R_CK_GCLK20",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_WW2END1",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_NW2A3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_WR1END0",
"CLK_FEED_EE4A3",
"CLK_FEED_R_CK_GCLK10",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_NW2A2",
"CLK_FEED_LH4",
"CLK_FEED_EE2A0",
"CLK_FEED_ER1BEG2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WR1END3",
"CLK_FEED_LH1",
"CLK_FEED_EE2A3",
"CLK_FEED_NW4A3",
"CLK_FEED_WW2END3",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_SE4C3",
"CLK_FEED_NW4END2",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_EE4C0",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_WL1END3",
"CLK_FEED_NW2A0",
"CLK_FEED_NW4A0",
"CLK_FEED_ER1BEG0",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_LH2",
"CLK_FEED_SW2A2",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_LH6",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_R_CK_GCLK2",
"CLK_FEED_NW4END3",
"CLK_FEED_NE4C1",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_WW2A1",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_SE4BEG0",
"CLK_FEED_NW4END1",
"CLK_FEED_WL1END2",
"CLK_FEED_NW4END0",
"CLK_FEED_SE2A0",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_FEED_WR1END2",
"CLK_FEED_SW4END3",
"CLK_FEED_WW4END0",
"CLK_FEED_EE4B1",
"CLK_FEED_SW4A1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_NE4C3",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_EE2A2",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_FEED_SE4BEG0"
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_NE2A0",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_SW2A3",
"CLK_FEED_EE4A0",
"CLK_FEED_CK_GCLK30",
"CLK_FEED_EL1BEG3",
"CLK_FEED_WW4C1",
"CLK_FEED_R_CK_GCLK26",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_EL1BEG0",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_EE4C2",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_WW4B3",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_EL1BEG2",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_WW4B1"
],
"sites": [],
"pips": {},
"tile_type": "CLK_FEED"
"tile_type": "CLK_FEED",
"sites": []
}

44346
artix7/tile_type_CLK_HROW_BOT_R.json
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44534
artix7/tile_type_CLK_HROW_TOP_R.json
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File diff suppressed because it is too large Load Diff

724
artix7/tile_type_CLK_MTBF2.json
View File

@ -1,365 +1,365 @@
{
"wires": [
"CLK_FEED_EE4B2",
"CLK_FEED_EE4B3",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX44_0",
"CLK_PMV_BYP2_0",
"CLK_MTBF2_Q3B",
"CLK_FEED_R_CK_GCLK12",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK12",
"CLK_MTBF2_Q4B",
"CLK_PMV_BYP5_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_PMV_IMUX27_0",
"CLK_FEED_EE4BEG0",
"CLK_FEED_WW2A2",
"CLK_FEED_WW2END3",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4C1",
"CLK_FEED_LH6",
"CLK_MTBF2_RESET",
"CLK_FEED_EL1BEG0",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_WR1END1",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_EE4A1",
"CLK_FEED_WW4END1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_PMV_IMUX7_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_EL1BEG2",
"CLK_MTBF2_Q1B",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_R_CK_GCLK4",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_PMV_IMUX14_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_GCLK0",
"CLK_PMV_IMUX35_0",
"CLK_FEED_EE2A0",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_LH8",
"CLK_FEED_SW4A0",
"CLK_FEED_NE4C3",
"CLK_FEED_SE2A1",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4C0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_WW4END2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_PMV_CLK1_0",
"CLK_FEED_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_MTBF2_CLK",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_PMV_IMUX34_0",
"CLK_FEED_NE4BEG2",
"CLK_FEED_EL1BEG3",
"CLK_FEED_WR1END3",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_SW2A2",
"CLK_FEED_LH9",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_IMUX40_0",
"CLK_FEED_WW4A2",
"CLK_PMV_IMUX24_0",
"CLK_FEED_R_CK_GCLK5",
"CLK_PMV_IMUX3_0",
"CLK_PMV_IMUX42_0",
"CLK_PMV_IMUX5_0",
"CLK_FEED_SE2A0",
"CLK_FEED_NW4END2",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_PMV_CLK0_0",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_WW2A0",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_LH3",
"CLK_FEED_MONITOR_N",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_NW4END0",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_EE4B0",
"CLK_FEED_LH11",
"CLK_PMV_FAN4_0",
"CLK_FEED_NW2A0",
"CLK_FEED_SW4A2",
"CLK_MTBF2_DIN",
"CLK_FEED_NW4A2",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_WW4END0",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_WW2END2",
"CLK_FEED_EE2A1",
"CLK_FEED_NE2A0",
"CLK_MTBF2_Q0B",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_EE4A3",
"CLK_FEED_LH12",
"CLK_MTBF2_EN",
"CLK_FEED_EE2BEG3",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG2",
"CLK_FEED_LH7",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_NW4END3",
"CLK_PMV_FAN0_0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_IMUX15_0",
"CLK_MTBF2_Q5B",
"CLK_FEED_EE4C0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_FEED_SE4BEG3",
"CLK_FEED_SW4END2",
"CLK_FEED_SW4END3",
"CLK_PMV_IMUX13_0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_BYP0_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_EE2BEG2",
"CLK_PMV_IMUX29_0",
"CLK_FEED_EE4BEG1",
"CLK_PMV_IMUX10_0",
"CLK_PMV_IMUX1_0",
"CLK_FEED_LH2",
"CLK_PMV_FAN3_0",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_MTBF2_Q6B",
"CLK_PMV_IMUX39_0",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_SW4END1",
"CLK_FEED_WW2A3",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_SE4C1",
"CLK_FEED_SW2A0",
"CLK_FEED_EE2A3",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK5",
"CLK_PMV_IMUX38_0",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_IMUX22_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX0_0",
"CLK_PMV_FAN7_0",
"CLK_FEED_EE4C2",
"CLK_FEED_LH10",
"CLK_PMV_IMUX28_0",
"CLK_FEED_NE4C1",
"CLK_FEED_ER1BEG0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_IMUX16_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_SE4BEG1",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH1",
"CLK_FEED_WL1END0",
"CLK_FEED_SW4A3",
"CLK_MTBF2_Q7B",
"CLK_PMV_IMUX6_0",
"CLK_FEED_CK_GCLK13",
"CLK_PMV_IMUX33_0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_LH4",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_NE4C0",
"CLK_FEED_NE2A2",
"CLK_PMV_IMUX9_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_BYP3_0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW4B0",
"CLK_FEED_WW4C3",
"CLK_FEED_EE4C1",
"CLK_FEED_WW4C2",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_ER1BEG2",
"CLK_FEED_WL1END3",
"CLK_FEED_SE2A3",
"CLK_PMV_FAN1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_EE4BEG2",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_IMUX8_0",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_WW4B2",
"CLK_PMV_IMUX26_0",
"CLK_FEED_SE4C2",
"CLK_FEED_CK_GCLK10",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_PMV_BYP1_0",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_ER1BEG1",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_SE4C3",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_NW2A1",
"CLK_PMV_IMUX21_0",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX12_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_CK_GCLK14",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_SW2A1",
"CLK_PMV_IMUX4_0",
"CLK_FEED_EE2BEG0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_MONITOR_P",
"CLK_FEED_NE2A3",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_R_CK_GCLK26",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_LH5",
"CLK_FEED_EE4C3",
"CLK_FEED_WR1END2",
"CLK_PMV_BYP7_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_CK_GCLK22",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_SW4A1",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX18_0",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_WL1END2",
"CLK_MTBF2_Q2B",
"CLK_FEED_CK_GCLK2",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_WW4C0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_SW2A3",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_IMUX25_0",
"CLK_FEED_WW4A3",
"CLK_FEED_WW2END1",
"CLK_PMV_IMUX23_0",
"CLK_FEED_CK_GCLK20",
"CLK_PMV_IMUX32_0",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_WW2A1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4B3",
"CLK_FEED_NW4A3",
"CLK_FEED_NW4A1",
"CLK_FEED_NW4END1",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_EE4A0",
"CLK_FEED_WL1END1",
"CLK_FEED_EE2BEG1",
"CLK_FEED_WW2END0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_FEED_SE4BEG0"
],
"sites": [],
"pips": {},
"tile_type": "CLK_MTBF2"
"wires": [
"CLK_FEED_CK_GCLK13",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_WW4B2",
"CLK_FEED_EE4B2",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_WW2A0",
"CLK_PMV_BYP3_0",
"CLK_FEED_EE4A2",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_PMV_FAN5_0",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_PMV_FAN1_0",
"CLK_FEED_EE4BEG1",
"CLK_FEED_CK_GCLK29",
"CLK_PMV_IMUX46_0",
"CLK_FEED_WW4C0",
"CLK_FEED_EE4BEG2",
"CLK_PMV_BYP0_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_IMUX44_0",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_PMV_IMUX36_0",
"CLK_FEED_SW4END1",
"CLK_PMV_BYP5_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_LH12",
"CLK_PMV_IMUX5_0",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_FEED_WW4END3",
"CLK_FEED_SE4C1",
"CLK_FEED_CK_GCLK9",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_PMV_IMUX25_0",
"CLK_FEED_EE4C3",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_FEED_WW2END0",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_CK_GCLK15",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_PMV_FAN0_0",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4BEG3",
"CLK_FEED_WW4A2",
"CLK_FEED_SE4BEG1",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_WW2A2",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX17_0",
"CLK_MTBF2_EN",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_EE4BEG0",
"CLK_PMV_IMUX13_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_IMUX20_0",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_LH10",
"CLK_MTBF2_Q6B",
"CLK_PMV_IMUX22_0",
"CLK_FEED_SE4C0",
"CLK_FEED_LH3",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_IMUX7_0",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW2A3",
"CLK_FEED_NW4A1",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_PMV_IMUX28_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_LH5",
"CLK_FEED_NW4A2",
"CLK_PMV_BYP1_0",
"CLK_FEED_WW4END1",
"CLK_FEED_EE2BEG2",
"CLK_FEED_WL1END0",
"CLK_FEED_NE4BEG3",
"CLK_PMV_IMUX42_0",
"CLK_PMV_FAN3_0",
"CLK_FEED_WL1END1",
"CLK_FEED_SW2A1",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_EE2BEG0",
"CLK_FEED_CK_GCLK7",
"CLK_PMV_IMUX40_0",
"CLK_FEED_CK_GCLK22",
"CLK_FEED_EE4A1",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_EE2BEG1",
"CLK_FEED_SW4END0",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_SE4BEG2",
"CLK_FEED_NE2A3",
"CLK_MTBF2_Q5B",
"CLK_FEED_LH8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_IMUX29_0",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_WR1END1",
"CLK_FEED_NE4BEG2",
"CLK_FEED_R_CK_GCLK25",
"CLK_MTBF2_Q0B",
"CLK_FEED_WW4END2",
"CLK_FEED_SW4A3",
"CLK_PMV_IMUX26_0",
"CLK_FEED_LH11",
"CLK_PMV_IMUX0_0",
"CLK_PMV_IMUX11_0",
"CLK_FEED_EE4C1",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_PMV_IMUX15_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_NE4C0",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_SE4C2",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_FEED_ER1BEG1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_MONITOR_P",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX8_0",
"CLK_FEED_WW4C3",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_WW2END2",
"CLK_FEED_SE2A1",
"CLK_FEED_WW4A3",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_EL1BEG1",
"CLK_PMV_IMUX34_0",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_EE2BEG3",
"CLK_FEED_LH7",
"CLK_FEED_SW4A0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_PMV_FAN7_0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_LH9",
"CLK_MTBF2_Q4B",
"CLK_FEED_SW4A2",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_MONITOR_N",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_EE4B3",
"CLK_PMV_IMUX24_0",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_PMV_IMUX1_0",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_GCLK25",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_SW4END2",
"CLK_PMV_CLK1_0",
"CLK_PMV_BYP4_0",
"CLK_PMV_IMUX32_0",
"CLK_PMV_IMUX9_0",
"CLK_FEED_EE2A1",
"CLK_FEED_SE2A3",
"CLK_FEED_SW2A0",
"CLK_FEED_NE2A2",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4C2",
"CLK_MTBF2_RESET",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_R_CK_GCLK23",
"CLK_FEED_NW2A1",
"CLK_FEED_EE4B0",
"CLK_FEED_NE4C2",
"CLK_PMV_IMUX10_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_WW4B0",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_PMV_BYP2_0",
"CLK_MTBF2_Q1B",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_FEED_WW2END1",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_PMV_FAN6_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_NW2A3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_WR1END0",
"CLK_FEED_EE4A3",
"CLK_FEED_R_CK_GCLK10",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX4_0",
"CLK_FEED_LH4",
"CLK_FEED_EE2A0",
"CLK_PMV_IMUX35_0",
"CLK_PMV_IMUX16_0",
"CLK_FEED_ER1BEG2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WR1END3",
"CLK_FEED_LH1",
"CLK_FEED_EE2A3",
"CLK_FEED_NW4A3",
"CLK_FEED_WW2END3",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_SE4C3",
"CLK_MTBF2_CLK",
"CLK_PMV_IMUX23_0",
"CLK_PMV_IMUX38_0",
"CLK_PMV_IMUX12_0",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_NW4END2",
"CLK_FEED_EE4C0",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_WL1END3",
"CLK_FEED_NW2A0",
"CLK_FEED_ER1BEG0",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4A1",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_LH2",
"CLK_FEED_SW2A2",
"CLK_MTBF2_Q3B",
"CLK_PMV_BYP6_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_PMV_IMUX3_0",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_LH6",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_IMUX21_0",
"CLK_FEED_NW4END3",
"CLK_FEED_NE4C1",
"CLK_MTBF2_DIN",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_WW2A1",
"CLK_FEED_R_CK_GCLK16",
"CLK_PMV_IMUX33_0",
"CLK_PMV_IMUX18_0",
"CLK_FEED_SE4BEG0",
"CLK_FEED_WL1END2",
"CLK_FEED_NW4END1",
"CLK_FEED_NW4END0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_SE2A0",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_FEED_WR1END2",
"CLK_FEED_SW4END3",
"CLK_FEED_WW4END0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_EE4B1",
"CLK_FEED_SW4A1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_NE4C3",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK23",
"CLK_PMV_IMUX19_0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_EE2A2",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_NE2A0",
"CLK_MTBF2_Q2B",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_PMV_IMUX39_0",
"CLK_PMV_IMUX6_0",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_SW2A3",
"CLK_FEED_EE4A0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_CLK0_0",
"CLK_FEED_EL1BEG3",
"CLK_FEED_WW4C1",
"CLK_PMV_FAN4_0",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_EL1BEG0",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_R_CK_GCLK31",
"CLK_MTBF2_Q7B",
"CLK_PMV_IMUX30_0",
"CLK_PMV_IMUX27_0",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_EE4C2",
"CLK_PMV_IMUX47_0",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_PMV_IMUX14_0",
"CLK_FEED_WW4B3",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_PMV_BYP7_0",
"CLK_FEED_EL1BEG2",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_WW4B1"
],
"tile_type": "CLK_MTBF2",
"sites": []
}

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artix7/tile_type_CLK_PMV.json
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artix7/tile_type_CLK_PMV2.json
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@ -1,377 +1,377 @@
{
"pips": {},
"wires": [
"CLK_FEED_EE4B2",
"CLK_FEED_EE4B3",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX44_0",
"CLK_PMV_BYP2_0",
"CLK_FEED_R_CK_GCLK12",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK12",
"CLK_PMV2_ODIV4",
"CLK_PMV_BYP5_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_PMV_IMUX27_0",
"CLK_FEED_EE4BEG0",
"CLK_FEED_WW2A2",
"CLK_FEED_WW2END3",
"CLK_FEED_R_CK_GCLK17",
"CLK_PMV2_O",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4C1",
"CLK_FEED_LH6",
"CLK_FEED_EL1BEG0",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_WR1END1",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_EE4A1",
"CLK_FEED_WW4END1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_PMV_IMUX7_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_EL1BEG2",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_R_CK_GCLK4",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_PMV_IMUX14_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_WW4A1",
"CLK_PMV2_A2",
"CLK_PMV_IMUX35_0",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_EE2A0",
"CLK_PMV2_A0",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_LH8",
"CLK_FEED_SW4A0",
"CLK_FEED_NE4C3",
"CLK_FEED_SE2A1",
"CLK_FEED_R_CK_GCLK27",
"CLK_PMV2_A1",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4C0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_WW4END2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_PMV_CLK1_0",
"CLK_FEED_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_PMV_IMUX34_0",
"CLK_FEED_NE4BEG2",
"CLK_FEED_EL1BEG3",
"CLK_FEED_WR1END3",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_SW2A2",
"CLK_FEED_LH9",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_CK_GCLK15",
"CLK_PMV2_EN",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_IMUX40_0",
"CLK_FEED_WW4A2",
"CLK_PMV_IMUX24_0",
"CLK_FEED_R_CK_GCLK5",
"CLK_PMV_IMUX3_0",
"CLK_PMV_IMUX42_0",
"CLK_PMV_IMUX5_0",
"CLK_FEED_SE2A0",
"CLK_FEED_NW4END2",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_PMV_CLK0_0",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_WW2A0",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_LH3",
"CLK_FEED_MONITOR_N",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_NW4END0",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_EE4B0",
"CLK_FEED_LH11",
"CLK_PMV_FAN4_0",
"CLK_FEED_NW2A0",
"CLK_FEED_SW4A2",
"CLK_FEED_NW4A2",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_WW4END0",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_WW2END2",
"CLK_FEED_EE2A1",
"CLK_FEED_NE2A0",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_EE4A3",
"CLK_FEED_LH12",
"CLK_FEED_EE2BEG3",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG2",
"CLK_FEED_LH7",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_NW4END3",
"CLK_PMV_FAN0_0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_IMUX15_0",
"CLK_FEED_EE4C0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_FEED_SE4BEG3",
"CLK_FEED_SW4END2",
"CLK_FEED_SW4END3",
"CLK_PMV_IMUX13_0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_BYP0_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_EE2BEG2",
"CLK_PMV_IMUX29_0",
"CLK_FEED_EE4BEG1",
"CLK_PMV_IMUX10_0",
"CLK_PMV_IMUX1_0",
"CLK_FEED_LH2",
"CLK_PMV_FAN3_0",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_PMV_IMUX39_0",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_SW4END1",
"CLK_FEED_WW2A3",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_SE4C1",
"CLK_FEED_SW2A0",
"CLK_FEED_EE2A3",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK5",
"CLK_PMV_IMUX38_0",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_IMUX22_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX0_0",
"CLK_PMV_FAN7_0",
"CLK_FEED_EE4C2",
"CLK_FEED_LH10",
"CLK_PMV_IMUX28_0",
"CLK_FEED_NE4C1",
"CLK_FEED_ER1BEG0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_IMUX16_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_SE4BEG1",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH1",
"CLK_FEED_WL1END0",
"CLK_FEED_SW4A3",
"CLK_PMV_IMUX6_0",
"CLK_FEED_CK_GCLK13",
"CLK_PMV_IMUX33_0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_LH4",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_NE4C0",
"CLK_FEED_NE2A2",
"CLK_PMV_IMUX9_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_BYP3_0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW4B0",
"CLK_FEED_WW4C3",
"CLK_FEED_EE4C1",
"CLK_FEED_WW4C2",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_ER1BEG2",
"CLK_FEED_WL1END3",
"CLK_FEED_SE2A3",
"CLK_PMV_FAN1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_EE4BEG2",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_IMUX8_0",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_WW4B2",
"CLK_PMV_IMUX26_0",
"CLK_FEED_SE4C2",
"CLK_FEED_CK_GCLK10",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_PMV_BYP1_0",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_ER1BEG1",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_SE4C3",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_NW2A1",
"CLK_PMV_IMUX21_0",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX12_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_CK_GCLK14",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_SW2A1",
"CLK_PMV_IMUX4_0",
"CLK_FEED_EE2BEG0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_MONITOR_P",
"CLK_FEED_NE2A3",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_EE4B2",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_WW2A0",
"CLK_PMV_BYP3_0",
"CLK_FEED_EE4A2",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_LH5",
"CLK_FEED_EE4C3",
"CLK_FEED_WR1END2",
"CLK_PMV_BYP7_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_CK_GCLK22",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_SW4A1",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX18_0",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK2",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WW4C0",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_SW2A3",
"CLK_PMV_FAN5_0",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_IMUX25_0",
"CLK_FEED_WW4A3",
"CLK_FEED_WW2END1",
"CLK_PMV_IMUX23_0",
"CLK_FEED_CK_GCLK20",
"CLK_PMV_IMUX32_0",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_WW2A1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4B3",
"CLK_FEED_NW4A3",
"CLK_FEED_NW4A1",
"CLK_FEED_NW4END1",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_NE2A1",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_PMV_FAN1_0",
"CLK_FEED_EE4BEG1",
"CLK_FEED_CK_GCLK29",
"CLK_PMV_IMUX46_0",
"CLK_FEED_WW4C0",
"CLK_FEED_EE4BEG2",
"CLK_PMV_BYP0_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_IMUX44_0",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_EE4A0",
"CLK_FEED_WL1END1",
"CLK_FEED_EE2BEG1",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_PMV_IMUX36_0",
"CLK_FEED_SW4END1",
"CLK_PMV_BYP5_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_LH12",
"CLK_PMV_IMUX5_0",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_FEED_WW4END3",
"CLK_FEED_SE4C1",
"CLK_FEED_CK_GCLK9",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_PMV_IMUX25_0",
"CLK_FEED_EE4C3",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_WW2END0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_CK_GCLK15",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_PMV_FAN0_0",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4BEG3",
"CLK_FEED_WW4A2",
"CLK_FEED_SE4BEG1",
"CLK_PMV2_A1",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_WW2A2",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX17_0",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_EE4BEG0",
"CLK_PMV_IMUX13_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_IMUX20_0",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_LH10",
"CLK_PMV_IMUX22_0",
"CLK_FEED_SE4C0",
"CLK_PMV2_A0",
"CLK_FEED_LH3",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_IMUX7_0",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW2A3",
"CLK_FEED_NW4A1",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_PMV_IMUX28_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_LH5",
"CLK_FEED_NW4A2",
"CLK_PMV_BYP1_0",
"CLK_FEED_WW4END1",
"CLK_FEED_EE2BEG2",
"CLK_FEED_WL1END0",
"CLK_FEED_NE4BEG3",
"CLK_PMV_IMUX42_0",
"CLK_PMV_FAN3_0",
"CLK_FEED_WL1END1",
"CLK_FEED_SW2A1",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_EE2BEG0",
"CLK_FEED_CK_GCLK7",
"CLK_PMV_IMUX40_0",
"CLK_FEED_CK_GCLK22",
"CLK_FEED_EE4A1",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_EE2BEG1",
"CLK_FEED_SW4END0",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_SE4BEG2",
"CLK_FEED_NE2A3",
"CLK_FEED_LH8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_PMV_IMUX29_0",
"CLK_FEED_WR1END1",
"CLK_FEED_NE4BEG2",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_WW4END2",
"CLK_FEED_SW4A3",
"CLK_PMV_IMUX26_0",
"CLK_FEED_LH11",
"CLK_PMV_IMUX0_0",
"CLK_PMV_IMUX11_0",
"CLK_FEED_EE4C1",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_PMV_IMUX15_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_NE4C0",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_SE4C2",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_FEED_ER1BEG1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_MONITOR_P",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX8_0",
"CLK_FEED_WW4C3",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_WW2END2",
"CLK_FEED_SE2A1",
"CLK_FEED_WW4A3",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_EL1BEG1",
"CLK_PMV_IMUX34_0",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_EE2BEG3",
"CLK_FEED_LH7",
"CLK_FEED_SW4A0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_PMV_FAN7_0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_LH9",
"CLK_FEED_SW4A2",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_MONITOR_N",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_EE4B3",
"CLK_PMV_IMUX24_0",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_PMV_IMUX1_0",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_GCLK25",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_SW4END2",
"CLK_PMV_BYP4_0",
"CLK_PMV_CLK1_0",
"CLK_PMV_IMUX32_0",
"CLK_PMV_IMUX9_0",
"CLK_FEED_EE2A1",
"CLK_FEED_SE2A3",
"CLK_FEED_SW2A0",
"CLK_FEED_NE2A2",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4C2",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_R_CK_GCLK23",
"CLK_FEED_NW2A1",
"CLK_FEED_EE4B0",
"CLK_FEED_NE4C2",
"CLK_PMV_IMUX10_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_WW4B0",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_PMV_BYP2_0",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_FEED_WW2END1",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_PMV_FAN6_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_NW2A3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_WR1END0",
"CLK_FEED_EE4A3",
"CLK_FEED_R_CK_GCLK10",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX4_0",
"CLK_FEED_LH4",
"CLK_FEED_EE2A0",
"CLK_PMV_IMUX35_0",
"CLK_PMV_IMUX16_0",
"CLK_FEED_ER1BEG2",
"CLK_PMV2_ODIV2",
"CLK_FEED_SE4BEG0"
"CLK_FEED_ER1BEG3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WR1END3",
"CLK_PMV2_A2",
"CLK_FEED_LH1",
"CLK_FEED_EE2A3",
"CLK_FEED_NW4A3",
"CLK_FEED_WW2END3",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_SE4C3",
"CLK_PMV_IMUX23_0",
"CLK_PMV_IMUX38_0",
"CLK_PMV_IMUX12_0",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_NW4END2",
"CLK_FEED_EE4C0",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_WL1END3",
"CLK_FEED_NW2A0",
"CLK_FEED_ER1BEG0",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4A1",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_LH2",
"CLK_FEED_SW2A2",
"CLK_PMV_BYP6_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_PMV_IMUX3_0",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_LH6",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_IMUX21_0",
"CLK_FEED_NW4END3",
"CLK_FEED_NE4C1",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_WW2A1",
"CLK_FEED_R_CK_GCLK16",
"CLK_PMV_IMUX33_0",
"CLK_PMV_IMUX18_0",
"CLK_FEED_SE4BEG0",
"CLK_FEED_WL1END2",
"CLK_FEED_NW4END1",
"CLK_FEED_NW4END0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_SE2A0",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_FEED_WR1END2",
"CLK_FEED_SW4END3",
"CLK_FEED_WW4END0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_EE4B1",
"CLK_FEED_SW4A1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_NE4C3",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK23",
"CLK_PMV_IMUX19_0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_EE2A2",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_NE2A0",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_PMV_IMUX6_0",
"CLK_PMV_IMUX39_0",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_SW2A3",
"CLK_FEED_EE4A0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_CLK0_0",
"CLK_FEED_EL1BEG3",
"CLK_FEED_WW4C1",
"CLK_PMV_FAN4_0",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_EL1BEG0",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_R_CK_GCLK31",
"CLK_PMV_IMUX47_0",
"CLK_PMV_IMUX30_0",
"CLK_PMV_IMUX27_0",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_EE4C2",
"CLK_PMV2_ODIV4",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_PMV_IMUX14_0",
"CLK_FEED_WW4B3",
"CLK_PMV2_O",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_PMV_BYP7_0",
"CLK_FEED_EL1BEG2",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_PMV2_EN",
"CLK_FEED_WW4B1"
],
"tile_type": "CLK_PMV2",
"sites": [
{
"prefix": "PMV",
"y_coord": 0,
"type": "PMV2",
"site_pins": {
"ODIV2": "CLK_PMV2_ODIV2",
"O": "CLK_PMV2_O",
"A0": "CLK_PMV2_A0",
"ODIV4": "CLK_PMV2_ODIV4",
"A2": "CLK_PMV2_A2",
"EN": "CLK_PMV2_EN",
"A1": "CLK_PMV2_A1",
"ODIV4": "CLK_PMV2_ODIV4"
"EN": "CLK_PMV2_EN",
"ODIV2": "CLK_PMV2_ODIV2",
"A0": "CLK_PMV2_A0",
"O": "CLK_PMV2_O"
},
"type": "PMV2",
"prefix": "PMV",
"name": "X0Y0",
"x_coord": 0,
"name": "X0Y0"
"y_coord": 0
}
],
"pips": {},
"tile_type": "CLK_PMV2"
]
}

714
artix7/tile_type_CLK_PMV2_SVT.json
View File

@ -1,360 +1,360 @@
{
"wires": [
"CLK_FEED_EE4B2",
"CLK_FEED_EE4B3",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX44_0",
"CLK_PMV_BYP2_0",
"CLK_FEED_R_CK_GCLK12",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK12",
"CLK_PMV2_ODIV4",
"CLK_PMV_BYP5_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_PMV_IMUX27_0",
"CLK_FEED_EE4BEG0",
"CLK_FEED_WW2A2",
"CLK_FEED_WW2END3",
"CLK_FEED_R_CK_GCLK17",
"CLK_PMV2_O",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4C1",
"CLK_FEED_LH6",
"CLK_FEED_EL1BEG0",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_WR1END1",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_EE4A1",
"CLK_FEED_WW4END1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_PMV_IMUX7_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_EL1BEG2",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_R_CK_GCLK4",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_PMV_IMUX14_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_WW4A1",
"CLK_PMV2_A2",
"CLK_PMV_IMUX35_0",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_EE2A0",
"CLK_PMV2_A0",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_LH8",
"CLK_FEED_SW4A0",
"CLK_FEED_NE4C3",
"CLK_FEED_SE2A1",
"CLK_FEED_R_CK_GCLK27",
"CLK_PMV2_A1",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4C0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_WW4END2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_PMV_CLK1_0",
"CLK_FEED_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_PMV_IMUX34_0",
"CLK_FEED_NE4BEG2",
"CLK_FEED_EL1BEG3",
"CLK_FEED_WR1END3",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_SW2A2",
"CLK_FEED_LH9",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_CK_GCLK15",
"CLK_PMV2_EN",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_IMUX40_0",
"CLK_FEED_WW4A2",
"CLK_PMV_IMUX24_0",
"CLK_FEED_R_CK_GCLK5",
"CLK_PMV_IMUX3_0",
"CLK_PMV_IMUX42_0",
"CLK_PMV_IMUX5_0",
"CLK_FEED_SE2A0",
"CLK_FEED_NW4END2",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_PMV_CLK0_0",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_WW2A0",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_LH3",
"CLK_FEED_MONITOR_N",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_NW4END0",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_EE4B0",
"CLK_FEED_LH11",
"CLK_PMV_FAN4_0",
"CLK_FEED_NW2A0",
"CLK_FEED_SW4A2",
"CLK_FEED_NW4A2",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_WW4END0",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_WW2END2",
"CLK_FEED_EE2A1",
"CLK_FEED_NE2A0",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_EE4A3",
"CLK_FEED_LH12",
"CLK_FEED_EE2BEG3",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG2",
"CLK_FEED_LH7",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_NW4END3",
"CLK_PMV_FAN0_0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_IMUX15_0",
"CLK_FEED_EE4C0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_FEED_SE4BEG3",
"CLK_FEED_SW4END2",
"CLK_FEED_SW4END3",
"CLK_PMV_IMUX13_0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_BYP0_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_EE2BEG2",
"CLK_PMV_IMUX29_0",
"CLK_FEED_EE4BEG1",
"CLK_PMV_IMUX10_0",
"CLK_PMV_IMUX1_0",
"CLK_FEED_LH2",
"CLK_PMV_FAN3_0",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_PMV_IMUX39_0",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_SW4END1",
"CLK_FEED_WW2A3",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_SE4C1",
"CLK_FEED_SW2A0",
"CLK_FEED_EE2A3",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK5",
"CLK_PMV_IMUX38_0",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_IMUX22_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX0_0",
"CLK_PMV_FAN7_0",
"CLK_FEED_EE4C2",
"CLK_FEED_LH10",
"CLK_PMV_IMUX28_0",
"CLK_FEED_NE4C1",
"CLK_FEED_ER1BEG0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_IMUX16_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_SE4BEG1",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH1",
"CLK_FEED_WL1END0",
"CLK_FEED_SW4A3",
"CLK_PMV_IMUX6_0",
"CLK_FEED_CK_GCLK13",
"CLK_PMV_IMUX33_0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_LH4",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_NE4C0",
"CLK_FEED_NE2A2",
"CLK_PMV_IMUX9_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_BYP3_0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW4B0",
"CLK_FEED_WW4C3",
"CLK_FEED_EE4C1",
"CLK_FEED_WW4C2",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_ER1BEG2",
"CLK_FEED_WL1END3",
"CLK_FEED_SE2A3",
"CLK_PMV_FAN1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_EE4BEG2",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_IMUX8_0",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_WW4B2",
"CLK_PMV_IMUX26_0",
"CLK_FEED_SE4C2",
"CLK_FEED_CK_GCLK10",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_PMV_BYP1_0",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_ER1BEG1",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_SE4C3",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_NW2A1",
"CLK_PMV_IMUX21_0",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX12_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_FEED_CK_GCLK14",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_SW2A1",
"CLK_PMV_IMUX4_0",
"CLK_FEED_EE2BEG0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_MONITOR_P",
"CLK_FEED_NE2A3",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_LH5",
"CLK_FEED_EE4C3",
"CLK_FEED_WR1END2",
"CLK_PMV_BYP7_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_CK_GCLK22",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_SW4A1",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX18_0",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK2",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WW4C0",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_SW2A3",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_IMUX25_0",
"CLK_FEED_WW4A3",
"CLK_FEED_WW2END1",
"CLK_PMV_IMUX23_0",
"CLK_FEED_CK_GCLK20",
"CLK_PMV_IMUX32_0",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_WW2A1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4B3",
"CLK_FEED_NW4A3",
"CLK_FEED_NW4A1",
"CLK_FEED_NW4END1",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_EE4A0",
"CLK_FEED_WL1END1",
"CLK_FEED_EE2BEG1",
"CLK_FEED_WW2END0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_PMV2_ODIV2",
"CLK_FEED_SE4BEG0"
],
"sites": [],
"pips": {},
"tile_type": "CLK_PMV2_SVT"
"wires": [
"CLK_FEED_CK_GCLK13",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_WW4B2",
"CLK_FEED_EE4B2",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_WW2A0",
"CLK_PMV_BYP3_0",
"CLK_FEED_EE4A2",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_PMV_FAN5_0",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_PMV_FAN1_0",
"CLK_FEED_EE4BEG1",
"CLK_FEED_CK_GCLK29",
"CLK_PMV_IMUX46_0",
"CLK_FEED_WW4C0",
"CLK_FEED_EE4BEG2",
"CLK_PMV_BYP0_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_IMUX44_0",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_PMV_IMUX36_0",
"CLK_FEED_SW4END1",
"CLK_PMV_BYP5_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_LH12",
"CLK_PMV_IMUX5_0",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_FEED_WW4END3",
"CLK_FEED_SE4C1",
"CLK_FEED_CK_GCLK9",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_PMV_IMUX25_0",
"CLK_FEED_EE4C3",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_WW2END0",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_CK_GCLK15",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_PMV_FAN0_0",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4BEG3",
"CLK_FEED_WW4A2",
"CLK_FEED_SE4BEG1",
"CLK_PMV2_A1",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_WW2A2",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX17_0",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_EE4BEG0",
"CLK_PMV_IMUX13_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_IMUX20_0",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_LH10",
"CLK_PMV_IMUX22_0",
"CLK_FEED_SE4C0",
"CLK_PMV2_A0",
"CLK_FEED_LH3",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_IMUX7_0",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW2A3",
"CLK_FEED_NW4A1",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_PMV_IMUX28_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_LH5",
"CLK_FEED_NW4A2",
"CLK_PMV_BYP1_0",
"CLK_FEED_WW4END1",
"CLK_FEED_EE2BEG2",
"CLK_FEED_WL1END0",
"CLK_FEED_NE4BEG3",
"CLK_PMV_IMUX42_0",
"CLK_PMV_FAN3_0",
"CLK_FEED_WL1END1",
"CLK_FEED_SW2A1",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_EE2BEG0",
"CLK_FEED_CK_GCLK7",
"CLK_PMV_IMUX40_0",
"CLK_FEED_CK_GCLK22",
"CLK_FEED_EE4A1",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_EE2BEG1",
"CLK_FEED_SW4END0",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_SE4BEG2",
"CLK_FEED_NE2A3",
"CLK_FEED_LH8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_PMV_IMUX29_0",
"CLK_FEED_WR1END1",
"CLK_FEED_NE4BEG2",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_WW4END2",
"CLK_FEED_SW4A3",
"CLK_PMV_IMUX26_0",
"CLK_FEED_LH11",
"CLK_PMV_IMUX0_0",
"CLK_PMV_IMUX11_0",
"CLK_FEED_EE4C1",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_PMV_IMUX15_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_NE4C0",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_SE4C2",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_FEED_ER1BEG1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_MONITOR_P",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX8_0",
"CLK_FEED_WW4C3",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_WW2END2",
"CLK_FEED_SE2A1",
"CLK_FEED_WW4A3",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_EL1BEG1",
"CLK_PMV_IMUX34_0",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_EE2BEG3",
"CLK_FEED_LH7",
"CLK_FEED_SW4A0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_PMV_FAN7_0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_LH9",
"CLK_FEED_SW4A2",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_MONITOR_N",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_EE4B3",
"CLK_PMV_IMUX24_0",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_PMV_IMUX1_0",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_GCLK25",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_SW4END2",
"CLK_PMV_BYP4_0",
"CLK_PMV_CLK1_0",
"CLK_PMV_IMUX32_0",
"CLK_PMV_IMUX9_0",
"CLK_FEED_EE2A1",
"CLK_FEED_SE2A3",
"CLK_FEED_SW2A0",
"CLK_FEED_NE2A2",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4C2",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_R_CK_GCLK23",
"CLK_FEED_NW2A1",
"CLK_FEED_EE4B0",
"CLK_FEED_NE4C2",
"CLK_PMV_IMUX10_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_WW4B0",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_PMV_BYP2_0",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_FEED_WW2END1",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_PMV_FAN6_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_NW2A3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_WR1END0",
"CLK_FEED_EE4A3",
"CLK_FEED_R_CK_GCLK10",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX4_0",
"CLK_FEED_LH4",
"CLK_FEED_EE2A0",
"CLK_PMV_IMUX35_0",
"CLK_PMV_IMUX16_0",
"CLK_FEED_ER1BEG2",
"CLK_PMV2_ODIV2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WR1END3",
"CLK_PMV2_A2",
"CLK_FEED_LH1",
"CLK_FEED_EE2A3",
"CLK_FEED_NW4A3",
"CLK_FEED_WW2END3",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_SE4C3",
"CLK_PMV_IMUX23_0",
"CLK_PMV_IMUX38_0",
"CLK_PMV_IMUX12_0",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_NW4END2",
"CLK_FEED_EE4C0",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_WL1END3",
"CLK_FEED_NW2A0",
"CLK_FEED_ER1BEG0",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4A1",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_LH2",
"CLK_FEED_SW2A2",
"CLK_PMV_BYP6_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_PMV_IMUX3_0",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_LH6",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_IMUX21_0",
"CLK_FEED_NW4END3",
"CLK_FEED_NE4C1",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_WW2A1",
"CLK_FEED_R_CK_GCLK16",
"CLK_PMV_IMUX33_0",
"CLK_PMV_IMUX18_0",
"CLK_FEED_SE4BEG0",
"CLK_FEED_WL1END2",
"CLK_FEED_NW4END1",
"CLK_FEED_NW4END0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_SE2A0",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_FEED_WR1END2",
"CLK_FEED_SW4END3",
"CLK_FEED_WW4END0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_EE4B1",
"CLK_FEED_SW4A1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_NE4C3",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK23",
"CLK_PMV_IMUX19_0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_EE2A2",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_NE2A0",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_PMV_IMUX6_0",
"CLK_PMV_IMUX39_0",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_SW2A3",
"CLK_FEED_EE4A0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_CLK0_0",
"CLK_FEED_EL1BEG3",
"CLK_FEED_WW4C1",
"CLK_PMV_FAN4_0",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_EL1BEG0",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_R_CK_GCLK31",
"CLK_PMV_IMUX47_0",
"CLK_PMV_IMUX30_0",
"CLK_PMV_IMUX27_0",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_EE4C2",
"CLK_PMV2_ODIV4",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_PMV_IMUX14_0",
"CLK_FEED_WW4B3",
"CLK_PMV2_O",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_PMV_BYP7_0",
"CLK_FEED_EL1BEG2",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_PMV2_EN",
"CLK_FEED_WW4B1"
],
"tile_type": "CLK_PMV2_SVT",
"sites": []
}

712
artix7/tile_type_CLK_PMVIOB.json
View File

@ -1,359 +1,359 @@
{
"wires": [
"CLK_FEED_EE4B2",
"CLK_FEED_EE4B3",
"CLK_FEED_WR1END0",
"CLK_PMV_IMUX44_0",
"CLK_PMV_BYP2_0",
"CLK_FEED_R_CK_GCLK12",
"CLK_PMV_BYP6_0",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK25",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK12",
"CLK_PMV_BYP5_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_PMV_IMUX27_0",
"CLK_FEED_EE4BEG0",
"CLK_FEED_WW2A2",
"CLK_FEED_WW2END3",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_EE4A2",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4C1",
"CLK_FEED_LH6",
"CLK_FEED_EL1BEG0",
"CLK_FEED_WW4B1",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_WR1END1",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_EL1BEG1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_EE4A1",
"CLK_FEED_WW4END1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK23",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_PMV_IMUX7_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_IMUX19_0",
"CLK_PMV_IMUX46_0",
"CLK_FEED_EL1BEG2",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_R_CK_GCLK4",
"CLK_PMV_FAN5_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_PMV_IMUX14_0",
"CLK_PMV_IMUX17_0",
"CLK_FEED_WW4A1",
"CLK_FEED_CK_GCLK0",
"CLK_PMV_IMUX35_0",
"CLK_FEED_EE2A0",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_LH8",
"CLK_FEED_SW4A0",
"CLK_FEED_NE4C3",
"CLK_FEED_SE2A1",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4C0",
"CLK_FEED_EE2A2",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG3",
"CLK_FEED_WW4END2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_PMV_CLK1_0",
"CLK_FEED_CK_GCLK8",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_PMVIOB_O",
"CLK_PMV_IMUX34_0",
"CLK_FEED_EL1BEG3",
"CLK_FEED_NE4BEG2",
"CLK_PMV_FAN6_0",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_FEED_WR1END3",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_GCLK29",
"CLK_FEED_SW2A2",
"CLK_FEED_LH9",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_CK_GCLK15",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_IMUX40_0",
"CLK_FEED_WW4A2",
"CLK_PMV_IMUX24_0",
"CLK_FEED_R_CK_GCLK5",
"CLK_PMV_IMUX3_0",
"CLK_PMV_IMUX42_0",
"CLK_PMV_IMUX5_0",
"CLK_FEED_SE2A0",
"CLK_FEED_NW4END2",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_PMV_CLK0_0",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_FEED_WW2A0",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_LH3",
"CLK_FEED_MONITOR_N",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_NW4END0",
"CLK_PMVIOB_ODIV2",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_FEED_EE4B0",
"CLK_FEED_LH11",
"CLK_PMV_FAN4_0",
"CLK_FEED_NW2A0",
"CLK_FEED_SW4A2",
"CLK_FEED_NW4A2",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_WW4END0",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_FEED_WW2END2",
"CLK_FEED_EE2A1",
"CLK_FEED_NE2A0",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_EE4A3",
"CLK_FEED_LH12",
"CLK_FEED_EE2BEG3",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_SE4BEG2",
"CLK_FEED_LH7",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_R_CK_GCLK31",
"CLK_FEED_NW4END3",
"CLK_PMV_FAN0_0",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_PMV_IMUX15_0",
"CLK_FEED_EE4C0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_FEED_SE4BEG3",
"CLK_FEED_SW4END2",
"CLK_FEED_SW4END3",
"CLK_PMV_IMUX13_0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_BYP0_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_CK_GCLK18",
"CLK_FEED_EE2BEG2",
"CLK_PMVIOB_ODIV4",
"CLK_PMV_IMUX29_0",
"CLK_FEED_EE4BEG1",
"CLK_PMV_IMUX10_0",
"CLK_PMV_IMUX1_0",
"CLK_FEED_LH2",
"CLK_PMV_FAN3_0",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_PMV_IMUX39_0",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_SW4END1",
"CLK_FEED_WW2A3",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_SE4C1",
"CLK_FEED_SW2A0",
"CLK_FEED_EE2A3",
"CLK_FEED_CK_GCLK7",
"CLK_FEED_WW4END3",
"CLK_FEED_CK_GCLK5",
"CLK_PMV_IMUX38_0",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_PMV_IMUX22_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_SW4END0",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_PMV_IMUX0_0",
"CLK_PMV_FAN7_0",
"CLK_FEED_EE4C2",
"CLK_FEED_LH10",
"CLK_PMV_IMUX28_0",
"CLK_FEED_NE4C1",
"CLK_FEED_ER1BEG0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_IMUX16_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_SE4BEG1",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK23",
"CLK_FEED_LH1",
"CLK_FEED_WL1END0",
"CLK_FEED_SW4A3",
"CLK_PMV_IMUX6_0",
"CLK_FEED_CK_GCLK13",
"CLK_PMV_IMUX33_0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_LH4",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_NE4C0",
"CLK_FEED_NE2A2",
"CLK_PMV_IMUX9_0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_PMV_BYP3_0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW4B0",
"CLK_FEED_WW4C3",
"CLK_FEED_EE4C1",
"CLK_PMVIOB_A0",
"CLK_FEED_WW4C2",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_FEED_ER1BEG2",
"CLK_FEED_WL1END3",
"CLK_FEED_SE2A3",
"CLK_PMV_FAN1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_FEED_EE4BEG2",
"CLK_FEED_R_CK_GCLK16",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_PMV_IMUX8_0",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_WW4B2",
"CLK_PMV_IMUX26_0",
"CLK_FEED_SE4C2",
"CLK_FEED_CK_GCLK10",
"CLK_PMV_BYP4_0",
"CLK_FEED_R_CK_GCLK30",
"CLK_PMV_BYP1_0",
"CLK_PMV_IMUX20_0",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_FEED_ER1BEG1",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_SE4C3",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_FEED_CK_GCLK19",
"CLK_PMVIOB_A1",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_NW2A1",
"CLK_PMV_IMUX21_0",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX12_0",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_PMVIOB_EN",
"CLK_FEED_CK_GCLK14",
"CLK_PMV_IMUX36_0",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_PMV_IMUX30_0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_FEED_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_SW2A1",
"CLK_PMV_IMUX4_0",
"CLK_FEED_EE2BEG0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_MONITOR_P",
"CLK_FEED_NE2A3",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_FEED_LH5",
"CLK_FEED_EE4C3",
"CLK_FEED_WR1END2",
"CLK_PMV_BYP7_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_CK_GCLK22",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_SW4A1",
"CLK_FEED_NE4C2",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX18_0",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_FEED_WL1END2",
"CLK_FEED_CK_GCLK2",
"CLK_PMV_IMUX11_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WW4C0",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_SW2A3",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_FEED_R_CK_GCLK10",
"CLK_PMV_IMUX25_0",
"CLK_FEED_WW4A3",
"CLK_FEED_WW2END1",
"CLK_PMV_IMUX23_0",
"CLK_FEED_CK_GCLK20",
"CLK_PMV_IMUX32_0",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_NW2A3",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_WW2A1",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4B3",
"CLK_FEED_NW4A3",
"CLK_FEED_NW4A1",
"CLK_FEED_NW4END1",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_EE4B1",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_EE4A0",
"CLK_FEED_WL1END1",
"CLK_FEED_EE2BEG1",
"CLK_FEED_WW2END0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_FEED_SE4BEG0"
],
"sites": [],
"pips": {},
"tile_type": "CLK_PMVIOB"
"wires": [
"CLK_FEED_CK_GCLK13",
"CLK_FEED_CK_BUFG_CASC3",
"CLK_FEED_WW4B2",
"CLK_FEED_EE4B2",
"CLK_FEED_CK_GCLK26",
"CLK_FEED_WW2A0",
"CLK_PMV_BYP3_0",
"CLK_FEED_EE4A2",
"CLK_FEED_R_CK_BUFG_CASC25",
"CLK_PMV_FAN5_0",
"CLK_FEED_R_CK_GCLK4",
"CLK_FEED_R_CK_BUFG_CASC4",
"CLK_PMV_LOGIC_OUTS18_0",
"CLK_PMV_FAN1_0",
"CLK_FEED_EE4BEG1",
"CLK_FEED_CK_GCLK29",
"CLK_PMV_IMUX46_0",
"CLK_PMVIOB_EN",
"CLK_FEED_WW4C0",
"CLK_FEED_EE4BEG2",
"CLK_PMV_BYP0_0",
"CLK_PMV_LOGIC_OUTS8_0",
"CLK_FEED_CK_GCLK19",
"CLK_FEED_CK_BUFG_CASC22",
"CLK_PMV_IMUX44_0",
"CLK_FEED_CK_BUFG_CASC5",
"CLK_FEED_R_CK_BUFG_CASC29",
"CLK_PMV_IMUX36_0",
"CLK_FEED_SW4END1",
"CLK_PMV_BYP5_0",
"CLK_PMV_IMUX2_0",
"CLK_FEED_LH12",
"CLK_PMV_IMUX5_0",
"CLK_FEED_CK_BUFG_CASC13",
"CLK_FEED_CK_BUFG_CASC7",
"CLK_FEED_WW4END3",
"CLK_FEED_SE4C1",
"CLK_FEED_CK_GCLK9",
"CLK_PMV_LOGIC_OUTS17_0",
"CLK_PMV_IMUX25_0",
"CLK_FEED_EE4C3",
"CLK_FEED_R_CK_BUFG_CASC22",
"CLK_FEED_WW2END0",
"CLK_FEED_CK_GCLK2",
"CLK_FEED_R_CK_BUFG_CASC19",
"CLK_FEED_R_CK_BUFG_CASC11",
"CLK_FEED_R_CK_GCLK11",
"CLK_FEED_CK_GCLK15",
"CLK_PMV_LOGIC_OUTS5_0",
"CLK_PMV_CTRL0_0",
"CLK_FEED_R_CK_BUFG_CASC5",
"CLK_FEED_R_CK_BUFG_CASC16",
"CLK_PMV_FAN0_0",
"CLK_PMV_IMUX43_0",
"CLK_FEED_NE4BEG0",
"CLK_FEED_SE4BEG3",
"CLK_FEED_WW4A2",
"CLK_FEED_SE4BEG1",
"CLK_FEED_CK_GCLK0",
"CLK_FEED_WW2A2",
"CLK_FEED_R_CK_GCLK13",
"CLK_FEED_R_CK_BUFG_CASC24",
"CLK_PMV_IMUX17_0",
"CLK_FEED_R_CK_BUFG_CASC13",
"CLK_FEED_CK_GCLK17",
"CLK_FEED_CK_BUFG_CASC11",
"CLK_FEED_EE4BEG0",
"CLK_PMV_IMUX13_0",
"CLK_FEED_CK_GCLK11",
"CLK_PMV_IMUX20_0",
"CLK_FEED_CK_GCLK27",
"CLK_FEED_CK_BUFG_CASC2",
"CLK_FEED_CK_GCLK3",
"CLK_FEED_R_CK_GCLK5",
"CLK_FEED_R_CK_GCLK0",
"CLK_FEED_LH10",
"CLK_PMV_IMUX22_0",
"CLK_FEED_SE4C0",
"CLK_FEED_LH3",
"CLK_PMV_LOGIC_OUTS10_0",
"CLK_PMV_IMUX7_0",
"CLK_PMV_IMUX31_0",
"CLK_FEED_WW2A3",
"CLK_FEED_NW4A1",
"CLK_FEED_R_CK_BUFG_CASC14",
"CLK_PMV_IMUX28_0",
"CLK_FEED_R_CK_BUFG_CASC30",
"CLK_FEED_LH5",
"CLK_FEED_NW4A2",
"CLK_PMV_BYP1_0",
"CLK_PMVIOB_O",
"CLK_FEED_WW4END1",
"CLK_FEED_EE2BEG2",
"CLK_FEED_WL1END0",
"CLK_FEED_NE4BEG3",
"CLK_PMV_IMUX42_0",
"CLK_PMVIOB_A1",
"CLK_PMV_FAN3_0",
"CLK_FEED_WL1END1",
"CLK_FEED_SW2A1",
"CLK_PMV_LOGIC_OUTS6_0",
"CLK_FEED_EE2BEG0",
"CLK_FEED_CK_GCLK7",
"CLK_PMV_IMUX40_0",
"CLK_FEED_CK_GCLK22",
"CLK_FEED_EE4A1",
"CLK_FEED_EE4BEG3",
"CLK_FEED_R_CK_BUFG_CASC20",
"CLK_FEED_CK_BUFG_CASC8",
"CLK_FEED_EE2BEG1",
"CLK_FEED_SW4END0",
"CLK_FEED_CK_BUFG_CASC12",
"CLK_FEED_SE4BEG2",
"CLK_FEED_NE2A3",
"CLK_FEED_LH8",
"CLK_FEED_R_CK_BUFG_CASC0",
"CLK_PMV_LOGIC_OUTS13_0",
"CLK_PMV_IMUX29_0",
"CLK_FEED_WR1END1",
"CLK_FEED_NE4BEG2",
"CLK_FEED_R_CK_GCLK25",
"CLK_FEED_WW4END2",
"CLK_FEED_SW4A3",
"CLK_PMV_IMUX26_0",
"CLK_FEED_LH11",
"CLK_PMV_IMUX0_0",
"CLK_PMV_IMUX11_0",
"CLK_FEED_EE4C1",
"CLK_PMV_LOGIC_OUTS16_0",
"CLK_PMV_IMUX15_0",
"CLK_FEED_R_CK_GCLK29",
"CLK_FEED_R_CK_GCLK27",
"CLK_FEED_NE4C0",
"CLK_FEED_CK_GCLK24",
"CLK_FEED_CK_GCLK14",
"CLK_FEED_R_CK_BUFG_CASC9",
"CLK_FEED_SE4C2",
"CLK_PMV_LOGIC_OUTS4_0",
"CLK_FEED_R_CK_BUFG_CASC1",
"CLK_FEED_ER1BEG1",
"CLK_PMV_IMUX41_0",
"CLK_FEED_R_CK_GCLK6",
"CLK_FEED_MONITOR_P",
"CLK_FEED_CK_GCLK1",
"CLK_FEED_R_CK_BUFG_CASC18",
"CLK_PMV_IMUX45_0",
"CLK_PMV_IMUX8_0",
"CLK_FEED_WW4C3",
"CLK_PMV_LOGIC_OUTS12_0",
"CLK_FEED_R_CK_BUFG_CASC21",
"CLK_FEED_R_CK_GCLK21",
"CLK_FEED_R_CK_GCLK24",
"CLK_FEED_WW2END2",
"CLK_FEED_SE2A1",
"CLK_FEED_WW4A3",
"CLK_FEED_CK_GCLK8",
"CLK_FEED_CK_GCLK20",
"CLK_FEED_CK_BUFG_CASC10",
"CLK_PMV_LOGIC_OUTS23_0",
"CLK_FEED_CK_BUFG_CASC0",
"CLK_FEED_EL1BEG1",
"CLK_PMV_IMUX34_0",
"CLK_FEED_R_CK_GCLK12",
"CLK_FEED_CK_GCLK6",
"CLK_FEED_R_CK_GCLK8",
"CLK_FEED_R_CK_BUFG_CASC27",
"CLK_FEED_CK_BUFG_CASC21",
"CLK_FEED_R_CK_BUFG_CASC26",
"CLK_FEED_EE2BEG3",
"CLK_FEED_LH7",
"CLK_PMV_LOGIC_OUTS1_0",
"CLK_FEED_SW4A0",
"CLK_FEED_CK_BUFG_CASC9",
"CLK_PMV_FAN7_0",
"CLK_PMV_LOGIC_OUTS20_0",
"CLK_FEED_LH9",
"CLK_FEED_SW4A2",
"CLK_FEED_CK_BUFG_CASC26",
"CLK_FEED_R_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK28",
"CLK_PMV_LOGIC_OUTS14_0",
"CLK_FEED_R_CK_BUFG_CASC28",
"CLK_FEED_CK_GCLK21",
"CLK_FEED_MONITOR_N",
"CLK_PMV_LOGIC_OUTS3_0",
"CLK_FEED_EE4B3",
"CLK_PMV_IMUX24_0",
"CLK_PMV_IMUX1_0",
"CLK_PMV_LOGIC_OUTS15_0",
"CLK_FEED_NE2A1",
"CLK_FEED_CK_GCLK25",
"CLK_PMV_FAN2_0",
"CLK_FEED_CK_BUFG_CASC23",
"CLK_FEED_R_CK_BUFG_CASC7",
"CLK_FEED_SW4END2",
"CLK_PMV_BYP4_0",
"CLK_PMV_CLK1_0",
"CLK_PMV_IMUX32_0",
"CLK_PMV_IMUX9_0",
"CLK_FEED_EE2A1",
"CLK_FEED_SE2A3",
"CLK_FEED_SW2A0",
"CLK_FEED_NE2A2",
"CLK_FEED_R_CK_GCLK17",
"CLK_FEED_CK_BUFG_CASC20",
"CLK_FEED_WW4C2",
"CLK_FEED_NE4BEG1",
"CLK_FEED_CK_GCLK12",
"CLK_FEED_R_CK_GCLK23",
"CLK_FEED_NW2A1",
"CLK_FEED_EE4B0",
"CLK_FEED_NE4C2",
"CLK_PMV_IMUX10_0",
"CLK_FEED_R_CK_GCLK15",
"CLK_FEED_WW4B0",
"CLK_PMV_LOGIC_OUTS9_0",
"CLK_FEED_CK_BUFG_CASC19",
"CLK_PMV_BYP2_0",
"CLK_FEED_R_CK_BUFG_CASC6",
"CLK_FEED_R_CK_GCLK20",
"CLK_PMV_LOGIC_OUTS2_0",
"CLK_FEED_WW2END1",
"CLK_FEED_R_CK_BUFG_CASC3",
"CLK_PMV_LOGIC_OUTS7_0",
"CLK_FEED_CK_BUFG_CASC25",
"CLK_PMV_FAN6_0",
"CLK_PMV_IMUX37_0",
"CLK_FEED_NW2A3",
"CLK_FEED_R_CK_GCLK1",
"CLK_FEED_WR1END0",
"CLK_FEED_EE4A3",
"CLK_FEED_R_CK_GCLK10",
"CLK_FEED_R_CK_BUFG_CASC17",
"CLK_FEED_NW2A2",
"CLK_PMV_IMUX4_0",
"CLK_FEED_LH4",
"CLK_FEED_EE2A0",
"CLK_PMV_IMUX35_0",
"CLK_PMV_IMUX16_0",
"CLK_FEED_ER1BEG2",
"CLK_FEED_ER1BEG3",
"CLK_FEED_WW4A0",
"CLK_FEED_CK_BUFG_CASC18",
"CLK_FEED_WR1END3",
"CLK_PMVIOB_ODIV4",
"CLK_FEED_LH1",
"CLK_FEED_EE2A3",
"CLK_FEED_NW4A3",
"CLK_FEED_WW2END3",
"CLK_FEED_CK_BUFG_CASC27",
"CLK_FEED_SE4C3",
"CLK_PMV_IMUX23_0",
"CLK_PMV_IMUX38_0",
"CLK_PMV_IMUX12_0",
"CLK_FEED_CK_BUFG_CASC1",
"CLK_FEED_NW4END2",
"CLK_FEED_EE4C0",
"CLK_FEED_CK_GCLK10",
"CLK_FEED_R_CK_GCLK30",
"CLK_FEED_WL1END3",
"CLK_FEED_NW2A0",
"CLK_FEED_ER1BEG0",
"CLK_FEED_NW4A0",
"CLK_FEED_WW4A1",
"CLK_FEED_R_CK_BUFG_CASC23",
"CLK_FEED_CK_BUFG_CASC15",
"CLK_FEED_LH2",
"CLK_FEED_SW2A2",
"CLK_PMV_BYP6_0",
"CLK_FEED_R_CK_BUFG_CASC2",
"CLK_PMV_IMUX3_0",
"CLK_FEED_CK_GCLK31",
"CLK_FEED_CK_GCLK18",
"CLK_PMVIOB_ODIV2",
"CLK_FEED_R_CK_GCLK3",
"CLK_FEED_LH6",
"CLK_FEED_CK_GCLK4",
"CLK_FEED_R_CK_GCLK2",
"CLK_PMV_IMUX21_0",
"CLK_FEED_NW4END3",
"CLK_FEED_NE4C1",
"CLK_FEED_CK_BUFG_CASC31",
"CLK_FEED_R_CK_GCLK7",
"CLK_FEED_WW2A1",
"CLK_FEED_R_CK_GCLK16",
"CLK_PMV_IMUX33_0",
"CLK_PMV_IMUX18_0",
"CLK_FEED_SE4BEG0",
"CLK_FEED_WL1END2",
"CLK_FEED_NW4END1",
"CLK_FEED_NW4END0",
"CLK_PMV_LOGIC_OUTS11_0",
"CLK_FEED_SE2A0",
"CLK_FEED_CK_GCLK5",
"CLK_FEED_CK_BUFG_CASC4",
"CLK_FEED_WR1END2",
"CLK_FEED_SW4END3",
"CLK_FEED_WW4END0",
"CLK_PMV_CTRL1_0",
"CLK_PMV_LOGIC_OUTS21_0",
"CLK_FEED_EE4B1",
"CLK_FEED_SW4A1",
"CLK_FEED_CK_GCLK28",
"CLK_FEED_NE4C3",
"CLK_FEED_CK_BUFG_CASC17",
"CLK_FEED_CK_GCLK23",
"CLK_PMV_IMUX19_0",
"CLK_FEED_R_CK_GCLK18",
"CLK_FEED_EE2A2",
"CLK_FEED_R_CK_GCLK19",
"CLK_FEED_CK_BUFG_CASC6",
"CLK_FEED_CK_BUFG_CASC16",
"CLK_FEED_NE2A0",
"CLK_PMV_LOGIC_OUTS0_0",
"CLK_FEED_R_CK_BUFG_CASC15",
"CLK_FEED_R_CK_BUFG_CASC10",
"CLK_FEED_R_CK_BUFG_CASC8",
"CLK_PMV_IMUX6_0",
"CLK_PMV_IMUX39_0",
"CLK_FEED_SE2A2",
"CLK_FEED_R_CK_GCLK22",
"CLK_FEED_SW2A3",
"CLK_FEED_EE4A0",
"CLK_FEED_CK_GCLK30",
"CLK_PMV_CLK0_0",
"CLK_FEED_EL1BEG3",
"CLK_FEED_WW4C1",
"CLK_PMV_FAN4_0",
"CLK_FEED_R_CK_GCLK26",
"CLK_PMV_LOGIC_OUTS22_0",
"CLK_FEED_CK_BUFG_CASC28",
"CLK_FEED_EL1BEG0",
"CLK_PMV_IMUX47_0",
"CLK_FEED_R_CK_GCLK31",
"CLK_PMV_LOGIC_OUTS19_0",
"CLK_PMV_IMUX30_0",
"CLK_PMV_IMUX27_0",
"CLK_FEED_CK_BUFG_CASC24",
"CLK_FEED_EE4C2",
"CLK_FEED_R_CK_GCLK9",
"CLK_FEED_R_CK_BUFG_CASC12",
"CLK_PMV_IMUX14_0",
"CLK_FEED_WW4B3",
"CLK_FEED_CK_BUFG_CASC30",
"CLK_FEED_CK_BUFG_CASC14",
"CLK_PMV_BYP7_0",
"CLK_FEED_EL1BEG2",
"CLK_PMVIOB_A0",
"CLK_FEED_CK_BUFG_CASC29",
"CLK_FEED_CK_GCLK16",
"CLK_FEED_R_CK_GCLK14",
"CLK_FEED_WW4B1"
],
"tile_type": "CLK_PMVIOB",
"sites": []
}

136
artix7/tile_type_CLK_TERM.json
View File

@ -1,71 +1,71 @@
{
"wires": [
"CLK_TERM_R_GCLK24",
"CLK_TERM_GCLK1",
"CLK_TERM_GCLK15",
"CLK_TERM_R_GCLK18",
"CLK_TERM_GCLK24",
"CLK_TERM_GCLK20",
"CLK_TERM_GCLK6",
"CLK_TERM_GCLK2",
"CLK_TERM_GCLK18",
"CLK_TERM_R_GCLK7",
"CLK_TERM_R_GCLK29",
"CLK_TERM_GCLK31",
"CLK_TERM_R_GCLK10",
"CLK_TERM_R_GCLK9",
"CLK_TERM_R_GCLK13",
"CLK_TERM_R_GCLK19",
"CLK_TERM_GCLK8",
"CLK_TERM_GCLK0",
"CLK_TERM_GCLK27",
"CLK_TERM_GCLK29",
"CLK_TERM_R_GCLK17",
"CLK_TERM_GCLK9",
"CLK_TERM_R_GCLK22",
"CLK_TERM_R_GCLK30",
"CLK_TERM_GCLK3",
"CLK_TERM_R_GCLK1",
"CLK_TERM_R_GCLK15",
"CLK_TERM_R_GCLK25",
"CLK_TERM_GCLK26",
"CLK_TERM_GCLK23",
"CLK_TERM_GCLK12",
"CLK_TERM_R_GCLK5",
"CLK_TERM_GCLK17",
"CLK_TERM_R_GCLK23",
"CLK_TERM_GCLK30",
"CLK_TERM_GCLK25",
"CLK_TERM_R_GCLK2",
"CLK_TERM_GCLK4",
"CLK_TERM_R_GCLK28",
"CLK_TERM_R_GCLK6",
"CLK_TERM_R_GCLK11",
"CLK_TERM_GCLK7",
"CLK_TERM_R_GCLK0",
"CLK_TERM_R_GCLK12",
"CLK_TERM_GCLK5",
"CLK_TERM_GCLK22",
"CLK_TERM_GCLK16",
"CLK_TERM_GCLK13",
"CLK_TERM_R_GCLK20",
"CLK_TERM_R_GCLK8",
"CLK_TERM_R_GCLK14",
"CLK_TERM_R_GCLK26",
"CLK_TERM_GCLK11",
"CLK_TERM_GCLK10",
"CLK_TERM_GCLK19",
"CLK_TERM_R_GCLK16",
"CLK_TERM_R_GCLK31",
"CLK_TERM_GCLK14",
"CLK_TERM_R_GCLK27",
"CLK_TERM_R_GCLK4",
"CLK_TERM_GCLK28",
"CLK_TERM_GCLK21",
"CLK_TERM_R_GCLK21",
"CLK_TERM_R_GCLK3"
],
"sites": [],
"pips": {},
"tile_type": "CLK_TERM"
"wires": [
"CLK_TERM_R_GCLK17",
"CLK_TERM_R_GCLK20",
"CLK_TERM_R_GCLK21",
"CLK_TERM_R_GCLK16",
"CLK_TERM_R_GCLK12",
"CLK_TERM_R_GCLK5",
"CLK_TERM_R_GCLK26",
"CLK_TERM_R_GCLK4",
"CLK_TERM_R_GCLK8",
"CLK_TERM_R_GCLK10",
"CLK_TERM_GCLK26",
"CLK_TERM_GCLK30",
"CLK_TERM_R_GCLK19",
"CLK_TERM_R_GCLK25",
"CLK_TERM_R_GCLK1",
"CLK_TERM_R_GCLK3",
"CLK_TERM_GCLK13",
"CLK_TERM_GCLK3",
"CLK_TERM_GCLK23",
"CLK_TERM_GCLK14",
"CLK_TERM_GCLK18",
"CLK_TERM_GCLK22",
"CLK_TERM_GCLK8",
"CLK_TERM_GCLK15",
"CLK_TERM_GCLK31",
"CLK_TERM_GCLK0",
"CLK_TERM_R_GCLK28",
"CLK_TERM_R_GCLK11",
"CLK_TERM_R_GCLK13",
"CLK_TERM_R_GCLK14",
"CLK_TERM_GCLK21",
"CLK_TERM_R_GCLK29",
"CLK_TERM_R_GCLK7",
"CLK_TERM_GCLK27",
"CLK_TERM_GCLK4",
"CLK_TERM_GCLK7",
"CLK_TERM_GCLK6",
"CLK_TERM_GCLK5",
"CLK_TERM_R_GCLK15",
"CLK_TERM_R_GCLK22",
"CLK_TERM_GCLK29",
"CLK_TERM_R_GCLK18",
"CLK_TERM_GCLK12",
"CLK_TERM_GCLK9",
"CLK_TERM_GCLK20",
"CLK_TERM_GCLK19",
"CLK_TERM_GCLK2",
"CLK_TERM_GCLK24",
"CLK_TERM_R_GCLK6",
"CLK_TERM_R_GCLK31",
"CLK_TERM_GCLK16",
"CLK_TERM_R_GCLK0",
"CLK_TERM_GCLK1",
"CLK_TERM_GCLK25",
"CLK_TERM_R_GCLK23",
"CLK_TERM_R_GCLK24",
"CLK_TERM_R_GCLK27",
"CLK_TERM_R_GCLK30",
"CLK_TERM_R_GCLK9",
"CLK_TERM_GCLK11",
"CLK_TERM_R_GCLK2",
"CLK_TERM_GCLK17",
"CLK_TERM_GCLK10",
"CLK_TERM_GCLK28"
],
"tile_type": "CLK_TERM",
"sites": []
}

10354
artix7/tile_type_CMT_FIFO_L.json
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File diff suppressed because it is too large Load Diff

10382
artix7/tile_type_CMT_FIFO_R.json
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File diff suppressed because it is too large Load Diff

454
artix7/tile_type_CMT_PMV.json
View File

@ -1,230 +1,230 @@
{
"wires": [
"CMT_PMV_NW2A3",
"CMT_PMV_LOGIC_OUTS23",
"CMT_PMV_SW4END3",
"CMT_PMV_ER1BEG2",
"CMT_PMV_FAN4",
"CMT_PMV_LH6",
"CMT_PMV_IMUX17",
"CMT_PMV_NW4A1",
"CMT_PMV_WW4C3",
"CMT_PMV_NE2A3",
"CMT_PMV_WW2A3",
"CMT_PMV_EE2A2",
"CMT_PMV_IMUX32",
"CMT_PMV_IMUX46",
"CMT_PMV_SE4C0",
"CMT_PMV_IMUX38",
"CMT_PMV_WR1END1",
"CMT_PMV_SW4A3",
"CMT_PMV_SW2A0",
"CMT_PMV_SW4A2",
"CMT_PMV_BYP7",
"CMT_PMV_BYP6",
"CMT_PMV_IMUX22",
"L_TERM_INT_PHASER_TO_IO_OCLKDIV",
"CMT_PMV_IMUX0",
"CMT_PMV_WW4END0",
"CMT_PMV_IMUX4",
"CMT_PMV_LOGIC_OUTS13",
"CMT_PMV_IMUX30",
"CMT_PMV_IMUX10",
"CMT_PMV_IMUX45",
"CMT_PMV_WR1END3",
"CMT_PMV_EE4B0",
"CMT_PMV_LOGIC_OUTS22",
"CMT_PMV_LOGIC_OUTS14",
"CMT_PMV_IMUX3",
"CMT_PMV_IMUX26",
"CMT_PMV_LH3",
"CMT_PMV_IMUX23",
"CMT_PMV_EL1BEG0",
"CMT_PMV_LOGIC_OUTS21",
"CMT_PMV_FAN2",
"CMT_PMV_IMUX28",
"CMT_PMV_WW2A0",
"CMT_PMV_NW4A0",
"CMT_PMV_WW4END1",
"CMT_PMV_BYP3",
"CMT_PMV_IMUX29",
"CMT_PMV_WL1END1",
"CMT_PMV_SW4END1",
"CMT_PMV_LOGIC_OUTS16",
"CMT_PMV_IMUX35",
"CMT_PMV_LOGIC_OUTS15",
"CMT_PMV_EE2A0",
"CMT_PMV_EE4A3",
"CMT_PMV_NW2A2",
"CMT_PMV_IMUX24",
"CMT_PMV_IMUX44",
"CMT_PMV_LOGIC_OUTS5",
"CMT_PMV_BYP5",
"CMT_PMV_LOGIC_OUTS3",
"CMT_PMV_WW4END2",
"CMT_PMV_WL1END3",
"CMT_PMV_EE2BEG3",
"CMT_PMV_IMUX7",
"CMT_PMV_WW2A2",
"CMT_PMV_IMUX9",
"CMT_PMV_SE4BEG0",
"CMT_PMV_EE4BEG1",
"CMT_PMV_IMUX27",
"CMT_PMV_EE4C3",
"CMT_PMV_IMUX36",
"CMT_PMV_IMUX21",
"CMT_PMV_WL1END2",
"CMT_PMV_LOGIC_OUTS18",
"CMT_PMV_WW4A0",
"CMT_PMV_FAN7",
"CMT_PMV_WW4C2",
"CMT_PMV_LH5",
"CMT_PMV_SW4END0",
"CMT_PMV_EE2BEG0",
"CMT_PMV_LOGIC_OUTS2",
"CMT_PMV_IMUX37",
"CMT_PMV_EE2BEG2",
"CMT_PMV_NW4END1",
"CMT_PMV_EE4BEG3",
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90",
"CMT_PMV_BYP4",
"CMT_PMV_BYP2",
"CMT_PMV_MONITOR_N",
"CMT_PMV_NE4C2",
"CMT_PMV_LOGIC_OUTS12",
"CMT_PMV_WW4A3",
"CMT_PMV_IMUX15",
"CMT_PMV_SE4C1",
"CMT_PMV_EL1BEG2",
"CMT_PMV_IMUX33",
"CMT_PMV_LOGIC_OUTS0",
"CMT_PMV_FAN1",
"CMT_PMV_NE4C0",
"CMT_PMV_IMUX14",
"CMT_PMV_IMUX20",
"CMT_PMV_NW4END2",
"CMT_PMV_SW4A1",
"CMT_PMV_IMUX8",
"CMT_PMV_LH2",
"CMT_PMV_IMUX6",
"CMT_PMV_IMUX2",
"CMT_PMV_LOGIC_OUTS1",
"CMT_PMV_ER1BEG0",
"CMT_PMV_SE2A3",
"CMT_PMV_LH7",
"CMT_PMV_LH10",
"CMT_PMV_LOGIC_OUTS20",
"CMT_PMV_EE4B3",
"CMT_PMV_EL1BEG3",
"L_TERM_INT_PHASER_TO_IO_ICLKDIV",
"CMT_PMV_EE4C1",
"CMT_PMV_WR1END2",
"CMT_PMV_IMUX16",
"CMT_PMV_WW4A1",
"CMT_PMV_WW4END3",
"CMT_PMV_ER1BEG3",
"CMT_PMV_SE4BEG2",
"CMT_PMV_CLK0",
"CMT_PMV_NE4BEG0",
"CMT_PMV_LOGIC_OUTS7",
"CMT_PMV_EE4C0",
"CMT_PMV_FAN0",
"CMT_PMV_NE2A1",
"CMT_PMV_WR1END0",
"CMT_PMV_NW2A1",
"CMT_PMV_IMUX34",
"CMT_PMV_CTRL1",
"L_TERM_INT_PHASER_TO_IO_ICLK",
"CMT_PMV_SW4A0",
"CMT_PMV_EE4BEG0",
"CMT_PMV_LH9",
"CMT_PMV_IMUX1",
"CMT_PMV_IMUX40",
"CMT_PMV_WW4C0",
"CMT_PMV_SE4C3",
"CMT_PMV_NE2A2",
"CMT_PMV_EE4A2",
"CMT_PMV_NE4BEG3",
"CMT_PMV_WW2END0",
"CMT_PMV_CTRL0",
"CMT_PMV_LH11",
"CMT_PMV_LH8",
"CMT_PMV_WW4B1",
"CMT_PMV_IMUX31",
"CMT_PMV_WW2END1",
"CMT_PMV_IMUX5",
"CMT_PMV_SW2A3",
"CMT_PMV_IMUX13",
"CMT_PMV_NW4A2",
"CMT_PMV_NW4END0",
"CMT_PMV_IMUX11",
"CMT_PMV_CLK1",
"CMT_PMV_MONITOR_P",
"CMT_PMV_LOGIC_OUTS9",
"CMT_PMV_IMUX19",
"CMT_PMV_EE4BEG2",
"CMT_PMV_LOGIC_OUTS10",
"CMT_PMV_SE2A1",
"CMT_PMV_FAN6",
"CMT_PMV_FAN5",
"CMT_PMV_EE4B2",
"CMT_PMV_EE2A1",
"CMT_PMV_LH12",
"CMT_PMV_IMUX18",
"CMT_PMV_LH4",
"CMT_PMV_NW4END3",
"CMT_PMV_EE2BEG1",
"CMT_PMV_WW2END3",
"CMT_PMV_WW4A2",
"CMT_PMV_BYP1",
"L_TERM_INT_PHASER_TO_IO_OCLK",
"CMT_PMV_EE4C2",
"CMT_PMV_NE4C3",
"CMT_PMV_NW2A0",
"CMT_PMV_NE4BEG1",
"CMT_PMV_SW4END2",
"CMT_PMV_NE4C1",
"CMT_PMV_LH1",
"CMT_PMV_EE4A0",
"CMT_PMV_WL1END0",
"CMT_PMV_ER1BEG1",
"CMT_PMV_WW2A1",
"CMT_PMV_IMUX42",
"CMT_PMV_EL1BEG1",
"CMT_PMV_NE4BEG2",
"CMT_PMV_EE4A1",
"CMT_PMV_SE2A2",
"CMT_PMV_SE4BEG3",
"CMT_PMV_WW4C1",
"CMT_PMV_IMUX43",
"CMT_PMV_LOGIC_OUTS6",
"CMT_PMV_BYP0",
"CMT_PMV_IMUX41",
"CMT_PMV_EE4B1",
"CMT_PMV_WW4B0",
"CMT_PMV_SE2A0",
"CMT_PMV_IMUX39",
"CMT_PMV_LOGIC_OUTS4",
"CMT_PMV_LOGIC_OUTS19",
"CMT_PMV_IMUX25",
"CMT_PMV_NW4A3",
"CMT_PMV_WW2END2",
"CMT_PMV_NE2A0",
"CMT_PMV_SW2A2",
"CMT_PMV_WW4B3",
"CMT_PMV_IMUX12",
"CMT_PMV_LOGIC_OUTS8",
"CMT_PMV_LOGIC_OUTS11",
"CMT_PMV_WW4B2",
"CMT_PMV_EE2A3",
"CMT_PMV_SW2A1",
"CMT_PMV_FAN3",
"CMT_PMV_SE4C2",
"CMT_PMV_IMUX47",
"CMT_PMV_SE4BEG1",
"CMT_PMV_LOGIC_OUTS17"
],
"sites": [],
"pips": {},
"tile_type": "CMT_PMV"
"wires": [
"CMT_PMV_IMUX16",
"CMT_PMV_LOGIC_OUTS17",
"CMT_PMV_LOGIC_OUTS10",
"CMT_PMV_IMUX29",
"CMT_PMV_BYP1",
"CMT_PMV_BYP0",
"L_TERM_INT_PHASER_TO_IO_ICLKDIV",
"CMT_PMV_LOGIC_OUTS7",
"CMT_PMV_IMUX45",
"CMT_PMV_LOGIC_OUTS13",
"CMT_PMV_SW2A0",
"CMT_PMV_LOGIC_OUTS11",
"CMT_PMV_WW4C3",
"CMT_PMV_NW2A3",
"CMT_PMV_NE4BEG2",
"CMT_PMV_SW4A3",
"CMT_PMV_EE4C1",
"CMT_PMV_EE4B2",
"CMT_PMV_IMUX39",
"CMT_PMV_SW2A1",
"CMT_PMV_LOGIC_OUTS21",
"CMT_PMV_WW2END3",
"CMT_PMV_IMUX22",
"CMT_PMV_LH5",
"CMT_PMV_IMUX40",
"CMT_PMV_SW4A2",
"CMT_PMV_WW4A3",
"CMT_PMV_NW2A0",
"CMT_PMV_SE4C2",
"CMT_PMV_NW4END0",
"CMT_PMV_LH9",
"CMT_PMV_LOGIC_OUTS1",
"CMT_PMV_EE4A2",
"CMT_PMV_SE2A2",
"CMT_PMV_ER1BEG1",
"CMT_PMV_NW4A2",
"CMT_PMV_SE4C0",
"CMT_PMV_ER1BEG2",
"CMT_PMV_NW4A3",
"CMT_PMV_NW4END3",
"CMT_PMV_WW4B1",
"CMT_PMV_EE2BEG1",
"CMT_PMV_EE4BEG1",
"CMT_PMV_WL1END0",
"CMT_PMV_SE4BEG0",
"CMT_PMV_SW4A1",
"CMT_PMV_IMUX7",
"CMT_PMV_SW4END0",
"CMT_PMV_EE4C3",
"CMT_PMV_IMUX43",
"CMT_PMV_NW2A1",
"CMT_PMV_IMUX8",
"CMT_PMV_IMUX19",
"CMT_PMV_LH1",
"CMT_PMV_IMUX1",
"CMT_PMV_WR1END3",
"CMT_PMV_IMUX12",
"CMT_PMV_SE4BEG2",
"CMT_PMV_LH12",
"CMT_PMV_IMUX10",
"CMT_PMV_LOGIC_OUTS12",
"CMT_PMV_WW4B0",
"CMT_PMV_SE2A1",
"CMT_PMV_IMUX21",
"CMT_PMV_IMUX25",
"CMT_PMV_EE4BEG2",
"CMT_PMV_LOGIC_OUTS16",
"CMT_PMV_LOGIC_OUTS19",
"CMT_PMV_FAN4",
"CMT_PMV_SW2A3",
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90",
"CMT_PMV_LH10",
"CMT_PMV_CTRL0",
"CMT_PMV_IMUX20",
"CMT_PMV_WW4B3",
"CMT_PMV_IMUX4",
"CMT_PMV_NE2A2",
"CMT_PMV_LOGIC_OUTS5",
"CMT_PMV_MONITOR_P",
"CMT_PMV_CLK0",
"CMT_PMV_LOGIC_OUTS14",
"CMT_PMV_EE4B0",
"CMT_PMV_WW4A2",
"CMT_PMV_WW4END3",
"CMT_PMV_LOGIC_OUTS23",
"CMT_PMV_IMUX32",
"CMT_PMV_IMUX42",
"CMT_PMV_LH4",
"CMT_PMV_LOGIC_OUTS2",
"CMT_PMV_LH8",
"CMT_PMV_SE4BEG1",
"CMT_PMV_IMUX27",
"CMT_PMV_LH2",
"CMT_PMV_BYP3",
"CMT_PMV_WW4B2",
"CMT_PMV_FAN3",
"CMT_PMV_FAN6",
"CMT_PMV_EE4B3",
"CMT_PMV_WW4C2",
"CMT_PMV_ER1BEG0",
"CMT_PMV_SE4C1",
"CMT_PMV_FAN7",
"CMT_PMV_MONITOR_N",
"CMT_PMV_WW2A0",
"CMT_PMV_EE4A1",
"CMT_PMV_BYP5",
"CMT_PMV_IMUX28",
"CMT_PMV_IMUX15",
"CMT_PMV_WW2A1",
"CMT_PMV_WW4A0",
"CMT_PMV_CTRL1",
"CMT_PMV_IMUX3",
"CMT_PMV_CLK1",
"CMT_PMV_EE2A2",
"CMT_PMV_WW2END2",
"CMT_PMV_NE4C1",
"CMT_PMV_NE2A3",
"CMT_PMV_NE2A1",
"CMT_PMV_IMUX37",
"CMT_PMV_EE2BEG3",
"CMT_PMV_LOGIC_OUTS6",
"CMT_PMV_LOGIC_OUTS9",
"CMT_PMV_LOGIC_OUTS4",
"CMT_PMV_NE4BEG3",
"CMT_PMV_WR1END0",
"CMT_PMV_BYP6",
"CMT_PMV_FAN0",
"CMT_PMV_IMUX6",
"CMT_PMV_WW4C1",
"CMT_PMV_NW2A2",
"CMT_PMV_SW2A2",
"CMT_PMV_IMUX36",
"CMT_PMV_SW4A0",
"CMT_PMV_IMUX35",
"CMT_PMV_FAN1",
"CMT_PMV_IMUX11",
"CMT_PMV_EE4BEG0",
"CMT_PMV_EE2A3",
"CMT_PMV_WW4C0",
"CMT_PMV_NE4BEG1",
"CMT_PMV_NW4END1",
"CMT_PMV_IMUX38",
"CMT_PMV_EE4A0",
"CMT_PMV_NW4A0",
"CMT_PMV_BYP4",
"CMT_PMV_NW4END2",
"CMT_PMV_EE2A1",
"CMT_PMV_WW4END0",
"CMT_PMV_WW4END2",
"CMT_PMV_WL1END2",
"CMT_PMV_SE4C3",
"CMT_PMV_IMUX13",
"CMT_PMV_WW2A2",
"CMT_PMV_LOGIC_OUTS8",
"CMT_PMV_EE4C2",
"CMT_PMV_EL1BEG1",
"CMT_PMV_LOGIC_OUTS0",
"CMT_PMV_SW4END3",
"CMT_PMV_IMUX2",
"CMT_PMV_IMUX14",
"CMT_PMV_EL1BEG0",
"CMT_PMV_IMUX0",
"L_TERM_INT_PHASER_TO_IO_OCLKDIV",
"CMT_PMV_EE2BEG2",
"CMT_PMV_IMUX47",
"CMT_PMV_EE4BEG3",
"CMT_PMV_IMUX34",
"CMT_PMV_IMUX46",
"CMT_PMV_WW4A1",
"CMT_PMV_LOGIC_OUTS18",
"CMT_PMV_WW2END1",
"CMT_PMV_SE2A0",
"CMT_PMV_WW4END1",
"CMT_PMV_IMUX26",
"CMT_PMV_NE4C3",
"CMT_PMV_IMUX33",
"CMT_PMV_EE4A3",
"L_TERM_INT_PHASER_TO_IO_OCLK",
"CMT_PMV_LH3",
"CMT_PMV_WR1END2",
"CMT_PMV_EE2BEG0",
"CMT_PMV_BYP2",
"CMT_PMV_NE4C0",
"CMT_PMV_BYP7",
"CMT_PMV_EE2A0",
"CMT_PMV_WW2END0",
"CMT_PMV_SW4END1",
"CMT_PMV_NW4A1",
"CMT_PMV_EE4B1",
"CMT_PMV_ER1BEG3",
"CMT_PMV_LH7",
"CMT_PMV_NE4C2",
"CMT_PMV_SW4END2",
"CMT_PMV_IMUX31",
"CMT_PMV_IMUX24",
"CMT_PMV_FAN5",
"CMT_PMV_LOGIC_OUTS22",
"CMT_PMV_IMUX23",
"CMT_PMV_FAN2",
"CMT_PMV_LOGIC_OUTS3",
"CMT_PMV_LOGIC_OUTS15",
"CMT_PMV_EL1BEG2",
"CMT_PMV_LOGIC_OUTS20",
"CMT_PMV_WW2A3",
"CMT_PMV_WL1END1",
"CMT_PMV_EL1BEG3",
"CMT_PMV_IMUX5",
"CMT_PMV_IMUX9",
"CMT_PMV_LH6",
"CMT_PMV_WL1END3",
"CMT_PMV_LH11",
"CMT_PMV_NE2A0",
"CMT_PMV_IMUX18",
"CMT_PMV_IMUX17",
"CMT_PMV_WR1END1",
"CMT_PMV_NE4BEG0",
"CMT_PMV_IMUX30",
"CMT_PMV_IMUX44",
"CMT_PMV_IMUX41",
"L_TERM_INT_PHASER_TO_IO_ICLK",
"CMT_PMV_EE4C0",
"CMT_PMV_SE2A3",
"CMT_PMV_SE4BEG3"
],
"tile_type": "CMT_PMV",
"sites": []
}

454
artix7/tile_type_CMT_PMV_L.json
View File

@ -1,230 +1,230 @@
{
"wires": [
"CMT_PMV_NW2A3",
"CMT_PMV_LOGIC_OUTS23",
"CMT_PMV_SW4END3",
"CMT_PMV_ER1BEG2",
"CMT_PMV_FAN4",
"CMT_PMV_LH6",
"CMT_PMV_IMUX17",
"CMT_PMV_NW4A1",
"CMT_PMV_WW4C3",
"CMT_PMV_NE2A3",
"CMT_PMV_WW2A3",
"CMT_PMV_EE2A2",
"CMT_PMV_IMUX32",
"CMT_PMV_IMUX46",
"CMT_PMV_SE4C0",
"CMT_PMV_IMUX38",
"CMT_PMV_WR1END1",
"CMT_PMV_SW4A3",
"CMT_PMV_SW2A0",
"CMT_PMV_SW4A2",
"CMT_PMV_BYP7",
"CMT_PMV_BYP6",
"CMT_PMV_IMUX22",
"L_TERM_INT_PHASER_TO_IO_OCLKDIV",
"CMT_PMV_IMUX0",
"CMT_PMV_WW4END0",
"CMT_PMV_IMUX4",
"CMT_PMV_LOGIC_OUTS13",
"CMT_PMV_IMUX30",
"CMT_PMV_IMUX10",
"CMT_PMV_IMUX45",
"CMT_PMV_WR1END3",
"CMT_PMV_EE4B0",
"CMT_PMV_LOGIC_OUTS22",
"CMT_PMV_LOGIC_OUTS14",
"CMT_PMV_IMUX3",
"CMT_PMV_IMUX26",
"CMT_PMV_LH3",
"CMT_PMV_IMUX23",
"CMT_PMV_EL1BEG0",
"CMT_PMV_LOGIC_OUTS21",
"CMT_PMV_FAN2",
"CMT_PMV_IMUX28",
"CMT_PMV_WW2A0",
"CMT_PMV_NW4A0",
"CMT_PMV_WW4END1",
"CMT_PMV_BYP3",
"CMT_PMV_IMUX29",
"CMT_PMV_WL1END1",
"CMT_PMV_SW4END1",
"CMT_PMV_LOGIC_OUTS16",
"CMT_PMV_IMUX35",
"CMT_PMV_LOGIC_OUTS15",
"CMT_PMV_EE2A0",
"CMT_PMV_EE4A3",
"CMT_PMV_NW2A2",
"CMT_PMV_IMUX24",
"CMT_PMV_IMUX44",
"CMT_PMV_LOGIC_OUTS5",
"CMT_PMV_BYP5",
"CMT_PMV_LOGIC_OUTS3",
"CMT_PMV_WW4END2",
"CMT_PMV_WL1END3",
"CMT_PMV_EE2BEG3",
"CMT_PMV_IMUX7",
"CMT_PMV_WW2A2",
"CMT_PMV_IMUX9",
"CMT_PMV_SE4BEG0",
"CMT_PMV_EE4BEG1",
"CMT_PMV_IMUX27",
"CMT_PMV_EE4C3",
"CMT_PMV_IMUX36",
"CMT_PMV_IMUX21",
"CMT_PMV_WL1END2",
"CMT_PMV_LOGIC_OUTS18",
"CMT_PMV_WW4A0",
"CMT_PMV_FAN7",
"CMT_PMV_WW4C2",
"CMT_PMV_LH5",
"CMT_PMV_SW4END0",
"CMT_PMV_EE2BEG0",
"CMT_PMV_LOGIC_OUTS2",
"CMT_PMV_IMUX37",
"CMT_PMV_EE2BEG2",
"CMT_PMV_NW4END1",
"CMT_PMV_EE4BEG3",
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90",
"CMT_PMV_BYP4",
"CMT_PMV_BYP2",
"CMT_PMV_MONITOR_N",
"CMT_PMV_NE4C2",
"CMT_PMV_LOGIC_OUTS12",
"CMT_PMV_WW4A3",
"CMT_PMV_IMUX15",
"CMT_PMV_SE4C1",
"CMT_PMV_EL1BEG2",
"CMT_PMV_IMUX33",
"CMT_PMV_LOGIC_OUTS0",
"CMT_PMV_FAN1",
"CMT_PMV_NE4C0",
"CMT_PMV_IMUX14",
"CMT_PMV_IMUX20",
"CMT_PMV_NW4END2",
"CMT_PMV_SW4A1",
"CMT_PMV_IMUX8",
"CMT_PMV_LH2",
"CMT_PMV_IMUX6",
"CMT_PMV_IMUX2",
"CMT_PMV_LOGIC_OUTS1",
"CMT_PMV_ER1BEG0",
"CMT_PMV_SE2A3",
"CMT_PMV_LH7",
"CMT_PMV_LH10",
"CMT_PMV_LOGIC_OUTS20",
"CMT_PMV_EE4B3",
"CMT_PMV_EL1BEG3",
"L_TERM_INT_PHASER_TO_IO_ICLKDIV",
"CMT_PMV_EE4C1",
"CMT_PMV_WR1END2",
"CMT_PMV_IMUX16",
"CMT_PMV_WW4A1",
"CMT_PMV_WW4END3",
"CMT_PMV_ER1BEG3",
"CMT_PMV_SE4BEG2",
"CMT_PMV_CLK0",
"CMT_PMV_NE4BEG0",
"CMT_PMV_LOGIC_OUTS7",
"CMT_PMV_EE4C0",
"CMT_PMV_FAN0",
"CMT_PMV_NE2A1",
"CMT_PMV_WR1END0",
"CMT_PMV_NW2A1",
"CMT_PMV_IMUX34",
"CMT_PMV_CTRL1",
"L_TERM_INT_PHASER_TO_IO_ICLK",
"CMT_PMV_SW4A0",
"CMT_PMV_EE4BEG0",
"CMT_PMV_LH9",
"CMT_PMV_IMUX1",
"CMT_PMV_IMUX40",
"CMT_PMV_WW4C0",
"CMT_PMV_SE4C3",
"CMT_PMV_NE2A2",
"CMT_PMV_EE4A2",
"CMT_PMV_NE4BEG3",
"CMT_PMV_WW2END0",
"CMT_PMV_CTRL0",
"CMT_PMV_LH11",
"CMT_PMV_LH8",
"CMT_PMV_WW4B1",
"CMT_PMV_IMUX31",
"CMT_PMV_WW2END1",
"CMT_PMV_IMUX5",
"CMT_PMV_SW2A3",
"CMT_PMV_IMUX13",
"CMT_PMV_NW4A2",
"CMT_PMV_NW4END0",
"CMT_PMV_IMUX11",
"CMT_PMV_CLK1",
"CMT_PMV_MONITOR_P",
"CMT_PMV_LOGIC_OUTS9",
"CMT_PMV_IMUX19",
"CMT_PMV_EE4BEG2",
"CMT_PMV_LOGIC_OUTS10",
"CMT_PMV_SE2A1",
"CMT_PMV_FAN6",
"CMT_PMV_FAN5",
"CMT_PMV_EE4B2",
"CMT_PMV_EE2A1",
"CMT_PMV_LH12",
"CMT_PMV_IMUX18",
"CMT_PMV_LH4",
"CMT_PMV_NW4END3",
"CMT_PMV_EE2BEG1",
"CMT_PMV_WW2END3",
"CMT_PMV_WW4A2",
"CMT_PMV_BYP1",
"L_TERM_INT_PHASER_TO_IO_OCLK",
"CMT_PMV_EE4C2",
"CMT_PMV_NE4C3",
"CMT_PMV_NW2A0",
"CMT_PMV_NE4BEG1",
"CMT_PMV_SW4END2",
"CMT_PMV_NE4C1",
"CMT_PMV_LH1",
"CMT_PMV_EE4A0",
"CMT_PMV_WL1END0",
"CMT_PMV_ER1BEG1",
"CMT_PMV_WW2A1",
"CMT_PMV_IMUX42",
"CMT_PMV_EL1BEG1",
"CMT_PMV_NE4BEG2",
"CMT_PMV_EE4A1",
"CMT_PMV_SE2A2",
"CMT_PMV_SE4BEG3",
"CMT_PMV_WW4C1",
"CMT_PMV_IMUX43",
"CMT_PMV_LOGIC_OUTS6",
"CMT_PMV_BYP0",
"CMT_PMV_IMUX41",
"CMT_PMV_EE4B1",
"CMT_PMV_WW4B0",
"CMT_PMV_SE2A0",
"CMT_PMV_IMUX39",
"CMT_PMV_LOGIC_OUTS4",
"CMT_PMV_LOGIC_OUTS19",
"CMT_PMV_IMUX25",
"CMT_PMV_NW4A3",
"CMT_PMV_WW2END2",
"CMT_PMV_NE2A0",
"CMT_PMV_SW2A2",
"CMT_PMV_WW4B3",
"CMT_PMV_IMUX12",
"CMT_PMV_LOGIC_OUTS8",
"CMT_PMV_LOGIC_OUTS11",
"CMT_PMV_WW4B2",
"CMT_PMV_EE2A3",
"CMT_PMV_SW2A1",
"CMT_PMV_FAN3",
"CMT_PMV_SE4C2",
"CMT_PMV_IMUX47",
"CMT_PMV_SE4BEG1",
"CMT_PMV_LOGIC_OUTS17"
],
"sites": [],
"pips": {},
"tile_type": "CMT_PMV_L"
"wires": [
"CMT_PMV_IMUX16",
"CMT_PMV_LOGIC_OUTS17",
"CMT_PMV_LOGIC_OUTS10",
"CMT_PMV_IMUX29",
"CMT_PMV_BYP1",
"CMT_PMV_BYP0",
"L_TERM_INT_PHASER_TO_IO_ICLKDIV",
"CMT_PMV_LOGIC_OUTS7",
"CMT_PMV_IMUX45",
"CMT_PMV_LOGIC_OUTS13",
"CMT_PMV_SW2A0",
"CMT_PMV_LOGIC_OUTS11",
"CMT_PMV_WW4C3",
"CMT_PMV_NW2A3",
"CMT_PMV_NE4BEG2",
"CMT_PMV_SW4A3",
"CMT_PMV_EE4C1",
"CMT_PMV_EE4B2",
"CMT_PMV_IMUX39",
"CMT_PMV_SW2A1",
"CMT_PMV_LOGIC_OUTS21",
"CMT_PMV_WW2END3",
"CMT_PMV_IMUX22",
"CMT_PMV_LH5",
"CMT_PMV_IMUX40",
"CMT_PMV_SW4A2",
"CMT_PMV_WW4A3",
"CMT_PMV_NW2A0",
"CMT_PMV_SE4C2",
"CMT_PMV_NW4END0",
"CMT_PMV_LH9",
"CMT_PMV_LOGIC_OUTS1",
"CMT_PMV_EE4A2",
"CMT_PMV_SE2A2",
"CMT_PMV_ER1BEG1",
"CMT_PMV_NW4A2",
"CMT_PMV_SE4C0",
"CMT_PMV_ER1BEG2",
"CMT_PMV_NW4A3",
"CMT_PMV_NW4END3",
"CMT_PMV_WW4B1",
"CMT_PMV_EE2BEG1",
"CMT_PMV_EE4BEG1",
"CMT_PMV_WL1END0",
"CMT_PMV_SE4BEG0",
"CMT_PMV_SW4A1",
"CMT_PMV_IMUX7",
"CMT_PMV_SW4END0",
"CMT_PMV_EE4C3",
"CMT_PMV_IMUX43",
"CMT_PMV_NW2A1",
"CMT_PMV_IMUX8",
"CMT_PMV_IMUX19",
"CMT_PMV_LH1",
"CMT_PMV_IMUX1",
"CMT_PMV_WR1END3",
"CMT_PMV_IMUX12",
"CMT_PMV_SE4BEG2",
"CMT_PMV_LH12",
"CMT_PMV_IMUX10",
"CMT_PMV_LOGIC_OUTS12",
"CMT_PMV_WW4B0",
"CMT_PMV_SE2A1",
"CMT_PMV_IMUX21",
"CMT_PMV_IMUX25",
"CMT_PMV_EE4BEG2",
"CMT_PMV_LOGIC_OUTS16",
"CMT_PMV_LOGIC_OUTS19",
"CMT_PMV_FAN4",
"CMT_PMV_SW2A3",
"L_TERM_INT_PHASER_TO_IO_OCLK1X_90",
"CMT_PMV_LH10",
"CMT_PMV_CTRL0",
"CMT_PMV_IMUX20",
"CMT_PMV_WW4B3",
"CMT_PMV_IMUX4",
"CMT_PMV_NE2A2",
"CMT_PMV_LOGIC_OUTS5",
"CMT_PMV_MONITOR_P",
"CMT_PMV_CLK0",
"CMT_PMV_LOGIC_OUTS14",
"CMT_PMV_EE4B0",
"CMT_PMV_WW4A2",
"CMT_PMV_WW4END3",
"CMT_PMV_LOGIC_OUTS23",
"CMT_PMV_IMUX32",
"CMT_PMV_IMUX42",
"CMT_PMV_LH4",
"CMT_PMV_LOGIC_OUTS2",
"CMT_PMV_LH8",
"CMT_PMV_SE4BEG1",
"CMT_PMV_IMUX27",
"CMT_PMV_LH2",
"CMT_PMV_BYP3",
"CMT_PMV_WW4B2",
"CMT_PMV_FAN3",
"CMT_PMV_FAN6",
"CMT_PMV_EE4B3",
"CMT_PMV_WW4C2",
"CMT_PMV_ER1BEG0",
"CMT_PMV_SE4C1",
"CMT_PMV_FAN7",
"CMT_PMV_MONITOR_N",
"CMT_PMV_WW2A0",
"CMT_PMV_EE4A1",
"CMT_PMV_BYP5",
"CMT_PMV_IMUX28",
"CMT_PMV_IMUX15",
"CMT_PMV_WW2A1",
"CMT_PMV_WW4A0",
"CMT_PMV_CTRL1",
"CMT_PMV_IMUX3",
"CMT_PMV_CLK1",
"CMT_PMV_EE2A2",
"CMT_PMV_WW2END2",
"CMT_PMV_NE4C1",
"CMT_PMV_NE2A3",
"CMT_PMV_NE2A1",
"CMT_PMV_IMUX37",
"CMT_PMV_EE2BEG3",
"CMT_PMV_LOGIC_OUTS6",
"CMT_PMV_LOGIC_OUTS9",
"CMT_PMV_LOGIC_OUTS4",
"CMT_PMV_NE4BEG3",
"CMT_PMV_WR1END0",
"CMT_PMV_BYP6",
"CMT_PMV_FAN0",
"CMT_PMV_IMUX6",
"CMT_PMV_WW4C1",
"CMT_PMV_NW2A2",
"CMT_PMV_SW2A2",
"CMT_PMV_IMUX36",
"CMT_PMV_SW4A0",
"CMT_PMV_IMUX35",
"CMT_PMV_FAN1",
"CMT_PMV_IMUX11",
"CMT_PMV_EE4BEG0",
"CMT_PMV_EE2A3",
"CMT_PMV_WW4C0",
"CMT_PMV_NE4BEG1",
"CMT_PMV_NW4END1",
"CMT_PMV_IMUX38",
"CMT_PMV_EE4A0",
"CMT_PMV_NW4A0",
"CMT_PMV_BYP4",
"CMT_PMV_NW4END2",
"CMT_PMV_EE2A1",
"CMT_PMV_WW4END0",
"CMT_PMV_WW4END2",
"CMT_PMV_WL1END2",
"CMT_PMV_SE4C3",
"CMT_PMV_IMUX13",
"CMT_PMV_WW2A2",
"CMT_PMV_LOGIC_OUTS8",
"CMT_PMV_EE4C2",
"CMT_PMV_EL1BEG1",
"CMT_PMV_LOGIC_OUTS0",
"CMT_PMV_SW4END3",
"CMT_PMV_IMUX2",
"CMT_PMV_IMUX14",
"CMT_PMV_EL1BEG0",
"CMT_PMV_IMUX0",
"L_TERM_INT_PHASER_TO_IO_OCLKDIV",
"CMT_PMV_EE2BEG2",
"CMT_PMV_IMUX47",
"CMT_PMV_EE4BEG3",
"CMT_PMV_IMUX34",
"CMT_PMV_IMUX46",
"CMT_PMV_WW4A1",
"CMT_PMV_LOGIC_OUTS18",
"CMT_PMV_WW2END1",
"CMT_PMV_SE2A0",
"CMT_PMV_WW4END1",
"CMT_PMV_IMUX26",
"CMT_PMV_NE4C3",
"CMT_PMV_IMUX33",
"CMT_PMV_EE4A3",
"L_TERM_INT_PHASER_TO_IO_OCLK",
"CMT_PMV_LH3",
"CMT_PMV_WR1END2",
"CMT_PMV_EE2BEG0",
"CMT_PMV_BYP2",
"CMT_PMV_NE4C0",
"CMT_PMV_BYP7",
"CMT_PMV_EE2A0",
"CMT_PMV_WW2END0",
"CMT_PMV_SW4END1",
"CMT_PMV_NW4A1",
"CMT_PMV_EE4B1",
"CMT_PMV_ER1BEG3",
"CMT_PMV_LH7",
"CMT_PMV_NE4C2",
"CMT_PMV_SW4END2",
"CMT_PMV_IMUX31",
"CMT_PMV_IMUX24",
"CMT_PMV_FAN5",
"CMT_PMV_LOGIC_OUTS22",
"CMT_PMV_IMUX23",
"CMT_PMV_FAN2",
"CMT_PMV_LOGIC_OUTS3",
"CMT_PMV_LOGIC_OUTS15",
"CMT_PMV_EL1BEG2",
"CMT_PMV_LOGIC_OUTS20",
"CMT_PMV_WW2A3",
"CMT_PMV_WL1END1",
"CMT_PMV_EL1BEG3",
"CMT_PMV_IMUX5",
"CMT_PMV_IMUX9",
"CMT_PMV_LH6",
"CMT_PMV_WL1END3",
"CMT_PMV_LH11",
"CMT_PMV_NE2A0",
"CMT_PMV_IMUX18",
"CMT_PMV_IMUX17",
"CMT_PMV_WR1END1",
"CMT_PMV_NE4BEG0",
"CMT_PMV_IMUX30",
"CMT_PMV_IMUX44",
"CMT_PMV_IMUX41",
"L_TERM_INT_PHASER_TO_IO_ICLK",
"CMT_PMV_EE4C0",
"CMT_PMV_SE2A3",
"CMT_PMV_SE4BEG3"
],
"tile_type": "CMT_PMV_L",
"sites": []
}

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artix7/tile_type_CMT_TOP_L_LOWER_T.json
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