Merge pull request #1327 from SymbiFlow/dependabot/submodules/third_party/yaml-cpp-a98b8af".
(With new xc7a100t parts.) See [Info File](Info.md) for details. Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
parent
be9ab47f83
commit
405c3bc720
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Info.md
12
Info.md
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@ -37,7 +37,7 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING).
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# Details
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Last updated on Mon 11 May 2020 11:45:04 PM UTC (2020-05-11T23:45:04+00:00).
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Last updated on Mon 11 May 2020 11:47:34 PM UTC (2020-05-11T23:47:34+00:00).
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Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [7ddd5f88](https://github.com/SymbiFlow/prjxray/commit/7ddd5f88e60c9876a6d7171b343c1c855239dc85).
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@ -504,6 +504,16 @@ Results have checksums;
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* [`626d9e188a1c4874f7ac657e82c64df8d52f819624e8ee4f9ed9e557d85ad3f2 ./artix7/timings/carry4_slicem.sdf`](./artix7/timings/carry4_slicem.sdf)
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* [`fd31d66077f869d01f13d9fabbd0dcd38b4aab0322179ecf9ac190a3b70c5456 ./artix7/timings/slicel.sdf`](./artix7/timings/slicel.sdf)
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* [`3d2da5714d8c81165fa51403fb719b3ddd9e7ea7ab79280ae4e157d11a29172e ./artix7/timings/slicem.sdf`](./artix7/timings/slicem.sdf)
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* [`3f202fefbd0f36761f08eb58737a42754c65c965968174421df0374198e31daa ./artix7/xc7a100tcsg324-1/package_pins.csv`](./artix7/xc7a100tcsg324-1/package_pins.csv)
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* [`277906907e43846ac8a52115983cd0ece673b2310d8d10c9b2253d6537bf1a02 ./artix7/xc7a100tcsg324-1/part.json`](./artix7/xc7a100tcsg324-1/part.json)
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* [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92 ./artix7/xc7a100tcsg324-1/part.yaml`](./artix7/xc7a100tcsg324-1/part.yaml)
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* [`9cf701615e6f9ed6e89d86738f10ebb9d5bf1a233f1e3251315b2f9159f73391 ./artix7/xc7a100tcsg324-1/tileconn.json`](./artix7/xc7a100tcsg324-1/tileconn.json)
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* [`58d35b8327cb31c6db0333149f48a833956d9e03738ff31a8e47aa426fbe545f ./artix7/xc7a100tcsg324-1/tilegrid.json`](./artix7/xc7a100tcsg324-1/tilegrid.json)
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* [`bf25d62e58330960eb582f0b3b99196bd59df046db0d7de5330634b64cd397ad ./artix7/xc7a100tfgg676-1/package_pins.csv`](./artix7/xc7a100tfgg676-1/package_pins.csv)
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* [`78909bda2084de19e6095258ab1b1ad549c2db376abdd8699235a7bdc3aa19fb ./artix7/xc7a100tfgg676-1/part.json`](./artix7/xc7a100tfgg676-1/part.json)
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* [`4e1f153303270ed3727ca40af3179020f74271ff63c4d771556020b1d3037b92 ./artix7/xc7a100tfgg676-1/part.yaml`](./artix7/xc7a100tfgg676-1/part.yaml)
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* [`9cf701615e6f9ed6e89d86738f10ebb9d5bf1a233f1e3251315b2f9159f73391 ./artix7/xc7a100tfgg676-1/tileconn.json`](./artix7/xc7a100tfgg676-1/tileconn.json)
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* [`58d35b8327cb31c6db0333149f48a833956d9e03738ff31a8e47aa426fbe545f ./artix7/xc7a100tfgg676-1/tilegrid.json`](./artix7/xc7a100tfgg676-1/tilegrid.json)
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* [`72dd638f5c8f6c36e74765915c01b2fa28e3c28b2c0afd91871ab7b0490a14f3 ./artix7/xc7a200tffg1156-1/package_pins.csv`](./artix7/xc7a200tffg1156-1/package_pins.csv)
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* [`fe44ca57c10c7b804357ded2cdea392c008b7b4d5a82ad917fa3148a756e4e42 ./artix7/xc7a200tffg1156-1/part.json`](./artix7/xc7a200tffg1156-1/part.json)
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* [`a3d493aef436b9978b2ed1c98c4e1364ab9eb096f824e19acd7cce3f7d920e97 ./artix7/xc7a200tffg1156-1/part.yaml`](./artix7/xc7a200tffg1156-1/part.yaml)
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@ -0,0 +1,213 @@
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pin,bank,site,tile,pin_function
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A1,35,IOB_X1Y131,RIOB33_X57Y131,IO_L9N_T1_DQS_AD7N_35
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A3,35,IOB_X1Y133,RIOB33_X57Y133,IO_L8N_T1_AD14N_35
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A4,35,IOB_X1Y134,RIOB33_X57Y133,IO_L8P_T1_AD14P_35
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A5,35,IOB_X1Y143,RIOB33_X57Y143,IO_L3N_T0_DQS_AD5N_35
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A6,35,IOB_X1Y144,RIOB33_X57Y143,IO_L3P_T0_DQS_AD5P_35
|
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A8,16,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_16
|
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A9,16,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_16
|
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A10,16,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_16
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A11,15,IOB_X0Y141,LIOB33_X0Y141,IO_L4N_T0_15
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A13,15,IOB_X0Y132,LIOB33_X0Y131,IO_L9P_T1_DQS_AD3P_15
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A14,15,IOB_X0Y131,LIOB33_X0Y131,IO_L9N_T1_DQS_AD3N_15
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A15,15,IOB_X0Y134,LIOB33_X0Y133,IO_L8P_T1_AD10P_15
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||||
A16,15,IOB_X0Y133,LIOB33_X0Y133,IO_L8N_T1_AD10N_15
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||||
A18,15,IOB_X0Y129,LIOB33_X0Y129,IO_L10N_T1_AD11N_15
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B1,35,IOB_X1Y132,RIOB33_X57Y131,IO_L9P_T1_DQS_AD7P_35
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B2,35,IOB_X1Y129,RIOB33_X57Y129,IO_L10N_T1_AD15N_35
|
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B3,35,IOB_X1Y130,RIOB33_X57Y129,IO_L10P_T1_AD15P_35
|
||||
B4,35,IOB_X1Y135,RIOB33_X57Y135,IO_L7N_T1_AD6N_35
|
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B6,35,IOB_X1Y145,RIOB33_X57Y145,IO_L2N_T0_AD12N_35
|
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B7,35,IOB_X1Y146,RIOB33_X57Y145,IO_L2P_T0_AD12P_35
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||||
B8,16,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_16
|
||||
B9,16,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_16
|
||||
B11,15,IOB_X0Y142,LIOB33_X0Y141,IO_L4P_T0_15
|
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B12,15,IOB_X0Y143,LIOB33_X0Y143,IO_L3N_T0_DQS_AD1N_15
|
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B13,15,IOB_X0Y146,LIOB33_X0Y145,IO_L2P_T0_AD8P_15
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B14,15,IOB_X0Y145,LIOB33_X0Y145,IO_L2N_T0_AD8N_15
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B16,15,IOB_X0Y136,LIOB33_X0Y135,IO_L7P_T1_AD2P_15
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B17,15,IOB_X0Y135,LIOB33_X0Y135,IO_L7N_T1_AD2N_15
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B18,15,IOB_X0Y130,LIOB33_X0Y129,IO_L10P_T1_AD11P_15
|
||||
C1,35,IOB_X1Y117,RIOB33_X57Y117,IO_L16N_T2_35
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C2,35,IOB_X1Y118,RIOB33_X57Y117,IO_L16P_T2_35
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C4,35,IOB_X1Y136,RIOB33_X57Y135,IO_L7P_T1_AD6P_35
|
||||
C5,35,IOB_X1Y147,RIOB33_X57Y147,IO_L1N_T0_AD4N_35
|
||||
C6,35,IOB_X1Y148,RIOB33_X57Y147,IO_L1P_T0_AD4P_35
|
||||
C7,35,IOB_X1Y141,RIOB33_X57Y141,IO_L4N_T0_35
|
||||
C9,16,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_16
|
||||
C10,16,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_16
|
||||
C11,16,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_16
|
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C12,15,IOB_X0Y144,LIOB33_X0Y143,IO_L3P_T0_DQS_AD1P_15
|
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C14,15,IOB_X0Y147,LIOB33_X0Y147,IO_L1N_T0_AD0N_15
|
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C15,15,IOB_X0Y125,LIOB33_X0Y125,IO_L12N_T1_MRCC_15
|
||||
C16,15,IOB_X0Y110,LIOB33_X0Y109,IO_L20P_T3_A20_15
|
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C17,15,IOB_X0Y109,LIOB33_X0Y109,IO_L20N_T3_A19_15
|
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D2,35,IOB_X1Y121,RIOB33_X57Y121,IO_L14N_T2_SRCC_35
|
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D3,35,IOB_X1Y125,RIOB33_X57Y125,IO_L12N_T1_MRCC_35
|
||||
D4,35,IOB_X1Y127,RIOB33_X57Y127,IO_L11N_T1_SRCC_35
|
||||
D5,35,IOB_X1Y128,RIOB33_X57Y127,IO_L11P_T1_SRCC_35
|
||||
D7,35,IOB_X1Y137,RIOB33_X57Y137,IO_L6N_T0_VREF_35
|
||||
D8,35,IOB_X1Y142,RIOB33_X57Y141,IO_L4P_T0_35
|
||||
D9,16,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_16
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||||
D10,16,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_16
|
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D12,15,IOB_X0Y138,LIOB33_X0Y137,IO_L6P_T0_15
|
||||
D13,15,IOB_X0Y137,LIOB33_X0Y137,IO_L6N_T0_VREF_15
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||||
D14,15,IOB_X0Y148,LIOB33_X0Y147,IO_L1P_T0_AD0P_15
|
||||
D15,15,IOB_X0Y126,LIOB33_X0Y125,IO_L12P_T1_MRCC_15
|
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D17,15,IOB_X0Y117,LIOB33_X0Y117,IO_L16N_T2_A27_15
|
||||
D18,15,IOB_X0Y107,LIOB33_X0Y107,IO_L21N_T3_DQS_A18_15
|
||||
E1,35,IOB_X1Y113,RIOB33_X57Y113,IO_L18N_T2_35
|
||||
E2,35,IOB_X1Y122,RIOB33_X57Y121,IO_L14P_T2_SRCC_35
|
||||
E3,35,IOB_X1Y126,RIOB33_X57Y125,IO_L12P_T1_MRCC_35
|
||||
E5,35,IOB_X1Y139,RIOB33_X57Y139,IO_L5N_T0_AD13N_35
|
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E6,35,IOB_X1Y140,RIOB33_X57Y139,IO_L5P_T0_AD13P_35
|
||||
E7,35,IOB_X1Y138,RIOB33_X57Y137,IO_L6P_T0_35
|
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E15,15,IOB_X0Y128,LIOB33_X0Y127,IO_L11P_T1_SRCC_15
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||||
E16,15,IOB_X0Y127,LIOB33_X0Y127,IO_L11N_T1_SRCC_15
|
||||
E17,15,IOB_X0Y118,LIOB33_X0Y117,IO_L16P_T2_A28_15
|
||||
E18,15,IOB_X0Y108,LIOB33_X0Y107,IO_L21P_T3_DQS_15
|
||||
F1,35,IOB_X1Y114,RIOB33_X57Y113,IO_L18P_T2_35
|
||||
F3,35,IOB_X1Y123,RIOB33_X57Y123,IO_L13N_T2_MRCC_35
|
||||
F4,35,IOB_X1Y124,RIOB33_X57Y123,IO_L13P_T2_MRCC_35
|
||||
F5,35,IOB_X1Y149,RIOB33_SING_X57Y149,IO_0_35
|
||||
F6,35,IOB_X1Y111,RIOB33_X57Y111,IO_L19N_T3_VREF_35
|
||||
F13,15,IOB_X0Y140,LIOB33_X0Y139,IO_L5P_T0_AD9P_15
|
||||
F14,15,IOB_X0Y139,LIOB33_X0Y139,IO_L5N_T0_AD9N_15
|
||||
F15,15,IOB_X0Y122,LIOB33_X0Y121,IO_L14P_T2_SRCC_15
|
||||
F16,15,IOB_X0Y121,LIOB33_X0Y121,IO_L14N_T2_SRCC_15
|
||||
F18,15,IOB_X0Y105,LIOB33_X0Y105,IO_L22N_T3_A16_15
|
||||
G1,35,IOB_X1Y115,RIOB33_X57Y115,IO_L17N_T2_35
|
||||
G2,35,IOB_X1Y119,RIOB33_X57Y119,IO_L15N_T2_DQS_35
|
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G3,35,IOB_X1Y109,RIOB33_X57Y109,IO_L20N_T3_35
|
||||
G4,35,IOB_X1Y110,RIOB33_X57Y109,IO_L20P_T3_35
|
||||
G6,35,IOB_X1Y112,RIOB33_X57Y111,IO_L19P_T3_35
|
||||
G13,15,IOB_X0Y149,LIOB33_SING_X0Y149,IO_0_15
|
||||
G14,15,IOB_X0Y119,LIOB33_X0Y119,IO_L15N_T2_DQS_ADV_B_15
|
||||
G16,15,IOB_X0Y123,LIOB33_X0Y123,IO_L13N_T2_MRCC_15
|
||||
G17,15,IOB_X0Y113,LIOB33_X0Y113,IO_L18N_T2_A23_15
|
||||
G18,15,IOB_X0Y106,LIOB33_X0Y105,IO_L22P_T3_A17_15
|
||||
H1,35,IOB_X1Y116,RIOB33_X57Y115,IO_L17P_T2_35
|
||||
H2,35,IOB_X1Y120,RIOB33_X57Y119,IO_L15P_T2_DQS_35
|
||||
H4,35,IOB_X1Y107,RIOB33_X57Y107,IO_L21N_T3_DQS_35
|
||||
H5,35,IOB_X1Y101,RIOB33_X57Y101,IO_L24N_T3_35
|
||||
H6,35,IOB_X1Y102,RIOB33_X57Y101,IO_L24P_T3_35
|
||||
H14,15,IOB_X0Y120,LIOB33_X0Y119,IO_L15P_T2_DQS_15
|
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H15,15,IOB_X0Y111,LIOB33_X0Y111,IO_L19N_T3_A21_VREF_15
|
||||
H16,15,IOB_X0Y124,LIOB33_X0Y123,IO_L13P_T2_MRCC_15
|
||||
H17,15,IOB_X0Y114,LIOB33_X0Y113,IO_L18P_T2_A24_15
|
||||
J2,35,IOB_X1Y105,RIOB33_X57Y105,IO_L22N_T3_35
|
||||
J3,35,IOB_X1Y106,RIOB33_X57Y105,IO_L22P_T3_35
|
||||
J4,35,IOB_X1Y108,RIOB33_X57Y107,IO_L21P_T3_DQS_35
|
||||
J5,35,IOB_X1Y100,RIOB33_SING_X57Y100,IO_25_35
|
||||
J10,0,IPAD_X0Y30,MONITOR_BOT_X46Y131,VP_0
|
||||
J13,15,IOB_X0Y115,LIOB33_X0Y115,IO_L17N_T2_A25_15
|
||||
J14,15,IOB_X0Y112,LIOB33_X0Y111,IO_L19P_T3_A22_15
|
||||
J15,15,IOB_X0Y101,LIOB33_X0Y101,IO_L24N_T3_RS0_15
|
||||
J17,15,IOB_X0Y104,LIOB33_X0Y103,IO_L23P_T3_FOE_B_15
|
||||
J18,15,IOB_X0Y103,LIOB33_X0Y103,IO_L23N_T3_FWE_B_15
|
||||
K1,35,IOB_X1Y103,RIOB33_X57Y103,IO_L23N_T3_35
|
||||
K2,35,IOB_X1Y104,RIOB33_X57Y103,IO_L23P_T3_35
|
||||
K3,34,IOB_X1Y96,RIOB33_X57Y95,IO_L2P_T0_34
|
||||
K5,34,IOB_X1Y90,RIOB33_X57Y89,IO_L5P_T0_34
|
||||
K6,34,IOB_X1Y99,RIOB33_SING_X57Y99,IO_0_34
|
||||
K9,0,IPAD_X0Y31,MONITOR_BOT_X46Y131,VN_0
|
||||
K13,15,IOB_X0Y116,LIOB33_X0Y115,IO_L17P_T2_A26_15
|
||||
K15,15,IOB_X0Y102,LIOB33_X0Y101,IO_L24P_T3_RS1_15
|
||||
K16,15,IOB_X0Y100,LIOB33_SING_X0Y100,IO_25_15
|
||||
K17,14,IOB_X0Y98,LIOB33_X0Y97,IO_L1P_T0_D00_MOSI_14
|
||||
K18,14,IOB_X0Y97,LIOB33_X0Y97,IO_L1N_T0_D01_DIN_14
|
||||
L1,34,IOB_X1Y98,RIOB33_X57Y97,IO_L1P_T0_34
|
||||
L3,34,IOB_X1Y95,RIOB33_X57Y95,IO_L2N_T0_34
|
||||
L4,34,IOB_X1Y89,RIOB33_X57Y89,IO_L5N_T0_34
|
||||
L5,34,IOB_X1Y87,RIOB33_X57Y87,IO_L6N_T0_VREF_34
|
||||
L6,34,IOB_X1Y88,RIOB33_X57Y87,IO_L6P_T0_34
|
||||
L13,14,IOB_X0Y88,LIOB33_X0Y87,IO_L6P_T0_FCS_B_14
|
||||
L14,14,IOB_X0Y96,LIOB33_X0Y95,IO_L2P_T0_D02_14
|
||||
L15,14,IOB_X0Y94,LIOB33_X0Y93,IO_L3P_T0_DQS_PUDC_B_14
|
||||
L16,14,IOB_X0Y93,LIOB33_X0Y93,IO_L3N_T0_DQS_EMCCLK_14
|
||||
L18,14,IOB_X0Y92,LIOB33_X0Y91,IO_L4P_T0_D04_14
|
||||
M1,34,IOB_X1Y97,RIOB33_X57Y97,IO_L1N_T0_34
|
||||
M2,34,IOB_X1Y91,RIOB33_X57Y91,IO_L4N_T0_34
|
||||
M3,34,IOB_X1Y92,RIOB33_X57Y91,IO_L4P_T0_34
|
||||
M4,34,IOB_X1Y68,RIOB33_X57Y67,IO_L16P_T2_34
|
||||
M6,34,IOB_X1Y64,RIOB33_X57Y63,IO_L18P_T2_34
|
||||
M13,14,IOB_X0Y87,LIOB33_X0Y87,IO_L6N_T0_D08_VREF_14
|
||||
M14,14,IOB_X0Y95,LIOB33_X0Y95,IO_L2N_T0_D03_14
|
||||
M16,14,IOB_X0Y80,LIOB33_X0Y79,IO_L10P_T1_D14_14
|
||||
M17,14,IOB_X0Y79,LIOB33_X0Y79,IO_L10N_T1_D15_14
|
||||
M18,14,IOB_X0Y91,LIOB33_X0Y91,IO_L4N_T0_D05_14
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||||
N1,34,IOB_X1Y93,RIOB33_X57Y93,IO_L3N_T0_DQS_34
|
||||
N2,34,IOB_X1Y94,RIOB33_X57Y93,IO_L3P_T0_DQS_34
|
||||
N4,34,IOB_X1Y67,RIOB33_X57Y67,IO_L16N_T2_34
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||||
N5,34,IOB_X1Y74,RIOB33_X57Y73,IO_L13P_T2_MRCC_34
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||||
N6,34,IOB_X1Y63,RIOB33_X57Y63,IO_L18N_T2_34
|
||||
N14,14,IOB_X0Y84,LIOB33_X0Y83,IO_L8P_T1_D11_14
|
||||
N15,14,IOB_X0Y78,LIOB33_X0Y77,IO_L11P_T1_SRCC_14
|
||||
N16,14,IOB_X0Y77,LIOB33_X0Y77,IO_L11N_T1_SRCC_14
|
||||
N17,14,IOB_X0Y82,LIOB33_X0Y81,IO_L9P_T1_DQS_14
|
||||
P2,34,IOB_X1Y70,RIOB33_X57Y69,IO_L15P_T2_DQS_34
|
||||
P3,34,IOB_X1Y71,RIOB33_X57Y71,IO_L14N_T2_SRCC_34
|
||||
P4,34,IOB_X1Y72,RIOB33_X57Y71,IO_L14P_T2_SRCC_34
|
||||
P5,34,IOB_X1Y73,RIOB33_X57Y73,IO_L13N_T2_MRCC_34
|
||||
P14,14,IOB_X0Y83,LIOB33_X0Y83,IO_L8N_T1_D12_14
|
||||
P15,14,IOB_X0Y74,LIOB33_X0Y73,IO_L13P_T2_MRCC_14
|
||||
P17,14,IOB_X0Y76,LIOB33_X0Y75,IO_L12P_T1_MRCC_14
|
||||
P18,14,IOB_X0Y81,LIOB33_X0Y81,IO_L9N_T1_DQS_D13_14
|
||||
R1,34,IOB_X1Y66,RIOB33_X57Y65,IO_L17P_T2_34
|
||||
R2,34,IOB_X1Y69,RIOB33_X57Y69,IO_L15N_T2_DQS_34
|
||||
R3,34,IOB_X1Y78,RIOB33_X57Y77,IO_L11P_T1_SRCC_34
|
||||
R5,34,IOB_X1Y61,RIOB33_X57Y61,IO_L19N_T3_VREF_34
|
||||
R6,34,IOB_X1Y62,RIOB33_X57Y61,IO_L19P_T3_34
|
||||
R7,34,IOB_X1Y54,RIOB33_X57Y53,IO_L23P_T3_34
|
||||
R8,34,IOB_X1Y52,RIOB33_X57Y51,IO_L24P_T3_34
|
||||
R10,14,IOB_X0Y50,LIOB33_SING_X0Y50,IO_25_14
|
||||
R11,14,IOB_X0Y99,LIOB33_SING_X0Y99,IO_0_14
|
||||
R12,14,IOB_X0Y90,LIOB33_X0Y89,IO_L5P_T0_D06_14
|
||||
R13,14,IOB_X0Y89,LIOB33_X0Y89,IO_L5N_T0_D07_14
|
||||
R15,14,IOB_X0Y73,LIOB33_X0Y73,IO_L13N_T2_MRCC_14
|
||||
R16,14,IOB_X0Y70,LIOB33_X0Y69,IO_L15P_T2_DQS_RDWR_B_14
|
||||
R17,14,IOB_X0Y75,LIOB33_X0Y75,IO_L12N_T1_MRCC_14
|
||||
R18,14,IOB_X0Y86,LIOB33_X0Y85,IO_L7P_T1_D09_14
|
||||
T1,34,IOB_X1Y65,RIOB33_X57Y65,IO_L17N_T2_34
|
||||
T3,34,IOB_X1Y77,RIOB33_X57Y77,IO_L11N_T1_SRCC_34
|
||||
T4,34,IOB_X1Y75,RIOB33_X57Y75,IO_L12N_T1_MRCC_34
|
||||
T5,34,IOB_X1Y76,RIOB33_X57Y75,IO_L12P_T1_MRCC_34
|
||||
T6,34,IOB_X1Y53,RIOB33_X57Y53,IO_L23N_T3_34
|
||||
T8,34,IOB_X1Y51,RIOB33_X57Y51,IO_L24N_T3_34
|
||||
T9,14,IOB_X0Y52,LIOB33_X0Y51,IO_L24P_T3_A01_D17_14
|
||||
T10,14,IOB_X0Y51,LIOB33_X0Y51,IO_L24N_T3_A00_D16_14
|
||||
T11,14,IOB_X0Y62,LIOB33_X0Y61,IO_L19P_T3_A10_D26_14
|
||||
T13,14,IOB_X0Y54,LIOB33_X0Y53,IO_L23P_T3_A03_D19_14
|
||||
T14,14,IOB_X0Y72,LIOB33_X0Y71,IO_L14P_T2_SRCC_14
|
||||
T15,14,IOB_X0Y71,LIOB33_X0Y71,IO_L14N_T2_SRCC_14
|
||||
T16,14,IOB_X0Y69,LIOB33_X0Y69,IO_L15N_T2_DQS_DOUT_CSO_B_14
|
||||
T18,14,IOB_X0Y85,LIOB33_X0Y85,IO_L7N_T1_D10_14
|
||||
U1,34,IOB_X1Y86,RIOB33_X57Y85,IO_L7P_T1_34
|
||||
U2,34,IOB_X1Y82,RIOB33_X57Y81,IO_L9P_T1_DQS_34
|
||||
U3,34,IOB_X1Y83,RIOB33_X57Y83,IO_L8N_T1_34
|
||||
U4,34,IOB_X1Y84,RIOB33_X57Y83,IO_L8P_T1_34
|
||||
U6,34,IOB_X1Y55,RIOB33_X57Y55,IO_L22N_T3_34
|
||||
U7,34,IOB_X1Y56,RIOB33_X57Y55,IO_L22P_T3_34
|
||||
U8,34,IOB_X1Y50,RIOB33_SING_X57Y50,IO_25_34
|
||||
U9,34,IOB_X1Y58,RIOB33_X57Y57,IO_L21P_T3_DQS_34
|
||||
U11,14,IOB_X0Y61,LIOB33_X0Y61,IO_L19N_T3_A09_D25_VREF_14
|
||||
U12,14,IOB_X0Y60,LIOB33_X0Y59,IO_L20P_T3_A08_D24_14
|
||||
U13,14,IOB_X0Y53,LIOB33_X0Y53,IO_L23N_T3_A02_D18_14
|
||||
U14,14,IOB_X0Y56,LIOB33_X0Y55,IO_L22P_T3_A05_D21_14
|
||||
U16,14,IOB_X0Y64,LIOB33_X0Y63,IO_L18P_T2_A12_D28_14
|
||||
U17,14,IOB_X0Y66,LIOB33_X0Y65,IO_L17P_T2_A14_D30_14
|
||||
U18,14,IOB_X0Y65,LIOB33_X0Y65,IO_L17N_T2_A13_D29_14
|
||||
V1,34,IOB_X1Y85,RIOB33_X57Y85,IO_L7N_T1_34
|
||||
V2,34,IOB_X1Y81,RIOB33_X57Y81,IO_L9N_T1_DQS_34
|
||||
V4,34,IOB_X1Y79,RIOB33_X57Y79,IO_L10N_T1_34
|
||||
V5,34,IOB_X1Y80,RIOB33_X57Y79,IO_L10P_T1_34
|
||||
V6,34,IOB_X1Y59,RIOB33_X57Y59,IO_L20N_T3_34
|
||||
V7,34,IOB_X1Y60,RIOB33_X57Y59,IO_L20P_T3_34
|
||||
V9,34,IOB_X1Y57,RIOB33_X57Y57,IO_L21N_T3_DQS_34
|
||||
V10,14,IOB_X0Y58,LIOB33_X0Y57,IO_L21P_T3_DQS_14
|
||||
V11,14,IOB_X0Y57,LIOB33_X0Y57,IO_L21N_T3_DQS_A06_D22_14
|
||||
V12,14,IOB_X0Y59,LIOB33_X0Y59,IO_L20N_T3_A07_D23_14
|
||||
V14,14,IOB_X0Y55,LIOB33_X0Y55,IO_L22N_T3_A04_D20_14
|
||||
V15,14,IOB_X0Y68,LIOB33_X0Y67,IO_L16P_T2_CSI_B_14
|
||||
V16,14,IOB_X0Y67,LIOB33_X0Y67,IO_L16N_T2_A15_D31_14
|
||||
V17,14,IOB_X0Y63,LIOB33_X0Y63,IO_L18N_T2_A11_D27_14
|
||||
|
|
|
@ -0,0 +1,771 @@
|
|||
{
|
||||
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|
||||
"bottom": {
|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
}
|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
"frame_count": 36
|
||||
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|
||||
"4": {
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||||
"frame_count": 36
|
||||
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|
||||
"5": {
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||||
"frame_count": 36
|
||||
},
|
||||
"6": {
|
||||
"frame_count": 28
|
||||
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|
||||
"7": {
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||||
"frame_count": 36
|
||||
},
|
||||
"8": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"9": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"10": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"11": {
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||||
"frame_count": 36
|
||||
},
|
||||
"12": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"13": {
|
||||
"frame_count": 36
|
||||
},
|
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"14": {
|
||||
"frame_count": 36
|
||||
},
|
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"15": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"16": {
|
||||
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|
||||
},
|
||||
"17": {
|
||||
"frame_count": 36
|
||||
},
|
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"18": {
|
||||
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|
||||
},
|
||||
"19": {
|
||||
"frame_count": 36
|
||||
},
|
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"20": {
|
||||
"frame_count": 36
|
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},
|
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"21": {
|
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"frame_count": 36
|
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},
|
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"22": {
|
||||
"frame_count": 36
|
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},
|
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"23": {
|
||||
"frame_count": 36
|
||||
},
|
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"24": {
|
||||
"frame_count": 36
|
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},
|
||||
"25": {
|
||||
"frame_count": 36
|
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},
|
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"26": {
|
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"frame_count": 36
|
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},
|
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"27": {
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"frame_count": 36
|
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},
|
||||
"28": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"29": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"30": {
|
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"frame_count": 36
|
||||
},
|
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"31": {
|
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"frame_count": 30
|
||||
},
|
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"32": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"33": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"34": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"35": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"36": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"37": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"38": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"39": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"40": {
|
||||
"frame_count": 36
|
||||
},
|
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"41": {
|
||||
"frame_count": 36
|
||||
},
|
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"42": {
|
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"frame_count": 36
|
||||
},
|
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|
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|
||||
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|
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"44": {
|
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|
||||
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|
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"45": {
|
||||
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|
||||
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|
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"46": {
|
||||
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|
||||
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|
||||
"47": {
|
||||
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|
||||
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|
||||
"48": {
|
||||
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|
||||
},
|
||||
"49": {
|
||||
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|
||||
},
|
||||
"50": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"51": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"52": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"53": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"54": {
|
||||
"frame_count": 36
|
||||
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|
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"55": {
|
||||
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|
||||
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|
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|
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|
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|
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"57": {
|
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|
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|
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}
|
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}
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}
|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
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|
||||
}
|
||||
}
|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"13": {
|
||||
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|
||||
},
|
||||
"14": {
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"26": {
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"28": {
|
||||
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|
||||
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|
||||
"29": {
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
"36": {
|
||||
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|
||||
},
|
||||
"37": {
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
"39": {
|
||||
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|
||||
},
|
||||
"40": {
|
||||
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|
||||
},
|
||||
"41": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"42": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"43": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"44": {
|
||||
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|
||||
},
|
||||
"45": {
|
||||
"frame_count": 36
|
||||
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|
||||
"46": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"47": {
|
||||
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|
||||
},
|
||||
"48": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"49": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"50": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"51": {
|
||||
"frame_count": 32
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"idcode": 56823955,
|
||||
"iobanks": {
|
||||
"0": "X1Y130",
|
||||
"14": "X1Y78",
|
||||
"15": "X1Y130",
|
||||
"16": "X1Y182",
|
||||
"34": "X146Y78",
|
||||
"35": "X146Y130"
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,499 @@
|
|||
!<xilinx/xc7series/part>
|
||||
idcode: 0x3631093
|
||||
global_clock_regions:
|
||||
top: !<xilinx/xc7series/global_clock_region>
|
||||
rows:
|
||||
0: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
52: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
53: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
54: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
55: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
56: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
57: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 32
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
bottom: !<xilinx/xc7series/global_clock_region>
|
||||
rows:
|
||||
0: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
52: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
53: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
54: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
55: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
56: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
57: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 32
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,343 @@
|
|||
pin,bank,site,tile,pin_function
|
||||
A2,35,IOB_X1Y109,RIOB33_X57Y109,IO_L20N_T3_35
|
||||
A3,35,IOB_X1Y110,RIOB33_X57Y109,IO_L20P_T3_35
|
||||
A4,35,IOB_X1Y117,RIOB33_X57Y117,IO_L16N_T2_35
|
||||
A5,35,IOB_X1Y119,RIOB33_X57Y119,IO_L15N_T2_DQS_35
|
||||
A7,216,OPAD_X0Y8,GTP_CHANNEL_0_X130Y162,MGTPTXN0_216
|
||||
A9,216,OPAD_X0Y12,GTP_CHANNEL_2_X130Y191,MGTPTXN2_216
|
||||
A11,216,IPAD_X1Y36,GTP_CHANNEL_0_X130Y162,MGTPRXN0_216
|
||||
A13,216,IPAD_X1Y54,GTP_CHANNEL_2_X130Y191,MGTPRXN2_216
|
||||
A17,16,IOB_X0Y182,LIOB33_X0Y181,IO_L9P_T1_DQS_16
|
||||
A18,16,IOB_X0Y181,LIOB33_X0Y181,IO_L9N_T1_DQS_16
|
||||
A19,16,IOB_X0Y179,LIOB33_X0Y179,IO_L10N_T1_16
|
||||
A20,16,IOB_X0Y169,LIOB33_X0Y169,IO_L15N_T2_DQS_16
|
||||
A22,16,IOB_X0Y165,LIOB33_X0Y165,IO_L17N_T2_16
|
||||
A23,16,IOB_X0Y158,LIOB33_X0Y157,IO_L21P_T3_DQS_16
|
||||
A24,16,IOB_X0Y157,LIOB33_X0Y157,IO_L21N_T3_DQS_16
|
||||
A25,16,IOB_X0Y159,LIOB33_X0Y159,IO_L20N_T3_16
|
||||
AA11,213,IPAD_X1Y10,GTP_COMMON_X130Y23,MGTREFCLK1P_213
|
||||
AA13,213,IPAD_X1Y8,GTP_COMMON_X130Y23,MGTREFCLK0P_213
|
||||
AA22,13,IOB_X0Y34,LIOB33_X0Y33,IO_L8P_T1_13
|
||||
AA23,13,IOB_X0Y33,LIOB33_X0Y33,IO_L8N_T1_13
|
||||
AA24,13,IOB_X0Y36,LIOB33_X0Y35,IO_L7P_T1_13
|
||||
AA25,13,IOB_X0Y39,LIOB33_X0Y39,IO_L5N_T0_13
|
||||
AB11,213,IPAD_X1Y11,GTP_COMMON_X130Y23,MGTREFCLK1N_213
|
||||
AB13,213,IPAD_X1Y9,GTP_COMMON_X130Y23,MGTREFCLK0N_213
|
||||
AB24,13,IOB_X0Y32,LIOB33_X0Y31,IO_L9P_T1_DQS_13
|
||||
AB25,13,IOB_X0Y35,LIOB33_X0Y35,IO_L7N_T1_13
|
||||
AB26,13,IOB_X0Y44,LIOB33_X0Y43,IO_L3P_T0_DQS_13
|
||||
AC8,213,OPAD_X0Y5,GTP_CHANNEL_2_X130Y35,MGTPTXP2_213
|
||||
AC10,213,OPAD_X0Y1,GTP_CHANNEL_0_X130Y6,MGTPTXP0_213
|
||||
AC12,213,IPAD_X1Y1,GTP_CHANNEL_0_X130Y6,MGTPRXP0_213
|
||||
AC14,213,IPAD_X1Y19,GTP_CHANNEL_2_X130Y35,MGTPRXP2_213
|
||||
AC24,13,IOB_X0Y31,LIOB33_X0Y31,IO_L9N_T1_DQS_13
|
||||
AC26,13,IOB_X0Y43,LIOB33_X0Y43,IO_L3N_T0_DQS_13
|
||||
AD8,213,OPAD_X0Y4,GTP_CHANNEL_2_X130Y35,MGTPTXN2_213
|
||||
AD10,213,OPAD_X0Y0,GTP_CHANNEL_0_X130Y6,MGTPTXN0_213
|
||||
AD12,213,IPAD_X1Y0,GTP_CHANNEL_0_X130Y6,MGTPRXN0_213
|
||||
AD14,213,IPAD_X1Y18,GTP_CHANNEL_2_X130Y35,MGTPRXN2_213
|
||||
AE7,213,OPAD_X0Y7,GTP_CHANNEL_3_X130Y46,MGTPTXP3_213
|
||||
AE9,213,OPAD_X0Y3,GTP_CHANNEL_1_X130Y17,MGTPTXP1_213
|
||||
AE11,213,IPAD_X1Y25,GTP_CHANNEL_3_X130Y46,MGTPRXP3_213
|
||||
AE13,213,IPAD_X1Y7,GTP_CHANNEL_1_X130Y17,MGTPRXP1_213
|
||||
AF7,213,OPAD_X0Y6,GTP_CHANNEL_3_X130Y46,MGTPTXN3_213
|
||||
AF9,213,OPAD_X0Y2,GTP_CHANNEL_1_X130Y17,MGTPTXN1_213
|
||||
AF11,213,IPAD_X1Y24,GTP_CHANNEL_3_X130Y46,MGTPRXN3_213
|
||||
AF13,213,IPAD_X1Y6,GTP_CHANNEL_1_X130Y17,MGTPRXN1_213
|
||||
B1,35,IOB_X1Y107,RIOB33_X57Y107,IO_L21N_T3_DQS_35
|
||||
B2,35,IOB_X1Y111,RIOB33_X57Y111,IO_L19N_T3_VREF_35
|
||||
B4,35,IOB_X1Y118,RIOB33_X57Y117,IO_L16P_T2_35
|
||||
B5,35,IOB_X1Y120,RIOB33_X57Y119,IO_L15P_T2_DQS_35
|
||||
B7,216,OPAD_X0Y9,GTP_CHANNEL_0_X130Y162,MGTPTXP0_216
|
||||
B9,216,OPAD_X0Y13,GTP_CHANNEL_2_X130Y191,MGTPTXP2_216
|
||||
B11,216,IPAD_X1Y37,GTP_CHANNEL_0_X130Y162,MGTPRXP0_216
|
||||
B13,216,IPAD_X1Y55,GTP_CHANNEL_2_X130Y191,MGTPRXP2_216
|
||||
B17,16,IOB_X0Y185,LIOB33_X0Y185,IO_L7N_T1_16
|
||||
B19,16,IOB_X0Y180,LIOB33_X0Y179,IO_L10P_T1_16
|
||||
B20,16,IOB_X0Y170,LIOB33_X0Y169,IO_L15P_T2_DQS_16
|
||||
B21,16,IOB_X0Y167,LIOB33_X0Y167,IO_L16N_T2_16
|
||||
B22,16,IOB_X0Y166,LIOB33_X0Y165,IO_L17P_T2_16
|
||||
B24,16,IOB_X0Y153,LIOB33_X0Y153,IO_L23N_T3_16
|
||||
B25,16,IOB_X0Y160,LIOB33_X0Y159,IO_L20P_T3_16
|
||||
B26,16,IOB_X0Y155,LIOB33_X0Y155,IO_L22N_T3_16
|
||||
C1,35,IOB_X1Y108,RIOB33_X57Y107,IO_L21P_T3_DQS_35
|
||||
C2,35,IOB_X1Y112,RIOB33_X57Y111,IO_L19P_T3_35
|
||||
C3,35,IOB_X1Y115,RIOB33_X57Y115,IO_L17N_T2_35
|
||||
C4,35,IOB_X1Y121,RIOB33_X57Y121,IO_L14N_T2_SRCC_35
|
||||
C8,216,OPAD_X0Y10,GTP_CHANNEL_1_X130Y173,MGTPTXN1_216
|
||||
C10,216,OPAD_X0Y14,GTP_CHANNEL_3_X130Y202,MGTPTXN3_216
|
||||
C12,216,IPAD_X1Y60,GTP_CHANNEL_3_X130Y202,MGTPRXN3_216
|
||||
C14,216,IPAD_X1Y42,GTP_CHANNEL_1_X130Y173,MGTPRXN1_216
|
||||
C17,16,IOB_X0Y186,LIOB33_X0Y185,IO_L7P_T1_16
|
||||
C18,16,IOB_X0Y175,LIOB33_X0Y175,IO_L12N_T1_MRCC_16
|
||||
C19,16,IOB_X0Y173,LIOB33_X0Y173,IO_L13N_T2_MRCC_16
|
||||
C21,16,IOB_X0Y168,LIOB33_X0Y167,IO_L16P_T2_16
|
||||
C22,16,IOB_X0Y162,LIOB33_X0Y161,IO_L19P_T3_16
|
||||
C23,16,IOB_X0Y161,LIOB33_X0Y161,IO_L19N_T3_VREF_16
|
||||
C24,16,IOB_X0Y154,LIOB33_X0Y153,IO_L23P_T3_16
|
||||
C26,16,IOB_X0Y156,LIOB33_X0Y155,IO_L22P_T3_16
|
||||
D1,35,IOB_X1Y103,RIOB33_X57Y103,IO_L23N_T3_35
|
||||
D3,35,IOB_X1Y116,RIOB33_X57Y115,IO_L17P_T2_35
|
||||
D4,35,IOB_X1Y122,RIOB33_X57Y121,IO_L14P_T2_SRCC_35
|
||||
D5,35,IOB_X1Y123,RIOB33_X57Y123,IO_L13N_T2_MRCC_35
|
||||
D6,35,IOB_X1Y147,RIOB33_X57Y147,IO_L1N_T0_AD4N_35
|
||||
D8,216,OPAD_X0Y11,GTP_CHANNEL_1_X130Y173,MGTPTXP1_216
|
||||
D10,216,OPAD_X0Y15,GTP_CHANNEL_3_X130Y202,MGTPTXP3_216
|
||||
D12,216,IPAD_X1Y61,GTP_CHANNEL_3_X130Y202,MGTPRXP3_216
|
||||
D14,216,IPAD_X1Y43,GTP_CHANNEL_1_X130Y173,MGTPRXP1_216
|
||||
D16,16,IOB_X0Y183,LIOB33_X0Y183,IO_L8N_T1_16
|
||||
D18,16,IOB_X0Y176,LIOB33_X0Y175,IO_L12P_T1_MRCC_16
|
||||
D19,16,IOB_X0Y174,LIOB33_X0Y173,IO_L13P_T2_MRCC_16
|
||||
D20,16,IOB_X0Y171,LIOB33_X0Y171,IO_L14N_T2_SRCC_16
|
||||
D21,16,IOB_X0Y163,LIOB33_X0Y163,IO_L18N_T2_16
|
||||
D23,16,IOB_X0Y152,LIOB33_X0Y151,IO_L24P_T3_16
|
||||
D24,16,IOB_X0Y151,LIOB33_X0Y151,IO_L24N_T3_16
|
||||
D25,15,IOB_X0Y109,LIOB33_X0Y109,IO_L20N_T3_A19_15
|
||||
D26,15,IOB_X0Y107,LIOB33_X0Y107,IO_L21N_T3_DQS_A18_15
|
||||
E1,35,IOB_X1Y104,RIOB33_X57Y103,IO_L23P_T3_35
|
||||
E2,35,IOB_X1Y105,RIOB33_X57Y105,IO_L22N_T3_35
|
||||
E3,35,IOB_X1Y113,RIOB33_X57Y113,IO_L18N_T2_35
|
||||
E5,35,IOB_X1Y124,RIOB33_X57Y123,IO_L13P_T2_MRCC_35
|
||||
E6,35,IOB_X1Y148,RIOB33_X57Y147,IO_L1P_T0_AD4P_35
|
||||
E11,216,IPAD_X1Y45,GTP_COMMON_X130Y179,MGTREFCLK0N_216
|
||||
E13,216,IPAD_X1Y47,GTP_COMMON_X130Y179,MGTREFCLK1N_216
|
||||
E16,16,IOB_X0Y184,LIOB33_X0Y183,IO_L8P_T1_16
|
||||
E17,16,IOB_X0Y178,LIOB33_X0Y177,IO_L11P_T1_SRCC_16
|
||||
E18,16,IOB_X0Y177,LIOB33_X0Y177,IO_L11N_T1_SRCC_16
|
||||
E20,16,IOB_X0Y172,LIOB33_X0Y171,IO_L14P_T2_SRCC_16
|
||||
E21,16,IOB_X0Y164,LIOB33_X0Y163,IO_L18P_T2_16
|
||||
E22,16,IOB_X0Y150,LIOB33_SING_X0Y150,IO_25_16
|
||||
E23,15,IOB_X0Y115,LIOB33_X0Y115,IO_L17N_T2_A25_15
|
||||
E25,15,IOB_X0Y110,LIOB33_X0Y109,IO_L20P_T3_A20_15
|
||||
E26,15,IOB_X0Y108,LIOB33_X0Y107,IO_L21P_T3_DQS_15
|
||||
F2,35,IOB_X1Y106,RIOB33_X57Y105,IO_L22P_T3_35
|
||||
F3,35,IOB_X1Y114,RIOB33_X57Y113,IO_L18P_T2_35
|
||||
F4,35,IOB_X1Y127,RIOB33_X57Y127,IO_L11N_T1_SRCC_35
|
||||
F5,35,IOB_X1Y125,RIOB33_X57Y125,IO_L12N_T1_MRCC_35
|
||||
F7,35,IOB_X1Y141,RIOB33_X57Y141,IO_L4N_T0_35
|
||||
F8,35,IOB_X1Y142,RIOB33_X57Y141,IO_L4P_T0_35
|
||||
F11,216,IPAD_X1Y44,GTP_COMMON_X130Y179,MGTREFCLK0P_216
|
||||
F13,216,IPAD_X1Y46,GTP_COMMON_X130Y179,MGTREFCLK1P_216
|
||||
F15,16,IOB_X0Y191,LIOB33_X0Y191,IO_L4N_T0_16
|
||||
F17,16,IOB_X0Y195,LIOB33_X0Y195,IO_L2N_T0_16
|
||||
F18,16,IOB_X0Y194,LIOB33_X0Y193,IO_L3P_T0_DQS_16
|
||||
F19,16,IOB_X0Y193,LIOB33_X0Y193,IO_L3N_T0_DQS_16
|
||||
F20,16,IOB_X0Y189,LIOB33_X0Y189,IO_L5N_T0_16
|
||||
F22,15,IOB_X0Y119,LIOB33_X0Y119,IO_L15N_T2_DQS_ADV_B_15
|
||||
F23,15,IOB_X0Y116,LIOB33_X0Y115,IO_L17P_T2_A26_15
|
||||
F24,15,IOB_X0Y111,LIOB33_X0Y111,IO_L19N_T3_A21_VREF_15
|
||||
F25,15,IOB_X0Y103,LIOB33_X0Y103,IO_L23N_T3_FWE_B_15
|
||||
G1,35,IOB_X1Y101,RIOB33_X57Y101,IO_L24N_T3_35
|
||||
G2,35,IOB_X1Y102,RIOB33_X57Y101,IO_L24P_T3_35
|
||||
G4,35,IOB_X1Y128,RIOB33_X57Y127,IO_L11P_T1_SRCC_35
|
||||
G5,35,IOB_X1Y126,RIOB33_X57Y125,IO_L12P_T1_MRCC_35
|
||||
G6,35,IOB_X1Y139,RIOB33_X57Y139,IO_L5N_T0_AD13N_35
|
||||
G7,35,IOB_X1Y143,RIOB33_X57Y143,IO_L3N_T0_DQS_AD5N_35
|
||||
G8,35,IOB_X1Y145,RIOB33_X57Y145,IO_L2N_T0_AD12N_35
|
||||
G9,35,IOB_X1Y137,RIOB33_X57Y137,IO_L6N_T0_VREF_35
|
||||
G15,16,IOB_X0Y192,LIOB33_X0Y191,IO_L4P_T0_16
|
||||
G16,16,IOB_X0Y187,LIOB33_X0Y187,IO_L6N_T0_VREF_16
|
||||
G17,16,IOB_X0Y196,LIOB33_X0Y195,IO_L2P_T0_16
|
||||
G19,16,IOB_X0Y190,LIOB33_X0Y189,IO_L5P_T0_16
|
||||
G20,15,IOB_X0Y128,LIOB33_X0Y127,IO_L11P_T1_SRCC_15
|
||||
G21,15,IOB_X0Y127,LIOB33_X0Y127,IO_L11N_T1_SRCC_15
|
||||
G22,15,IOB_X0Y120,LIOB33_X0Y119,IO_L15P_T2_DQS_15
|
||||
G24,15,IOB_X0Y112,LIOB33_X0Y111,IO_L19P_T3_A22_15
|
||||
G25,15,IOB_X0Y104,LIOB33_X0Y103,IO_L23P_T3_FOE_B_15
|
||||
G26,15,IOB_X0Y105,LIOB33_X0Y105,IO_L22N_T3_A16_15
|
||||
H1,34,IOB_X1Y79,RIOB33_X57Y79,IO_L10N_T1_34
|
||||
H2,34,IOB_X1Y80,RIOB33_X57Y79,IO_L10P_T1_34
|
||||
H3,35,IOB_X1Y100,RIOB33_SING_X57Y100,IO_25_35
|
||||
H4,35,IOB_X1Y131,RIOB33_X57Y131,IO_L9N_T1_DQS_AD7N_35
|
||||
H6,35,IOB_X1Y140,RIOB33_X57Y139,IO_L5P_T0_AD13P_35
|
||||
H7,35,IOB_X1Y144,RIOB33_X57Y143,IO_L3P_T0_DQS_AD5P_35
|
||||
H8,35,IOB_X1Y146,RIOB33_X57Y145,IO_L2P_T0_AD12P_35
|
||||
H9,35,IOB_X1Y138,RIOB33_X57Y137,IO_L6P_T0_35
|
||||
H14,16,IOB_X0Y198,LIOB33_X0Y197,IO_L1P_T0_16
|
||||
H15,16,IOB_X0Y197,LIOB33_X0Y197,IO_L1N_T0_16
|
||||
H16,16,IOB_X0Y188,LIOB33_X0Y187,IO_L6P_T0_16
|
||||
H17,16,IOB_X0Y199,LIOB33_SING_X0Y199,IO_0_16
|
||||
H18,15,IOB_X0Y129,LIOB33_X0Y129,IO_L10N_T1_AD11N_15
|
||||
H19,15,IOB_X0Y135,LIOB33_X0Y135,IO_L7N_T1_AD2N_15
|
||||
H21,15,IOB_X0Y124,LIOB33_X0Y123,IO_L13P_T2_MRCC_15
|
||||
H22,15,IOB_X0Y123,LIOB33_X0Y123,IO_L13N_T2_MRCC_15
|
||||
H23,15,IOB_X0Y121,LIOB33_X0Y121,IO_L14N_T2_SRCC_15
|
||||
H24,15,IOB_X0Y117,LIOB33_X0Y117,IO_L16N_T2_A27_15
|
||||
H26,15,IOB_X0Y106,LIOB33_X0Y105,IO_L22P_T3_A17_15
|
||||
J1,34,IOB_X1Y85,RIOB33_X57Y85,IO_L7N_T1_34
|
||||
J3,34,IOB_X1Y97,RIOB33_X57Y97,IO_L1N_T0_34
|
||||
J4,35,IOB_X1Y132,RIOB33_X57Y131,IO_L9P_T1_DQS_AD7P_35
|
||||
J5,35,IOB_X1Y135,RIOB33_X57Y135,IO_L7N_T1_AD6N_35
|
||||
J6,35,IOB_X1Y136,RIOB33_X57Y135,IO_L7P_T1_AD6P_35
|
||||
J8,35,IOB_X1Y149,RIOB33_SING_X57Y149,IO_0_35
|
||||
J14,15,IOB_X0Y146,LIOB33_X0Y145,IO_L2P_T0_AD8P_15
|
||||
J15,15,IOB_X0Y145,LIOB33_X0Y145,IO_L2N_T0_AD8N_15
|
||||
J16,15,IOB_X0Y147,LIOB33_X0Y147,IO_L1N_T0_AD0N_15
|
||||
J18,15,IOB_X0Y130,LIOB33_X0Y129,IO_L10P_T1_AD11P_15
|
||||
J19,15,IOB_X0Y136,LIOB33_X0Y135,IO_L7P_T1_AD2P_15
|
||||
J20,15,IOB_X0Y131,LIOB33_X0Y131,IO_L9N_T1_DQS_AD3N_15
|
||||
J21,15,IOB_X0Y125,LIOB33_X0Y125,IO_L12N_T1_MRCC_15
|
||||
J23,15,IOB_X0Y122,LIOB33_X0Y121,IO_L14P_T2_SRCC_15
|
||||
J24,15,IOB_X0Y118,LIOB33_X0Y117,IO_L16P_T2_A28_15
|
||||
J25,15,IOB_X0Y102,LIOB33_X0Y101,IO_L24P_T3_RS1_15
|
||||
J26,15,IOB_X0Y101,LIOB33_X0Y101,IO_L24N_T3_RS0_15
|
||||
K1,34,IOB_X1Y86,RIOB33_X57Y85,IO_L7P_T1_34
|
||||
K2,34,IOB_X1Y83,RIOB33_X57Y83,IO_L8N_T1_34
|
||||
K3,34,IOB_X1Y98,RIOB33_X57Y97,IO_L1P_T0_34
|
||||
K5,34,IOB_X1Y91,RIOB33_X57Y91,IO_L4N_T0_34
|
||||
K6,35,IOB_X1Y129,RIOB33_X57Y129,IO_L10N_T1_AD15N_35
|
||||
K7,35,IOB_X1Y130,RIOB33_X57Y129,IO_L10P_T1_AD15P_35
|
||||
K8,35,IOB_X1Y133,RIOB33_X57Y133,IO_L8N_T1_AD14N_35
|
||||
K15,15,IOB_X0Y148,LIOB33_X0Y147,IO_L1P_T0_AD0P_15
|
||||
K16,15,IOB_X0Y144,LIOB33_X0Y143,IO_L3P_T0_DQS_AD1P_15
|
||||
K17,15,IOB_X0Y143,LIOB33_X0Y143,IO_L3N_T0_DQS_AD1N_15
|
||||
K18,15,IOB_X0Y149,LIOB33_SING_X0Y149,IO_0_15
|
||||
K20,15,IOB_X0Y132,LIOB33_X0Y131,IO_L9P_T1_DQS_AD3P_15
|
||||
K21,15,IOB_X0Y126,LIOB33_X0Y125,IO_L12P_T1_MRCC_15
|
||||
K22,15,IOB_X0Y114,LIOB33_X0Y113,IO_L18P_T2_A24_15
|
||||
K23,15,IOB_X0Y113,LIOB33_X0Y113,IO_L18N_T2_A23_15
|
||||
K25,14,IOB_X0Y86,LIOB33_X0Y85,IO_L7P_T1_D09_14
|
||||
K26,14,IOB_X0Y85,LIOB33_X0Y85,IO_L7N_T1_D10_14
|
||||
L2,34,IOB_X1Y77,RIOB33_X57Y77,IO_L11N_T1_SRCC_34
|
||||
L3,34,IOB_X1Y84,RIOB33_X57Y83,IO_L8P_T1_34
|
||||
L4,34,IOB_X1Y93,RIOB33_X57Y93,IO_L3N_T0_DQS_34
|
||||
L5,34,IOB_X1Y92,RIOB33_X57Y91,IO_L4P_T0_34
|
||||
L7,34,IOB_X1Y95,RIOB33_X57Y95,IO_L2N_T0_34
|
||||
L8,35,IOB_X1Y134,RIOB33_X57Y133,IO_L8P_T1_AD14P_35
|
||||
L14,15,IOB_X0Y141,LIOB33_X0Y141,IO_L4N_T0_15
|
||||
L15,15,IOB_X0Y139,LIOB33_X0Y139,IO_L5N_T0_AD9N_15
|
||||
L17,15,IOB_X0Y134,LIOB33_X0Y133,IO_L8P_T1_AD10P_15
|
||||
L18,15,IOB_X0Y133,LIOB33_X0Y133,IO_L8N_T1_AD10N_15
|
||||
L19,15,IOB_X0Y100,LIOB33_SING_X0Y100,IO_25_15
|
||||
L20,14,IOB_X0Y83,LIOB33_X0Y83,IO_L8N_T1_D12_14
|
||||
L22,14,IOB_X0Y78,LIOB33_X0Y77,IO_L11P_T1_SRCC_14
|
||||
L23,14,IOB_X0Y77,LIOB33_X0Y77,IO_L11N_T1_SRCC_14
|
||||
L24,14,IOB_X0Y82,LIOB33_X0Y81,IO_L9P_T1_DQS_14
|
||||
L25,14,IOB_X0Y81,LIOB33_X0Y81,IO_L9N_T1_DQS_D13_14
|
||||
M1,34,IOB_X1Y81,RIOB33_X57Y81,IO_L9N_T1_DQS_34
|
||||
M2,34,IOB_X1Y78,RIOB33_X57Y77,IO_L11P_T1_SRCC_34
|
||||
M4,34,IOB_X1Y94,RIOB33_X57Y93,IO_L3P_T0_DQS_34
|
||||
M5,34,IOB_X1Y87,RIOB33_X57Y87,IO_L6N_T0_VREF_34
|
||||
M6,34,IOB_X1Y88,RIOB33_X57Y87,IO_L6P_T0_34
|
||||
M7,34,IOB_X1Y96,RIOB33_X57Y95,IO_L2P_T0_34
|
||||
M14,15,IOB_X0Y142,LIOB33_X0Y141,IO_L4P_T0_15
|
||||
M15,15,IOB_X0Y140,LIOB33_X0Y139,IO_L5P_T0_AD9P_15
|
||||
M16,15,IOB_X0Y138,LIOB33_X0Y137,IO_L6P_T0_15
|
||||
M17,15,IOB_X0Y137,LIOB33_X0Y137,IO_L6N_T0_VREF_15
|
||||
M19,14,IOB_X0Y99,LIOB33_SING_X0Y99,IO_0_14
|
||||
M20,14,IOB_X0Y84,LIOB33_X0Y83,IO_L8P_T1_D11_14
|
||||
M21,14,IOB_X0Y76,LIOB33_X0Y75,IO_L12P_T1_MRCC_14
|
||||
M22,14,IOB_X0Y75,LIOB33_X0Y75,IO_L12N_T1_MRCC_14
|
||||
M24,14,IOB_X0Y80,LIOB33_X0Y79,IO_L10P_T1_D14_14
|
||||
M25,14,IOB_X0Y79,LIOB33_X0Y79,IO_L10N_T1_D15_14
|
||||
M26,14,IOB_X0Y59,LIOB33_X0Y59,IO_L20N_T3_A07_D23_14
|
||||
N1,34,IOB_X1Y82,RIOB33_X57Y81,IO_L9P_T1_DQS_34
|
||||
N2,34,IOB_X1Y75,RIOB33_X57Y75,IO_L12N_T1_MRCC_34
|
||||
N3,34,IOB_X1Y76,RIOB33_X57Y75,IO_L12P_T1_MRCC_34
|
||||
N4,34,IOB_X1Y71,RIOB33_X57Y71,IO_L14N_T2_SRCC_34
|
||||
N6,34,IOB_X1Y89,RIOB33_X57Y89,IO_L5N_T0_34
|
||||
N7,34,IOB_X1Y90,RIOB33_X57Y89,IO_L5P_T0_34
|
||||
N8,34,IOB_X1Y99,RIOB33_SING_X57Y99,IO_0_34
|
||||
N12,0,IPAD_X0Y30,MONITOR_BOT_X46Y131,VP_0
|
||||
N14,14,IOB_X0Y95,LIOB33_X0Y95,IO_L2N_T0_D03_14
|
||||
N16,14,IOB_X0Y92,LIOB33_X0Y91,IO_L4P_T0_D04_14
|
||||
N17,14,IOB_X0Y91,LIOB33_X0Y91,IO_L4N_T0_D05_14
|
||||
N18,14,IOB_X0Y87,LIOB33_X0Y87,IO_L6N_T0_D08_VREF_14
|
||||
N19,14,IOB_X0Y67,LIOB33_X0Y67,IO_L16N_T2_A15_D31_14
|
||||
N21,14,IOB_X0Y74,LIOB33_X0Y73,IO_L13P_T2_MRCC_14
|
||||
N22,14,IOB_X0Y73,LIOB33_X0Y73,IO_L13N_T2_MRCC_14
|
||||
N23,14,IOB_X0Y70,LIOB33_X0Y69,IO_L15P_T2_DQS_RDWR_B_14
|
||||
N24,14,IOB_X0Y69,LIOB33_X0Y69,IO_L15N_T2_DQS_DOUT_CSO_B_14
|
||||
N26,14,IOB_X0Y60,LIOB33_X0Y59,IO_L20P_T3_A08_D24_14
|
||||
P1,34,IOB_X1Y69,RIOB33_X57Y69,IO_L15N_T2_DQS_34
|
||||
P3,34,IOB_X1Y73,RIOB33_X57Y73,IO_L13N_T2_MRCC_34
|
||||
P4,34,IOB_X1Y72,RIOB33_X57Y71,IO_L14P_T2_SRCC_34
|
||||
P5,34,IOB_X1Y61,RIOB33_X57Y61,IO_L19N_T3_VREF_34
|
||||
P6,34,IOB_X1Y62,RIOB33_X57Y61,IO_L19P_T3_34
|
||||
P8,34,IOB_X1Y55,RIOB33_X57Y55,IO_L22N_T3_34
|
||||
P11,0,IPAD_X0Y31,MONITOR_BOT_X46Y131,VN_0
|
||||
P14,14,IOB_X0Y96,LIOB33_X0Y95,IO_L2P_T0_D02_14
|
||||
P15,14,IOB_X0Y94,LIOB33_X0Y93,IO_L3P_T0_DQS_PUDC_B_14
|
||||
P16,14,IOB_X0Y93,LIOB33_X0Y93,IO_L3N_T0_DQS_EMCCLK_14
|
||||
P18,14,IOB_X0Y88,LIOB33_X0Y87,IO_L6P_T0_FCS_B_14
|
||||
P19,14,IOB_X0Y68,LIOB33_X0Y67,IO_L16P_T2_CSI_B_14
|
||||
P20,14,IOB_X0Y72,LIOB33_X0Y71,IO_L14P_T2_SRCC_14
|
||||
P21,14,IOB_X0Y71,LIOB33_X0Y71,IO_L14N_T2_SRCC_14
|
||||
P23,14,IOB_X0Y66,LIOB33_X0Y65,IO_L17P_T2_A14_D30_14
|
||||
P24,14,IOB_X0Y65,LIOB33_X0Y65,IO_L17N_T2_A13_D29_14
|
||||
P25,14,IOB_X0Y61,LIOB33_X0Y61,IO_L19N_T3_A09_D25_VREF_14
|
||||
P26,14,IOB_X0Y55,LIOB33_X0Y55,IO_L22N_T3_A04_D20_14
|
||||
R1,34,IOB_X1Y70,RIOB33_X57Y69,IO_L15P_T2_DQS_34
|
||||
R2,34,IOB_X1Y65,RIOB33_X57Y65,IO_L17N_T2_34
|
||||
R3,34,IOB_X1Y74,RIOB33_X57Y73,IO_L13P_T2_MRCC_34
|
||||
R5,34,IOB_X1Y59,RIOB33_X57Y59,IO_L20N_T3_34
|
||||
R6,34,IOB_X1Y53,RIOB33_X57Y53,IO_L23N_T3_34
|
||||
R7,34,IOB_X1Y54,RIOB33_X57Y53,IO_L23P_T3_34
|
||||
R8,34,IOB_X1Y56,RIOB33_X57Y55,IO_L22P_T3_34
|
||||
R14,14,IOB_X0Y98,LIOB33_X0Y97,IO_L1P_T0_D00_MOSI_14
|
||||
R15,14,IOB_X0Y97,LIOB33_X0Y97,IO_L1N_T0_D01_DIN_14
|
||||
R16,14,IOB_X0Y90,LIOB33_X0Y89,IO_L5P_T0_D06_14
|
||||
R17,14,IOB_X0Y89,LIOB33_X0Y89,IO_L5N_T0_D07_14
|
||||
R18,14,IOB_X0Y50,LIOB33_SING_X0Y50,IO_25_14
|
||||
R20,14,IOB_X0Y64,LIOB33_X0Y63,IO_L18P_T2_A12_D28_14
|
||||
R21,14,IOB_X0Y63,LIOB33_X0Y63,IO_L18N_T2_A11_D27_14
|
||||
R22,14,IOB_X0Y53,LIOB33_X0Y53,IO_L23N_T3_A02_D18_14
|
||||
R23,14,IOB_X0Y51,LIOB33_X0Y51,IO_L24N_T3_A00_D16_14
|
||||
R25,14,IOB_X0Y62,LIOB33_X0Y61,IO_L19P_T3_A10_D26_14
|
||||
R26,14,IOB_X0Y56,LIOB33_X0Y55,IO_L22P_T3_A05_D21_14
|
||||
T2,34,IOB_X1Y66,RIOB33_X57Y65,IO_L17P_T2_34
|
||||
T3,34,IOB_X1Y67,RIOB33_X57Y67,IO_L16N_T2_34
|
||||
T4,34,IOB_X1Y68,RIOB33_X57Y67,IO_L16P_T2_34
|
||||
T5,34,IOB_X1Y60,RIOB33_X57Y59,IO_L20P_T3_34
|
||||
T7,34,IOB_X1Y51,RIOB33_X57Y51,IO_L24N_T3_34
|
||||
T8,34,IOB_X1Y52,RIOB33_X57Y51,IO_L24P_T3_34
|
||||
T14,13,IOB_X0Y10,LIOB33_X0Y9,IO_L20P_T3_13
|
||||
T15,13,IOB_X0Y9,LIOB33_X0Y9,IO_L20N_T3_13
|
||||
T17,13,IOB_X0Y8,LIOB33_X0Y7,IO_L21P_T3_DQS_13
|
||||
T18,13,IOB_X0Y7,LIOB33_X0Y7,IO_L21N_T3_DQS_13
|
||||
T19,13,IOB_X0Y16,LIOB33_X0Y15,IO_L17P_T2_13
|
||||
T20,13,IOB_X0Y20,LIOB33_X0Y19,IO_L15P_T2_DQS_13
|
||||
T22,14,IOB_X0Y54,LIOB33_X0Y53,IO_L23P_T3_A03_D19_14
|
||||
T23,14,IOB_X0Y52,LIOB33_X0Y51,IO_L24P_T3_A01_D17_14
|
||||
T24,14,IOB_X0Y58,LIOB33_X0Y57,IO_L21P_T3_DQS_14
|
||||
T25,14,IOB_X0Y57,LIOB33_X0Y57,IO_L21N_T3_DQS_A06_D22_14
|
||||
U1,34,IOB_X1Y63,RIOB33_X57Y63,IO_L18N_T2_34
|
||||
U2,34,IOB_X1Y64,RIOB33_X57Y63,IO_L18P_T2_34
|
||||
U4,34,IOB_X1Y50,RIOB33_SING_X57Y50,IO_25_34
|
||||
U5,34,IOB_X1Y57,RIOB33_X57Y57,IO_L21N_T3_DQS_34
|
||||
U6,34,IOB_X1Y58,RIOB33_X57Y57,IO_L21P_T3_DQS_34
|
||||
U14,13,IOB_X0Y4,LIOB33_X0Y3,IO_L23P_T3_13
|
||||
U15,13,IOB_X0Y6,LIOB33_X0Y5,IO_L22P_T3_13
|
||||
U16,13,IOB_X0Y5,LIOB33_X0Y5,IO_L22N_T3_13
|
||||
U17,13,IOB_X0Y0,LIOB33_SING_X0Y0,IO_25_13
|
||||
U19,13,IOB_X0Y15,LIOB33_X0Y15,IO_L17N_T2_13
|
||||
U20,13,IOB_X0Y19,LIOB33_X0Y19,IO_L15N_T2_DQS_13
|
||||
U21,13,IOB_X0Y24,LIOB33_X0Y23,IO_L13P_T2_MRCC_13
|
||||
U22,13,IOB_X0Y26,LIOB33_X0Y25,IO_L12P_T1_MRCC_13
|
||||
U24,13,IOB_X0Y49,LIOB33_SING_X0Y49,IO_0_13
|
||||
U25,13,IOB_X0Y48,LIOB33_X0Y47,IO_L1P_T0_13
|
||||
U26,13,IOB_X0Y47,LIOB33_X0Y47,IO_L1N_T0_13
|
||||
V14,13,IOB_X0Y3,LIOB33_X0Y3,IO_L23N_T3_13
|
||||
V16,13,IOB_X0Y2,LIOB33_X0Y1,IO_L24P_T3_13
|
||||
V17,13,IOB_X0Y1,LIOB33_X0Y1,IO_L24N_T3_13
|
||||
V18,13,IOB_X0Y12,LIOB33_X0Y11,IO_L19P_T3_13
|
||||
V19,13,IOB_X0Y14,LIOB33_X0Y13,IO_L18P_T2_13
|
||||
V21,13,IOB_X0Y23,LIOB33_X0Y23,IO_L13N_T2_MRCC_13
|
||||
V22,13,IOB_X0Y25,LIOB33_X0Y25,IO_L12N_T1_MRCC_13
|
||||
V23,13,IOB_X0Y30,LIOB33_X0Y29,IO_L10P_T1_13
|
||||
V24,13,IOB_X0Y38,LIOB33_X0Y37,IO_L6P_T0_13
|
||||
V26,13,IOB_X0Y46,LIOB33_X0Y45,IO_L2P_T0_13
|
||||
W18,13,IOB_X0Y11,LIOB33_X0Y11,IO_L19N_T3_VREF_13
|
||||
W19,13,IOB_X0Y13,LIOB33_X0Y13,IO_L18N_T2_13
|
||||
W20,13,IOB_X0Y18,LIOB33_X0Y17,IO_L16P_T2_13
|
||||
W21,13,IOB_X0Y22,LIOB33_X0Y21,IO_L14P_T2_SRCC_13
|
||||
W23,13,IOB_X0Y29,LIOB33_X0Y29,IO_L10N_T1_13
|
||||
W24,13,IOB_X0Y37,LIOB33_X0Y37,IO_L6N_T0_VREF_13
|
||||
W25,13,IOB_X0Y42,LIOB33_X0Y41,IO_L4P_T0_13
|
||||
W26,13,IOB_X0Y45,LIOB33_X0Y45,IO_L2N_T0_13
|
||||
Y20,13,IOB_X0Y17,LIOB33_X0Y17,IO_L16N_T2_13
|
||||
Y21,13,IOB_X0Y21,LIOB33_X0Y21,IO_L14N_T2_SRCC_13
|
||||
Y22,13,IOB_X0Y28,LIOB33_X0Y27,IO_L11P_T1_SRCC_13
|
||||
Y23,13,IOB_X0Y27,LIOB33_X0Y27,IO_L11N_T1_SRCC_13
|
||||
Y25,13,IOB_X0Y40,LIOB33_X0Y39,IO_L5P_T0_13
|
||||
Y26,13,IOB_X0Y41,LIOB33_X0Y41,IO_L4N_T0_13
|
||||
|
|
|
@ -0,0 +1,772 @@
|
|||
{
|
||||
"global_clock_regions": {
|
||||
"bottom": {
|
||||
"rows": {
|
||||
"0": {
|
||||
"configuration_buses": {
|
||||
"BLOCK_RAM": {
|
||||
"configuration_columns": {
|
||||
"0": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"1": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"2": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"3": {
|
||||
"frame_count": 128
|
||||
}
|
||||
}
|
||||
},
|
||||
"CLB_IO_CLK": {
|
||||
"configuration_columns": {
|
||||
"0": {
|
||||
"frame_count": 42
|
||||
},
|
||||
"1": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"2": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"3": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"4": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"5": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"6": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"7": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"8": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"9": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"10": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"11": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"12": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"13": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"14": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"15": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"16": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"17": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"18": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"19": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"20": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"21": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"22": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"23": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"24": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"25": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"26": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"27": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"28": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"29": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"30": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"31": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"32": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"33": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"34": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"35": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"36": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"37": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"38": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"39": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"40": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"41": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"42": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"43": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"44": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"45": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"46": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"47": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"48": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"49": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"50": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"51": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"52": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"53": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"54": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"55": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"56": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"57": {
|
||||
"frame_count": 42
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"1": {
|
||||
"configuration_buses": {
|
||||
"BLOCK_RAM": {
|
||||
"configuration_columns": {
|
||||
"0": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"1": {
|
||||
"frame_count": 128
|
||||
},
|
||||
"2": {
|
||||
"frame_count": 128
|
||||
}
|
||||
}
|
||||
},
|
||||
"CLB_IO_CLK": {
|
||||
"configuration_columns": {
|
||||
"0": {
|
||||
"frame_count": 42
|
||||
},
|
||||
"1": {
|
||||
"frame_count": 30
|
||||
},
|
||||
"2": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"3": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"4": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"5": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"6": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"7": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"8": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"9": {
|
||||
"frame_count": 28
|
||||
},
|
||||
"10": {
|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
}
|
||||
}
|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
"1": {
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
}
|
||||
}
|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
"13": {
|
||||
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|
||||
},
|
||||
"14": {
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"24": {
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
"29": {
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
"33": {
|
||||
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|
||||
},
|
||||
"34": {
|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
},
|
||||
"36": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"37": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"38": {
|
||||
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|
||||
},
|
||||
"39": {
|
||||
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|
||||
},
|
||||
"40": {
|
||||
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|
||||
},
|
||||
"41": {
|
||||
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|
||||
},
|
||||
"42": {
|
||||
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|
||||
},
|
||||
"43": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"44": {
|
||||
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|
||||
},
|
||||
"45": {
|
||||
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|
||||
},
|
||||
"46": {
|
||||
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|
||||
},
|
||||
"47": {
|
||||
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|
||||
},
|
||||
"48": {
|
||||
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|
||||
},
|
||||
"49": {
|
||||
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|
||||
},
|
||||
"50": {
|
||||
"frame_count": 36
|
||||
},
|
||||
"51": {
|
||||
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|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"idcode": 56823955,
|
||||
"iobanks": {
|
||||
"0": "X1Y130",
|
||||
"13": "X1Y26",
|
||||
"14": "X1Y78",
|
||||
"15": "X1Y130",
|
||||
"16": "X1Y182",
|
||||
"34": "X146Y78",
|
||||
"35": "X146Y130"
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,499 @@
|
|||
!<xilinx/xc7series/part>
|
||||
idcode: 0x3631093
|
||||
global_clock_regions:
|
||||
top: !<xilinx/xc7series/global_clock_region>
|
||||
rows:
|
||||
0: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
52: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
53: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
54: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
55: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
56: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
57: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 32
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
bottom: !<xilinx/xc7series/global_clock_region>
|
||||
rows:
|
||||
0: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
52: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
53: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
54: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
55: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
56: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
57: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/row>
|
||||
configuration_buses:
|
||||
CLB_IO_CLK: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 42
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
3: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
4: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
5: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
6: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
7: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
8: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
9: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
10: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
11: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
12: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
13: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
14: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
15: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
16: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
17: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
18: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
19: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
20: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
21: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
22: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
23: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
24: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
25: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
26: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
27: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
28: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
29: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
30: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
31: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 30
|
||||
32: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
33: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
34: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
35: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
36: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
37: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
38: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
39: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
40: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
41: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
42: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
43: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
44: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
45: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
46: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
47: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
48: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 28
|
||||
49: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
50: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 36
|
||||
51: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 32
|
||||
BLOCK_RAM: !<xilinx/xc7series/configuration_bus>
|
||||
configuration_columns:
|
||||
0: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
1: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
2: !<xilinx/xc7series/configuration_column>
|
||||
frame_count: 128
|
||||
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Reference in New Issue