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Project Peppercorn - GateMate FPGA Bitstream Documentation
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Patrick Urban 9148a1b81d
Merge branch 'YosysHQ:main' into cfgmode 		2025-07-08 19:49:11 +02:00
docs Fix `CMD_CFGMODE` formatting 2025-07-08 16:57:52 +02:00
gatemate Preps for MX8 support 2025-07-07 10:12:59 +02:00
libgm Merge branch 'YosysHQ:main' into cfgmode 2025-07-08 19:49:11 +02:00
schematics/cpe another CPE schematic update 2025-07-07 10:12:59 +02:00
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.gitignore Add timing information from dly files 2025-05-27 15:21:14 +02:00
.readthedocs.yaml Update readthedocs config 2024-12-04 17:19:41 +01:00
COPYING License and README 2024-12-04 11:45:48 +01:00
README.md License and README 2024-12-04 11:45:48 +01:00
decompress.py Add timing information from dly files 2025-05-27 15:21:14 +02:00
delay.sh Download only with delay files 2025-06-05 07:00:12 +02:00
environment.sh Start modeling chip die 2024-12-09 10:57:04 +01:00

README.md

Project Peppercorn

GateMate FPGAs Bitstream Documentation and Tools

Credits

Code is heavily based on prjtrellis. Special thanks goes to @gatecat

License

All software (code, associated documentation, support files, etc) in the Project Peppercorn repository are licensed under the very permissive ISC Licence. A copy can be found in the COPYING file.

All new contributions must also be released under this license.