Add DDR pin information

This commit is contained in:
Miodrag Milanovic 2025-06-13 15:36:22 +02:00 committed by Miodrag Milanović
parent 2aa7ef65ba
commit 08b35c4538
2 changed files with 9 additions and 4 deletions

View File

@ -18,7 +18,7 @@
import die
import os
from die import Die
from die import Die, Location
from dataclasses import dataclass
from typing import List, Dict
from timing import decompress_timing
@ -34,6 +34,7 @@ class Pad:
function : str
bank : int
flags : int
ddr : Location
@dataclass
class Bank:
@ -135,6 +136,7 @@ class Chip:
for p in ["A","B"]:
for num in range(9):
d = self.dies[bank.die]
ddr = d.ddr_i[bank.bank]
loc = d.io_pad_names[bank.bank][p][num]
pad_name = f"IO_{name}_{p}{num}"
flags = 0
@ -142,7 +144,7 @@ class Chip:
if bank.bank == "W2" and p == "A" and num in [5,6,7,8]:
flags = 8-num+1 # will be 1-4 for different clock sources
if pad_name not in not_exist:
pads.append(Pad(loc.x + d.offset_x,loc.y + d.offset_y,pad_name,"GPIO","",self.get_bank_number(bank.bank),flags))
pads.append(Pad(loc.x + d.offset_x,loc.y + d.offset_y,pad_name,"GPIO","",self.get_bank_number(bank.bank),flags,ddr))
return pads
CCGM1_DEVICES = {

View File

@ -225,6 +225,7 @@ class MUX:
class Location:
x : int
y : int
z : int
@dataclass(eq=True, order=True)
class Connection:
@ -2862,6 +2863,7 @@ class Die:
self.gpio_to_loc = dict()
self.conn = dict()
self.rev_conn = dict()
self.ddr_i = dict()
for y in range(-2, max_row()+1):
for x in range(-2, max_col()+1):
if is_gpio(x,y):
@ -2872,8 +2874,8 @@ class Die:
self.io_pad_names[io.bank][io.port] = dict()
if io.num not in self.io_pad_names[io.bank][io.port]:
self.io_pad_names[io.bank][io.port][io.num] = dict()
self.gpio_to_loc[f"GPIO_{io.bank}_{io.port}[{io.num}]"] = Location(x, y)
self.io_pad_names[io.bank][io.port][io.num] = Location(x, y)
self.gpio_to_loc[f"GPIO_{io.bank}_{io.port}[{io.num}]"] = Location(x, y, 0)
self.io_pad_names[io.bank][io.port][io.num] = Location(x, y, 0)
def create_conn(self, src_x,src_y, src, dst_x, dst_y, dst, delay=""):
key_val = f"{src_x + self.offset_x}/{src_y + self.offset_y}/{src}"
@ -3250,6 +3252,7 @@ class Die:
for num in range(0,9):
loc = self.io_pad_names[bank][port][num]
self.create_conn(x, y , f"CPE.RAM_O{out}", loc.x, loc.y, "GPIO.DDR")
self.ddr_i[bank] = Location(x+self.offset_x,y+self.offset_y,2-out)
def misc_connections(self):
self.create_ram_io_conn("CFG_CTRL", "CFG_CTRL", CTRL_X_POS, CTRL_Y_POS)